oops, sorry for the last commit. This commit changes the code to distinguish
[coreboot.git] / src / arch / i386 / Makefile.inc
1 #######################################################################
2 # Take care of subdirectories
3 subdirs-y += boot
4 # subdirs-y += init
5 subdirs-y += lib
6 subdirs-y += smp
7
8 obj-$(CONFIG_HAVE_OPTION_TABLE) += ../../option_table.o
9
10 #######################################################################
11 # Build the final rom image
12 COREBOOT_ROM_DEPENDENCIES:=
13 ifneq ($(CONFIG_PAYLOAD_NONE),y)
14 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_FALLBACK_PAYLOAD_FILE)
15 endif
16 ifeq ($(CONFIG_VGA_BIOS),y)
17 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_FALLBACK_VGA_BIOS_FILE)
18 endif
19 ifeq ($(CONFIG_INTEL_MBI),y)
20 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_FALLBACK_MBI_FILE)
21 endif
22 ifeq ($(CONFIG_BOOTSPLASH),y)
23 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_FALLBACK_BOOTSPLASH_FILE)
24 endif
25 ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
26 COREBOOT_ROM_DEPENDENCIES+=$(obj)/coreboot_ap
27 endif
28 ifeq ($(CONFIG_GEODE_VSA_FILE),y)
29 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_VSA_FILENAME)
30 endif
31
32 $(obj)/coreboot.rom: $(obj)/coreboot.pre $(obj)/coreboot_ram $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES))
33         @printf "    CBFS       $(subst $(obj)/,,$(@))\n"
34         cp $(obj)/coreboot.pre $@.tmp
35         if [ -f $(obj)/coreboot_ap ]; \
36         then \
37                 $(CBFSTOOL) $@.tmp add-stage $(obj)/coreboot_ap $(CONFIG_CBFS_PREFIX)/coreboot_ap $(CBFS_COMPRESS_FLAG); \
38         fi
39         $(CBFSTOOL) $@.tmp add-stage $(obj)/coreboot_ram $(CONFIG_CBFS_PREFIX)/coreboot_ram $(CBFS_COMPRESS_FLAG)
40 ifeq ($(CONFIG_PAYLOAD_NONE),y)
41         @printf "    PAYLOAD    \e[1;31mnone (as specified by user)\e[0m\n"
42 else
43         @printf "    PAYLOAD    $(CONFIG_FALLBACK_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n"
44         $(CBFSTOOL) $@.tmp add-payload $(CONFIG_FALLBACK_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
45 endif
46 ifeq ($(CONFIG_VGA_BIOS),y)
47         @printf "    VGABIOS    $(CONFIG_FALLBACK_VGA_BIOS_FILE) $(CONFIG_FALLBACK_VGA_BIOS_ID)\n"
48         $(CBFSTOOL) $@.tmp add $(CONFIG_FALLBACK_VGA_BIOS_FILE) "pci$(CONFIG_FALLBACK_VGA_BIOS_ID).rom" optionrom
49 endif
50 ifeq ($(CONFIG_INTEL_MBI),y)
51         @printf "    MBI        $(CONFIG_FALLBACK_MBI_FILE)\n"
52         $(CBFSTOOL) $@.tmp add $(CONFIG_FALLBACK_MBI_FILE) mbi.bin mbi
53 endif
54 ifeq ($(CONFIG_BOOTSPLASH),y)
55         @printf "    BOOTSPLASH $(CONFIG_FALLBACK_BOOTSPLASH_FILE)\n"
56         $(CBFSTOOL) $@.tmp add $(CONFIG_FALLBACK_BOOTSPLASH_FILE) bootsplash.jpg bootsplash
57 endif
58 ifeq ($(CONFIG_GEODE_VSA_FILE),y)
59         @printf "    VSA        $(CONFIG_VSA_FILENAME)\n"
60         $(OBJCOPY) --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 $(CONFIG_VSA_FILENAME) $(obj)/vsa.o
61         $(LD) -e 0x60020 --section-start .data=0x60000 $(obj)/vsa.o -o $(obj)/vsa.elf
62         $(CBFSTOOL) $@.tmp add-stage $(obj)/vsa.elf vsa
63 endif
64         mv $@.tmp $@
65         @printf "    CBFSPRINT  $(subst $(obj)/,,$(@))\n\n"
66         $(CBFSTOOL) $@ print
67
68 #######################################################################
69 # i386 specific tools
70
71 $(obj)/option_table.h: $(objutil)/options/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
72         @printf "    OPTION     $(subst $(obj)/,,$(@))\n"
73         $(objutil)/options/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --header $(obj)/option_table.h
74
75 $(obj)/option_table.c: $(objutil)/options/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
76         @printf "    OPTION     $(subst $(obj)/,,$(@))\n"
77         $(objutil)/options/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --option $(obj)/option_table.c
78
79 $(objutil)/options/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src/include/pc80/mc146818rtc.h $(top)/src/include/boot/coreboot_tables.h
80         @printf "    HOSTCC     $(subst $(obj)/,,$(@))\n"
81         $(HOSTCC) $(HOSTCFLAGS) $< -o $@
82
83 #######################################################################
84 # Build the coreboot_ram (stage 2)
85
86 $(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/arch/i386/coreboot_ram.ld #ldoptions
87         @printf "    CC         $(subst $(obj)/,,$(@))\n"
88         $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/i386/coreboot_ram.ld $(obj)/coreboot_ram.o
89         $(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map
90
91 $(obj)/coreboot_ram.o: $(obj)/arch/i386/lib/c_start.o $$(drivers) $(obj)/coreboot.a $(LIBGCC_FILE_NAME)
92         @printf "    CC         $(subst $(obj)/,,$(@))\n"
93         $(CC) -nostdlib -r -o $@ $(obj)/arch/i386/lib/c_start.o $(drivers) -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,--end-group
94
95 $(obj)/coreboot.a: $$(objs)
96         @printf "    AR         $(subst $(obj)/,,$(@))\n"
97         rm -f $(obj)/coreboot.a
98         $(AR) cr $(obj)/coreboot.a $^
99
100 #######################################################################
101 # coreboot_ap.rom
102
103 ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
104
105 $(obj)/coreboot_ap: $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o
106         @printf "    CC         $(subst $(obj)/,,$(@))\n"
107         $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/i386/init/ldscript_apc.lb $^
108         $(NM) -n $(obj)/coreboot_ap | sort > $(obj)/coreboot_ap.map
109
110
111 endif
112
113 #######################################################################
114 # done
115
116 crt0s = $(src)/arch/i386/init/crt0_prologue.inc
117 ldscripts =
118 ldscripts += $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
119 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
120 crt0s += $(src)/cpu/x86/16bit/entry16.inc
121 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
122 endif
123 crt0s += $(src)/cpu/x86/32bit/entry32.inc
124 ldscripts += $(src)/cpu/x86/32bit/entry32.lds
125 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
126 crt0s += $(src)/cpu/x86/16bit/reset16.inc
127 ldscripts += $(src)/cpu/x86/16bit/reset16.lds
128 crt0s += $(src)/arch/i386/lib/id.inc
129 ldscripts += $(src)/arch/i386/lib/id.lds
130 endif
131
132 crt0s += $(src)/cpu/x86/fpu_enable.inc
133 ifeq ($(CONFIG_SSE),y)
134 crt0s += $(src)/cpu/x86/sse_enable.inc
135 endif
136
137 crt0s += $(cpu_incs)
138
139 #
140 # FIXME move to CPU_INTEL_SOCKET_MPGA604
141 #
142 ifeq ($(CONFIG_BOARD_TYAN_S2735),y)
143 crt0s += $(src)/cpu/intel/car/cache_as_ram.inc
144 endif
145
146 ifeq ($(CONFIG_LLSHELL),y)
147 crt0s += $(src)/arch/i386/llshell/llshell.inc
148 endif
149
150 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
151
152 ifeq ($(CONFIG_SSE),y)
153 crt0s += $(src)/cpu/x86/sse_disable.inc
154 endif
155 ifeq ($(CONFIG_MMX),y)
156 crt0s += $(src)/cpu/x86/mmx_disable.inc
157 endif
158
159 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
160 crt0s += $(chipset_bootblock_inc)
161 ldscripts += $(chipset_bootblock_lds)
162 endif
163
164 ifeq ($(CONFIG_ROMCC),y)
165 crt0s += $(src)/arch/i386/init/crt0_romcc_epilogue.inc
166 endif
167
168 OPTION_TABLE_H:=
169 ifeq ($(CONFIG_HAVE_OPTION_TABLE),y)
170 OPTION_TABLE_H:=$(obj)/option_table.h
171 endif
172
173 ifeq ($(CONFIG_ROMCC),y)
174 ROMCCFLAGS ?= -mcpu=p2 -O2
175
176 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
177         printf "    ROMCC      romstage.inc\n"
178         $(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $< -o $@
179 else
180
181 $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(OPTION_TABLE_H)
182         @printf "    CC         $(subst $(obj)/,,$(@))\n"
183         $(CC) -MMD $(CFLAGS) -I$(src) -I. -c $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c -o $@
184
185 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h
186         @printf "    CC         romstage.inc\n"
187         $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -c -S $< -o $@
188
189 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc
190         @printf "    POST       romstage.inc\n"
191         sed -e 's/\.rodata/.rom.data/g' -e 's/\.text/.section .rom.text/g' $^ > $@.tmp
192         mv $@.tmp $@
193 endif
194
195 # Things that appear in every board
196 initobjs += $(obj)/mainboard/$(MAINBOARDDIR)/crt0.o
197 objs += $(obj)/mainboard/$(MAINBOARDDIR)/mainboard.o
198 ifeq ($(CONFIG_GENERATE_MP_TABLE),y)
199 objs += $(obj)/mainboard/$(MAINBOARDDIR)/mptable.o
200 endif
201 ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y)
202 objs += $(obj)/mainboard/$(MAINBOARDDIR)/irq_tables.o
203 endif
204 ifeq ($(CONFIG_BOARD_HAS_HARD_RESET),y)
205 objs += $(obj)/mainboard/$(MAINBOARDDIR)/reset.o
206 endif
207 ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y)
208 objs += $(obj)/mainboard/$(MAINBOARDDIR)/acpi_tables.o
209 objs += $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o
210 # make doesn't have arithmetic operators or greater-than comparisons
211 ifeq ($(subst 5,4,$(CONFIG_ACPI_SSDTX_NUM)),4)
212 objs += $(obj)/mainboard/$(MAINBOARDDIR)/ssdt2.o
213 objs += $(obj)/mainboard/$(MAINBOARDDIR)/ssdt3.o
214 objs += $(obj)/mainboard/$(MAINBOARDDIR)/ssdt4.o
215 endif
216 ifeq ($(CONFIG_ACPI_SSDTX_NUM),5)
217 objs += $(obj)/mainboard/$(MAINBOARDDIR)/ssdt5.o
218 endif
219 ifeq ($(CONFIG_BOARD_HAS_FADT),y)
220 objs += $(obj)/mainboard/$(MAINBOARDDIR)/fadt.o
221 endif
222 endif
223
224 ifeq ($(CONFIG_HAVE_BUS_CONFIG),y)
225 objs += $(obj)/mainboard/$(MAINBOARDDIR)/get_bus_conf.o
226 endif
227
228 ifeq ($(CONFIG_TINY_BOOTBLOCK),y)
229 include $(src)/arch/i386/Makefile.bootblock.inc
230 else
231 include $(src)/arch/i386/Makefile.bigbootblock.inc
232 endif