src/arch/i386/Makefile.inc

   1 #######################################################################
   2 # Take care of subdirectories
   3 subdirs-y += boot
   4 # subdirs-y += init
   5 subdirs-y += lib
   6 subdirs-y += smp
   7
   8 obj-$(CONFIG_HAVE_OPTION_TABLE) += ../../option_table.o
   9
  10 ifdef POST_EVALUATION
  11
  12 #######################################################################
  13 # Build the final rom image
  14 COREBOOT_ROM_DEPENDENCIES:=
  15 ifneq ($(CONFIG_PAYLOAD_NONE),y)
  16 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_FALLBACK_PAYLOAD_FILE)
  17 endif
  18 ifeq ($(CONFIG_VGA_BIOS),y)
  19 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_FALLBACK_VGA_BIOS_FILE)
  20 endif
  21 ifeq ($(CONFIG_INTEL_MBI),y)
  22 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_FALLBACK_MBI_FILE)
  23 endif
  24 ifeq ($(CONFIG_BOOTSPLASH),y)
  25 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_FALLBACK_BOOTSPLASH_FILE)
  26 endif
  27 strip_quotes = $(subst ",,$(subst \",,$(1)))
  28 $(obj)/coreboot.rom: $(obj)/coreboot.pre $(obj)/coreboot_ram $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES))
  29         cp $(obj)/coreboot.pre $@.tmp
  30         if [ -f fallback/coreboot_apc ]; \
  31         then \
  32                 $(CBFSTOOL) $@.tmp add-stage fallback/coreboot_apc $(CONFIG_CBFS_PREFIX)/coreboot_apc $(CBFS_COMPRESS_FLAG); \
  33         fi
  34         $(CBFSTOOL) $@.tmp add-stage $(obj)/coreboot_ram $(CONFIG_CBFS_PREFIX)/coreboot_ram $(CBFS_COMPRESS_FLAG)
  35 ifeq ($(CONFIG_PAYLOAD_NONE),y)
  36         printf "    PAYLOAD    none (as specified by user)\n"
  37 else
  38         printf "    PAYLOAD    $(CONFIG_FALLBACK_PAYLOAD_FILE) $(CBFS_PAYLOAD_COMPRESS_FLAG)\n"
  39         $(CBFSTOOL) $@.tmp add-payload $(CONFIG_FALLBACK_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
  40 endif
  41 ifeq ($(CONFIG_VGA_BIOS),y)
  42         printf "    VGABIOS    $(CONFIG_FALLBACK_VGA_BIOS_FILE) $(CONFIG_FALLBACK_VGA_BIOS_ID)\n"
  43         $(CBFSTOOL) $@.tmp add $(CONFIG_FALLBACK_VGA_BIOS_FILE) "pci$(CONFIG_FALLBACK_VGA_BIOS_ID).rom" optionrom
  44 endif
  45 ifeq ($(CONFIG_INTEL_MBI),y)
  46         printf "    MBI        $(CONFIG_FALLBACK_MBI_FILE)\n"
  47         $(CBFSTOOL) $@.tmp add $(CONFIG_FALLBACK_MBI_FILE) mbi.bin mbi
  48 endif
  49 ifeq ($(CONFIG_BOOTSPLASH),y)
  50         printf "    BOOTSPLASH $(CONFIG_FALLBACK_BOOTSPLASH_FILE)\n"
  51         $(CBFSTOOL) $@.tmp add $(CONFIG_FALLBACK_BOOTSPLASH_FILE) bootsplash.jpg bootsplash
  52 endif
  53         mv $@.tmp $@
  54         printf "    CBFSPRINT  $(subst $(obj)/,,$(@))\n\n"
  55         $(CBFSTOOL) $@ print
  56
  57 #######################################################################
  58 # i386 specific tools
  59
  60 $(obj)/option_table.h $(obj)/option_table.c: $(obj)/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
  61         @printf "    OPTION     $(subst $(obj)/,,$(@))\n"
  62         $(obj)/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --header $(obj)/option_table.h --option $(obj)/option_table.c
  63
  64 $(obj)/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src/include/pc80/mc146818rtc.h $(top)/src/include/boot/coreboot_tables.h $(obj)/config.h
  65         @printf "    HOSTCC     $(subst $(obj)/,,$(@))\n"
  66         $(HOSTCC) $(HOSTCFLAGS) -include $(obj)/config.h $< -o $@
  67
  68 #######################################################################
  69 # Build the coreboot_ram (stage 2)
  70
  71 $(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/arch/i386/coreboot_ram.ld #ldoptions
  72         @printf "    CC         $(subst $(obj)/,,$(@))\n"
  73         $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/i386/coreboot_ram.ld $(obj)/coreboot_ram.o
  74         $(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map
  75
  76 $(obj)/coreboot_ram.o: $(obj)/arch/i386/lib/c_start.o $(drivers) $(obj)/coreboot.a $(LIBGCC_FILE_NAME)
  77         @printf "    CC         $(subst $(obj)/,,$(@))\n"
  78         $(CC) -nostdlib -r -o $@ $(obj)/arch/i386/lib/c_start.o $(drivers) -Wl,--start-group $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,--end-group
  79
  80 $(obj)/coreboot.a: $(objs)
  81         @printf "    AR         $(subst $(obj)/,,$(@))\n"
  82         rm -f $(obj)/coreboot.a
  83         $(AR) cr $(obj)/coreboot.a $(objs)
  84
  85 #######################################################################
  86 # done
  87
  88 crt0s :=
  89 ldscripts :=
  90 ldscripts += $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
  91 ldscripts += $(src)/arch/i386/lib/failover.lds
  92 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
  93 crt0s += $(src)/cpu/x86/16bit/entry16.inc
  94 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
  95 endif
  96 crt0s += $(src)/cpu/x86/32bit/entry32.inc
  97 ldscripts += $(src)/cpu/x86/32bit/entry32.lds
  98 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
  99 crt0s += $(src)/cpu/x86/16bit/reset16.inc
 100 ldscripts += $(src)/cpu/x86/16bit/reset16.lds
 101 ifeq ($(CONFIG_ROMCC),y)
 102 crt0s += $(src)/arch/i386/lib/cpu_reset.inc
 103 endif
 104 crt0s += $(src)/arch/i386/lib/id.inc
 105 ldscripts += $(src)/arch/i386/lib/id.lds
 106 endif
 107
 108 crt0s += $(src)/cpu/x86/fpu_enable.inc
 109 ifeq ($(CONFIG_CPU_AMD_GX1),y)
 110 crt0s += $(src)/cpu/amd/model_gx1/cpu_setup.inc
 111 crt0s += $(src)/cpu/amd/model_gx1/gx_setup.inc
 112 endif
 113 ifeq ($(CONFIG_SSE),y)
 114 crt0s += $(src)/cpu/x86/sse_enable.inc
 115 endif
 116
 117 ifeq ($(CONFIG_CPU_AMD_LX),y)
 118 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
 119 endif
 120 ifeq ($(CONFIG_CPU_AMD_SOCKET_F),y)
 121 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
 122 endif
 123 ifeq ($(CONFIG_CPU_AMD_SOCKET_F_1207),y)
 124 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
 125 endif
 126 ifeq ($(CONFIG_CPU_AMD_SOCKET_AM2R2),y)
 127 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
 128 endif
 129 ifeq ($(CONFIG_CPU_AMD_SOCKET_AM2),y)
 130 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
 131 endif
 132 ifeq ($(CONFIG_CPU_AMD_SOCKET_S1G1),y)
 133 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
 134 endif
 135 ifeq ($(CONFIG_CPU_AMD_SOCKET_754),y)
 136 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
 137 endif
 138 ifeq ($(CONFIG_CPU_AMD_SOCKET_939),y)
 139 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
 140 endif
 141 ifeq ($(CONFIG_CPU_AMD_SOCKET_940),y)
 142 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
 143 endif
 144 ifeq ($(CONFIG_CPU_INTEL_CORE),y)
 145 crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
 146 endif
 147 # Use Intel Core (not Core 2) code for CAR init, any CPU might be used.
 148 ifeq ($(CONFIG_CPU_INTEL_SOCKET_BGA956),y)
 149 crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
 150 endif
 151 # should be CONFIG_CPU_VIA_C7, but bcom/winnetp680, jetway/j7f24, via/epia-cn, via/pc2500e don't use CAR yet
 152 ifeq ($(CONFIG_BOARD_VIA_VT8454C),y)
 153 crt0s += $(src)/cpu/via/car/cache_as_ram.inc
 154 endif
 155 ifeq ($(CONFIG_BOARD_VIA_EPIA_M700),y)
 156 crt0s += $(src)/cpu/via/car/cache_as_ram.inc
 157 endif
 158 # who else could use this?
 159 ifeq ($(CONFIG_BOARD_TYAN_S2735),y)
 160 crt0s += $(src)/cpu/x86/car/cache_as_ram.inc
 161 ldscripts += $(src)/cpu/x86/car/cache_as_ram.lds
 162 endif
 163
 164 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
 165 ifeq ($(CONFIG_ROMCC),y)
 166 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/failover.inc
 167 endif
 168 endif
 169
 170 ifeq ($(CONFIG_LLSHELL),y)
 171 crt0s += $(src)/arch/i386/llshell/llshell.inc
 172 endif
 173
 174 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 175
 176 ifeq ($(CONFIG_SSE),y)
 177 crt0s += $(src)/cpu/x86/sse_disable.inc
 178 endif
 179 ifeq ($(CONFIG_MMX),y)
 180 crt0s += $(src)/cpu/x86/mmx_disable.inc
 181 endif
 182
 183 ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
 184 ldscripts += $(src)/arch/i386/init/ldscript_apc.lb
 185 endif
 186
 187 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
 188 crt0s += $(chipset_bootblock_inc)
 189 ldscripts += $(chipset_bootblock_lds)
 190 endif
 191
 192 OPTION_TABLE_H:=
 193 ifeq ($(CONFIG_HAVE_OPTION_TABLE),y)
 194 OPTION_TABLE_H:=$(obj)/option_table.h
 195 endif
 196
 197 ifeq ($(CONFIG_ROMCC),y)
 198 ROMCCFLAGS ?= -mcpu=p2 -O2
 199
 200 $(obj)/mainboard/$(MAINBOARDDIR)/failover.inc: $(obj)/romcc $(src)/arch/i386/lib/failover.c
 201         printf "    ROMCC      failover.inc\n"
 202         $(obj)/romcc $(ROMCCFLAGS) --label-prefix=failover $(INCLUDES) $(src)/arch/i386/lib/failover.c -o $@
 203
 204 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/romcc $(OPTION_TABLE_H) $(obj)/build.h
 205         printf "    ROMCC      romstage.inc\n"
 206         $(obj)/romcc $(ROMCCFLAGS) -include $(obj)/build.h $(INCLUDES) $< -o $@
 207
 208 else
 209
 210 $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(obj)/option_table.h
 211         $(CC) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c -o $@
 212
 213 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h
 214         printf "    GEN        romstage.inc\n"
 215         $(CC) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -include $(obj)/build.h -I$(src) -I. -c -S $< -o $@.tmp1
 216         sed -e 's/\.rodata/.rom.data/g' -e 's/\.text/.section .rom.text/g' $@.tmp1 > $@.tmp
 217         mv $@.tmp $@
 218         rm -f $@.tmp1
 219 endif
 220
 221 else
 222 # Only in first pass
 223
 224 # Things that appear in every board
 225 initobjs += $(obj)/mainboard/$(MAINBOARDDIR)/crt0.o
 226 objs += $(obj)/mainboard/$(MAINBOARDDIR)/mainboard.o
 227 ifeq ($(CONFIG_GENERATE_MP_TABLE),y)
 228 objs += $(obj)/mainboard/$(MAINBOARDDIR)/mptable.o
 229 endif
 230 ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y)
 231 objs += $(obj)/mainboard/$(MAINBOARDDIR)/irq_tables.o
 232 endif
 233 ifeq ($(CONFIG_BOARD_HAS_HARD_RESET),y)
 234 objs += $(obj)/mainboard/$(MAINBOARDDIR)/reset.o
 235 endif
 236 ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y)
 237 objs += $(obj)/mainboard/$(MAINBOARDDIR)/acpi_tables.o
 238 objs += $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o
 239 # make doesn't have arithmetic operators or greater-than comparisons
 240 ifeq ($(subst 5,4,$(CONFIG_ACPI_SSDTX_NUM)),4)
 241 objs += $(obj)/mainboard/$(MAINBOARDDIR)/ssdt2.o
 242 objs += $(obj)/mainboard/$(MAINBOARDDIR)/ssdt3.o
 243 objs += $(obj)/mainboard/$(MAINBOARDDIR)/ssdt4.o
 244 endif
 245 ifeq ($(CONFIG_ACPI_SSDTX_NUM),5)
 246 objs += $(obj)/mainboard/$(MAINBOARDDIR)/ssdt5.o
 247 endif
 248 ifeq ($(CONFIG_BOARD_HAS_FADT),y)
 249 objs += $(obj)/mainboard/$(MAINBOARDDIR)/fadt.o
 250 endif
 251 endif
 252
 253 ifeq ($(CONFIG_HAVE_BUS_CONFIG),y)
 254 objs += $(obj)/mainboard/$(MAINBOARDDIR)/get_bus_conf.o
 255 endif
 256
 257 endif
 258
 259 ifeq ($(CONFIG_TINY_BOOTBLOCK),y)
 260 include $(src)/arch/i386/Makefile.bootblock.inc
 261 else
 262 include $(src)/arch/i386/Makefile.bigbootblock.inc
 263 endif