1 #######################################################################
2 # Take care of subdirectories
8 obj-$(CONFIG_HAVE_OPTION_TABLE) += ../../option_table.o
12 #######################################################################
13 # Build the final rom image
14 $(obj)/coreboot.rom: $(obj)/coreboot.pre $(obj)/coreboot_ram $(CBFSTOOL)
15 cp $(obj)/coreboot.pre $@
16 if [ -f fallback/coreboot_apc ]; \
18 $(CBFSTOOL) $@ add-stage fallback/coreboot_apc $(CONFIG_CBFS_PREFIX)/coreboot_apc $(CBFS_COMPRESS_FLAG); \
20 $(CBFSTOOL) $@ add-stage $(obj)/coreboot_ram $(CONFIG_CBFS_PREFIX)/coreboot_ram $(CBFS_COMPRESS_FLAG)
21 ifeq ($(CONFIG_PAYLOAD_NONE),y)
22 @printf " PAYLOAD none (as specified by user)\n"
24 @printf " PAYLOAD $(CONFIG_FALLBACK_PAYLOAD_FILE) $(CBFS_PAYLOAD_COMPRESS_FLAG)\n"
25 $(CBFSTOOL) $(obj)/coreboot.rom add-payload $(CONFIG_FALLBACK_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
27 ifeq ($(CONFIG_VGA_BIOS),y)
28 @printf " VGABIOS $(CONFIG_FALLBACK_VGA_BIOS_FILE) $(CONFIG_FALLBACK_VGA_BIOS_ID)\n"
29 $(CBFSTOOL) $(obj)/coreboot.rom add $(CONFIG_FALLBACK_VGA_BIOS_FILE) "pci$(CONFIG_FALLBACK_VGA_BIOS_ID).rom" optionrom
31 @printf " CBFSPRINT $(subst $(obj)/,,$(@))\n\n"
32 $(CBFSTOOL) $(obj)/coreboot.rom print
34 #######################################################################
37 $(obj)/option_table.h $(obj)/option_table.c $(obj)/arch/i386/../../option_table.c: $(obj)/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
38 @printf " OPTION $(subst $(obj)/,,$(@))\n"
39 $(obj)/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --header $(obj)/option_table.h --option $(obj)/option_table.c
41 $(obj)/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src/include/pc80/mc146818rtc.h $(top)/src/include/boot/coreboot_tables.h $(obj)/config.h
42 @printf " HOSTCC $(subst $(obj)/,,$(@))\n"
43 $(HOSTCC) $(HOSTCFLAGS) -include $(obj)/config.h $< -o $@
45 #######################################################################
46 # Build the coreboot_ram (stage 2)
48 $(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/arch/i386/coreboot_ram.ld #ldoptions
49 @printf " CC $(subst $(obj)/,,$(@))\n"
50 $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/i386/coreboot_ram.ld $(obj)/coreboot_ram.o
51 $(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map
53 $(obj)/coreboot_ram.o: $(obj)/arch/i386/lib/c_start.o $(drivers) $(obj)/coreboot.a $(LIBGCC_FILE_NAME)
54 @printf " CC $(subst $(obj)/,,$(@))\n"
55 $(CC) -nostdlib -r -o $@ $(obj)/arch/i386/lib/c_start.o $(drivers) -Wl,-\( $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,-\)
57 $(obj)/coreboot.a: $(objs)
58 @printf " AR $(subst $(obj)/,,$(@))\n"
59 rm -f $(obj)/coreboot.a
60 $(AR) cr $(obj)/coreboot.a $(objs)
62 #######################################################################
65 # crt0s should be set by now
67 $(error crt0s are empty. If your board still uses crt0-y and ldscript-y: It shouldn't, we moved away from that in r5065)
71 ifeq ($(CONFIG_HAVE_OPTION_TABLE),y)
72 OPTION_TABLE_H:=$(obj)/option_table.h
75 ifeq ($(CONFIG_ROMCC),y)
76 ROMCCFLAGS ?= -mcpu=p2 -O2
78 $(obj)/mainboard/$(MAINBOARDDIR)/failover.inc: $(obj)/romcc $(src)/arch/i386/lib/failover.c
79 $(obj)/romcc $(ROMCCFLAGS) --label-prefix=failover $(INCLUDES) $(src)/arch/i386/lib/failover.c -o $@
81 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/romcc $(OPTION_TABLE_H) $(obj)/build.h
82 $(obj)/romcc $(ROMCCFLAGS) $(INCLUDES) $< -o $@
85 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h
86 $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $< -o - | sed -e 's/\.rodata/.rom.data/g' -e 's/\.text/.section .rom.text/g' > $@.tmp
91 ifeq ($(CONFIG_TINY_BOOTBLOCK),y)
92 include $(src)/arch/i386/Makefile.tinybootblock.inc
94 include $(src)/arch/i386/Makefile.bigbootblock.inc