Two hda_verb.h files: Add more comments.
[coreboot.git] / src / arch / i386 / Makefile.inc
1 ##
2 ## This file is part of the coreboot project.
3 ##
4 ## Copyright (C) 2009-2010 coresystems GmbH
5 ## Copyright (C) 2009 Ronald G. Minnich
6 ##
7 ## This program is free software; you can redistribute it and/or modify
8 ## it under the terms of the GNU General Public License as published by
9 ## the Free Software Foundation; version 2 of the License.
10 ##
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14 ## GNU General Public License for more details.
15 ##
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, write to the Free Software
18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
19 ##
20
21 #######################################################################
22 # Take care of subdirectories
23 subdirs-y += boot
24 # subdirs-y += init
25 subdirs-y += lib
26 subdirs-y += smp
27
28 OPTION_TABLE_H:=
29 ifeq ($(CONFIG_HAVE_OPTION_TABLE),y)
30 ramstage-srcs += $(obj)/option_table.c
31 OPTION_TABLE_H:=$(obj)/option_table.h
32 endif
33
34 #######################################################################
35 # Build the final rom image
36 COREBOOT_ROM_DEPENDENCIES:=
37 ifneq ($(CONFIG_PAYLOAD_NONE),y)
38 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_FALLBACK_PAYLOAD_FILE)
39 endif
40 ifeq ($(CONFIG_VGA_BIOS),y)
41 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_FALLBACK_VGA_BIOS_FILE)
42 endif
43 ifeq ($(CONFIG_INTEL_MBI),y)
44 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_FALLBACK_MBI_FILE)
45 endif
46 ifeq ($(CONFIG_BOOTSPLASH),y)
47 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_FALLBACK_BOOTSPLASH_FILE)
48 endif
49 ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
50 COREBOOT_ROM_DEPENDENCIES+=$(obj)/coreboot_ap
51 endif
52 ifeq ($(CONFIG_GEODE_VSA_FILE),y)
53 COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_VSA_FILENAME)
54 endif
55
56 $(obj)/coreboot.rom: $(obj)/coreboot.pre $(obj)/coreboot_ram $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES))
57         @printf "    CBFS       $(subst $(obj)/,,$(@))\n"
58         cp $(obj)/coreboot.pre $@.tmp
59         if [ -f $(obj)/coreboot_ap ]; \
60         then \
61                 $(CBFSTOOL) $@.tmp add-stage $(obj)/coreboot_ap $(CONFIG_CBFS_PREFIX)/coreboot_ap $(CBFS_COMPRESS_FLAG); \
62         fi
63         $(CBFSTOOL) $@.tmp add-stage $(obj)/coreboot_ram $(CONFIG_CBFS_PREFIX)/coreboot_ram $(CBFS_COMPRESS_FLAG)
64 ifeq ($(CONFIG_PAYLOAD_NONE),y)
65         @printf "    PAYLOAD    \e[1;31mnone (as specified by user)\e[0m\n"
66 else
67         @printf "    PAYLOAD    $(CONFIG_FALLBACK_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n"
68         $(CBFSTOOL) $@.tmp add-payload $(CONFIG_FALLBACK_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG)
69 endif
70 ifeq ($(CONFIG_VGA_BIOS),y)
71         @printf "    VGABIOS    $(CONFIG_FALLBACK_VGA_BIOS_FILE) $(CONFIG_FALLBACK_VGA_BIOS_ID)\n"
72         $(CBFSTOOL) $@.tmp add $(CONFIG_FALLBACK_VGA_BIOS_FILE) "pci$(CONFIG_FALLBACK_VGA_BIOS_ID).rom" optionrom
73 endif
74 ifeq ($(CONFIG_INTEL_MBI),y)
75         @printf "    MBI        $(CONFIG_FALLBACK_MBI_FILE)\n"
76         $(CBFSTOOL) $@.tmp add $(CONFIG_FALLBACK_MBI_FILE) mbi.bin mbi
77 endif
78 ifeq ($(CONFIG_BOOTSPLASH),y)
79         @printf "    BOOTSPLASH $(CONFIG_FALLBACK_BOOTSPLASH_FILE)\n"
80         $(CBFSTOOL) $@.tmp add $(CONFIG_FALLBACK_BOOTSPLASH_FILE) bootsplash.jpg bootsplash
81 endif
82 ifeq ($(CONFIG_GEODE_VSA_FILE),y)
83         @printf "    VSA        $(CONFIG_VSA_FILENAME)\n"
84         $(OBJCOPY) --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 $(CONFIG_VSA_FILENAME) $(obj)/vsa.o
85         $(LD) -m elf_i386 -e 0x60020 --section-start .data=0x60000 $(obj)/vsa.o -o $(obj)/vsa.elf
86         $(CBFSTOOL) $@.tmp add-stage $(obj)/vsa.elf vsa
87 endif
88         mv $@.tmp $@
89         @printf "    CBFSPRINT  $(subst $(obj)/,,$(@))\n\n"
90         $(CBFSTOOL) $@ print
91
92 #######################################################################
93 # i386 specific tools
94
95 $(OPTION_TABLE_H): $(objutil)/options/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
96         @printf "    OPTION     $(subst $(obj)/,,$(@))\n"
97         $(objutil)/options/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --header $@
98
99 $(obj)/option_table.c: $(objutil)/options/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout
100         @printf "    OPTION     $(subst $(obj)/,,$(@))\n"
101         $(objutil)/options/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --option $@
102
103 $(objutil)/options/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src/include/pc80/mc146818rtc.h $(top)/src/include/boot/coreboot_tables.h
104         @printf "    HOSTCC     $(subst $(obj)/,,$(@))\n"
105         $(HOSTCC) $(HOSTCFLAGS) $< -o $@
106
107 #######################################################################
108 # Build the coreboot_ram (stage 2)
109
110 $(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/arch/i386/coreboot_ram.ld #ldoptions
111         @printf "    CC         $(subst $(obj)/,,$(@))\n"
112         $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/i386/coreboot_ram.ld $(obj)/coreboot_ram.o
113         $(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map
114         $(OBJCOPY) --only-keep-debug $@ $(obj)/coreboot_ram.debug
115         $(OBJCOPY) --strip-debug $@
116         $(OBJCOPY) --add-gnu-debuglink=$(obj)/coreboot_ram.debug $@
117
118 $(obj)/coreboot_ram.o: $(obj)/arch/i386/lib/c_start.ramstage.o $$(driver-objs) $(obj)/coreboot.a $(LIBGCC_FILE_NAME)
119         @printf "    CC         $(subst $(obj)/,,$(@))\n"
120         $(CC) -nostdlib -r -o $@ $(obj)/arch/i386/lib/c_start.ramstage.o $(driver-objs) -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,--end-group
121
122 $(obj)/coreboot.a: $$(ramstage-objs)
123         @printf "    AR         $(subst $(obj)/,,$(@))\n"
124         rm -f $(obj)/coreboot.a
125         $(AR) cr $(obj)/coreboot.a $^
126
127 #######################################################################
128 # coreboot_ap.rom
129
130 ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
131
132 $(obj)/coreboot_ap: $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o
133         @printf "    CC         $(subst $(obj)/,,$(@))\n"
134         $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/i386/init/ldscript_apc.lb $^
135         $(OBJCOPY) --only-keep-debug $@ $(obj)/coreboot_ap.debug
136         $(OBJCOPY) --strip-debug $@
137         $(OBJCOPY) --add-gnu-debuglink=$(obj)/coreboot_ap.debug $@
138         $(NM) -n $(obj)/coreboot_ap | sort > $(obj)/coreboot_ap.map
139
140
141 endif
142
143 #######################################################################
144 # done
145
146 crt0s = $(src)/arch/i386/init/prologue.inc
147 ldscripts =
148 ldscripts += $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
149 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
150 crt0s += $(src)/cpu/x86/16bit/entry16.inc
151 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
152 endif
153 crt0s += $(src)/cpu/x86/32bit/entry32.inc
154 ldscripts += $(src)/cpu/x86/32bit/entry32.lds
155 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
156 crt0s += $(src)/cpu/x86/16bit/reset16.inc
157 ldscripts += $(src)/cpu/x86/16bit/reset16.lds
158 crt0s += $(src)/arch/i386/lib/id.inc
159 ldscripts += $(src)/arch/i386/lib/id.lds
160 endif
161
162 crt0s += $(src)/cpu/x86/fpu_enable.inc
163 ifeq ($(CONFIG_SSE),y)
164 crt0s += $(src)/cpu/x86/sse_enable.inc
165 endif
166
167 crt0s += $(cpu_incs)
168
169 #
170 # FIXME move to CPU_INTEL_SOCKET_MPGA604
171 #
172 ifeq ($(CONFIG_BOARD_TYAN_S2735),y)
173 crt0s += $(src)/cpu/intel/car/cache_as_ram.inc
174 endif
175
176 ifeq ($(CONFIG_LLSHELL),y)
177 crt0s += $(src)/arch/i386/llshell/llshell.inc
178 endif
179
180 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
181
182 ifeq ($(CONFIG_SSE),y)
183 crt0s += $(src)/cpu/x86/sse_disable.inc
184 endif
185 ifeq ($(CONFIG_MMX),y)
186 crt0s += $(src)/cpu/x86/mmx_disable.inc
187 endif
188
189 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
190 crt0s += $(chipset_bootblock_inc)
191 ldscripts += $(chipset_bootblock_lds)
192 endif
193
194 ifeq ($(CONFIG_ROMCC),y)
195 crt0s += $(src)/arch/i386/init/crt0_romcc_epilogue.inc
196 endif
197
198 ifeq ($(CONFIG_ROMCC),y)
199 ROMCCFLAGS ?= -mcpu=p2 -O2
200
201 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
202         printf "    ROMCC      romstage.inc\n"
203         $(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $< -o $@
204 else
205
206 $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(OPTION_TABLE_H)
207         @printf "    CC         $(subst $(obj)/,,$(@))\n"
208         $(CC) -MMD $(CFLAGS) -I$(src) -I. -I$(obj) -c $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c -o $@
209
210 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h
211         @printf "    CC         romstage.inc\n"
212         $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
213
214 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc
215         @printf "    POST       romstage.inc\n"
216         sed -e 's/\.rodata/.rom.data/g' -e 's/\.text/.section .rom.text/g' $^ > $@.tmp
217         mv $@.tmp $@
218 endif
219
220 # Things that appear in every board
221 romstage-srcs += $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s
222 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mainboard.c
223 ifeq ($(CONFIG_GENERATE_MP_TABLE),y)
224 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mptable.c
225 endif
226 ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y)
227 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/irq_tables.c
228 endif
229 ifeq ($(CONFIG_BOARD_HAS_HARD_RESET),y)
230 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c
231 endif
232 ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y)
233 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c
234 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/dsdt.asl
235 # make doesn't have arithmetic operators or greater-than comparisons
236 ifeq ($(subst 5,4,$(CONFIG_ACPI_SSDTX_NUM)),4)
237 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt2.asl
238 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt3.asl
239 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt4.asl
240 endif
241 ifeq ($(CONFIG_ACPI_SSDTX_NUM),5)
242 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt5.asl
243 endif
244 ifeq ($(CONFIG_BOARD_HAS_FADT),y)
245 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/fadt.c
246 endif
247 endif
248
249 ifeq ($(CONFIG_HAVE_BUS_CONFIG),y)
250 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c
251 endif
252
253 ifeq ($(CONFIG_TINY_BOOTBLOCK),y)
254 include $(src)/arch/i386/Makefile.bootblock.inc
255 else
256 include $(src)/arch/i386/Makefile.bigbootblock.inc
257 endif