2 ## This file is part of the coreboot repair project.
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5 ## modification, are permitted provided that the following conditions
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28 mainmenu "Coreboot Configuration"
35 This allows you to select certain advanced configuration options.
37 Warning: Only enable this option if you really know what you are
38 doing! You have been warned!
41 string "Local version string"
43 Append an extra string to the end of the coreboot version.
45 This can be useful if, for instance, you want to append the
46 respective board's hostname or some other identifying string to
47 the coreboot version number, so that you can easily distinguish
48 boot logs of different boards from each other.
52 source src/mainboard/Kconfig
53 source src/arch/i386/Kconfig
54 source src/arch/ppc/Kconfig
55 source src/northbridge/Kconfig
56 source src/devices/Kconfig
57 source src/southbridge/Kconfig
58 source src/superio/Kconfig
59 source src/cpu/Kconfig
61 config PCI_BUS_SEGN_BITS
65 config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
69 config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
77 config AGP_APERTURE_SIZE
89 config LB_CKS_RANGE_START
93 config LB_CKS_RANGE_END
125 config USE_PRINTK_IN_CAR
129 config USE_OPTION_TABLE
137 config MMCONF_SUPPORT_DEFAULT
141 config MMCONF_SUPPORT
152 source src/console/Kconfig
154 config HAVE_ACPI_RESUME
158 config ACPI_SSDTX_NUM
162 config HAVE_FALLBACK_BOOT
166 config USE_FALLBACK_IMAGE
170 config HAVE_FAILOVER_BOOT
174 config USE_FAILOVER_IMAGE
178 config HAVE_HARD_RESET
182 config HAVE_INIT_TIMER
186 config HAVE_MAINBOARD_RESOURCES
194 config HAVE_OPTION_TABLE
198 This variable specifies whether a given board has a cmos.layout
199 file containing NVRAM/CMOS bit definitions.
200 It defaults to 'y' but can be changed to 'n' in mainboard/*/Kconfig.
206 config HAVE_SMI_HANDLER
210 config PCI_IO_CFG_EXT
221 config USE_WATCHDOG_ON_BOOT
229 Build board-specific VGA code.
234 Enable Unified Memory Architecture for graphics.
241 config HAVE_ACPI_TABLES
244 This variable specifies whether a given board has ACPI table support.
245 It is usually set in mainboard/*/Kconfig.
246 Whether or not the ACPI tables are actually generated by coreboot
247 is configurable by the user via GENERATE_ACPI_TABLES.
252 This variable specifies whether a given board has MP table support.
253 It is usually set in mainboard/*/Kconfig.
254 Whether or not the MP table is actually generated by coreboot
255 is configurable by the user via GENERATE_MP_TABLE.
257 config HAVE_PIRQ_TABLE
260 This variable specifies whether a given board has PIRQ table support.
261 It is usually set in mainboard/*/Kconfig.
262 Whether or not the PIRQ table is actually generated by coreboot
263 is configurable by the user via GENERATE_PIRQ_TABLE.
265 config HAVE_HIGH_TABLES
270 config HAVE_LOW_TABLES
274 config WRITE_HIGH_TABLES
275 bool "Write 'high' tables to avoid being overwritten in F segment"
276 depends on HAVE_HIGH_TABLES
280 bool "Generate Multiboot tables (for GRUB2)"
283 config GENERATE_ACPI_TABLES
284 depends on HAVE_ACPI_TABLES
285 bool "Generate ACPI tables"
288 Generate ACPI tables for this board.
292 config GENERATE_MP_TABLE
293 depends on HAVE_MP_TABLE
294 bool "Generate an MP table"
297 Generate an MP table (conforming to the Intel MultiProcessor
298 specification 1.4) for this board.
302 config GENERATE_PIRQ_TABLE
303 depends on HAVE_PIRQ_TABLE
304 bool "Generate a PIRQ table"
307 Generate a PIRQ table for this board.
316 prompt "Add a payload"
322 Select this option if you want to create an "empty" coreboot
323 ROM image for a certain mainboard, i.e. a coreboot ROM image
324 which does not yet contain a payload.
326 For such an image to be useful, you have to use 'cbfstool'
327 to add a payload to the ROM image later.
330 bool "An ELF executable payload"
332 Select this option if you have a payload image (an ELF file)
333 which coreboot should run as soon as the basic hardware
334 initialization is completed.
336 You will be able to specify the location and file name of the
341 config FALLBACK_PAYLOAD_FILE
342 string "Payload path and filename"
343 depends on PAYLOAD_ELF
344 default "payload.elf"
346 The path and filename of the ELF executable file to use as payload.
348 # TODO: Defined if no payload? Breaks build?
349 config COMPRESSED_PAYLOAD_LZMA
350 bool "Use LZMA compression for payloads"
352 depends on PAYLOAD_ELF
354 In order to reduce the size payloads take up in the ROM chip
355 coreboot can compress them using the LZMA algorithm.
357 config COMPRESSED_PAYLOAD_NRV2B
366 bool "Add a VGA BIOS image"
368 Select this option if you have a VGA BIOS image that you would
369 like to add to your ROM.
371 You will be able to specify the location and file name of the
374 config FALLBACK_VGA_BIOS_FILE
375 string "VGA BIOS path and filename"
377 default "vgabios.bin"
379 The path and filename of the file to use as VGA BIOS.
381 config FALLBACK_VGA_BIOS_ID
386 The comma-separated PCI vendor and device ID that would associate
387 your VGA BIOS to your video card.
391 In the above example 1106 is the PCI vendor ID (in hex, but without
392 the "0x" prefix) and 3230 specifies the PCI device ID of the
393 video card (also in hex, without "0x" prefix).
399 # TODO: Better help text and detailed instructions.
401 bool "GDB debugging support"
404 If enabled, you will be able to set breakpoints for gdb debugging.
405 See src/arch/i386/lib/c_start.S for details.
409 config LIFT_BSP_APIC_ID