2 ## This file is part of the coreboot repair project.
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5 ## modification, are permitted provided that the following conditions
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28 mainmenu "Coreboot Configuration"
33 string "Local version string"
35 Append an extra string to the end of the coreboot version.
37 This can be useful if, for instance, you want to append the
38 respective board's hostname or some other identifying string to
39 the coreboot version number, so that you can easily distinguish
40 boot logs of different boards from each other.
44 source src/mainboard/Kconfig
45 source src/arch/i386/Kconfig
46 source src/arch/ppc/Kconfig
47 source src/northbridge/Kconfig
48 source src/devices/Kconfig
49 source src/southbridge/Kconfig
50 source src/superio/Kconfig
51 source src/cpu/Kconfig
53 config PCI_BUS_SEGN_BITS
57 config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
61 config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
69 config AGP_APERTURE_SIZE
81 config LB_CKS_RANGE_START
85 config LB_CKS_RANGE_END
117 config USE_PRINTK_IN_CAR
121 config USE_OPTION_TABLE
129 config MMCONF_SUPPORT_DEFAULT
133 config MMCONF_SUPPORT
144 source src/console/Kconfig
146 config HAVE_ACPI_RESUME
150 config ACPI_SSDTX_NUM
154 config HAVE_FALLBACK_BOOT
158 config USE_FALLBACK_IMAGE
162 config HAVE_FAILOVER_BOOT
166 config USE_FAILOVER_IMAGE
170 config HAVE_HARD_RESET
174 config HAVE_INIT_TIMER
178 config HAVE_MAINBOARD_RESOURCES
186 config HAVE_OPTION_TABLE
190 This variable specifies whether a given board has a cmos.layout
191 file containing NVRAM/CMOS bit definitions.
192 It defaults to 'y' but can be changed to 'n' in mainboard/*/Kconfig.
198 config HAVE_SMI_HANDLER
202 config PCI_IO_CFG_EXT
213 config USE_WATCHDOG_ON_BOOT
221 Build board-specific VGA code.
226 Enable Unified Memory Architecture for graphics.
233 config HAVE_ACPI_TABLES
236 This variable specifies whether a given board has ACPI table support.
237 It is usually set in mainboard/*/Kconfig.
238 Whether or not the ACPI tables are actually generated by coreboot
239 is configurable by the user via GENERATE_ACPI_TABLES.
244 This variable specifies whether a given board has MP table support.
245 It is usually set in mainboard/*/Kconfig.
246 Whether or not the MP table is actually generated by coreboot
247 is configurable by the user via GENERATE_MP_TABLE.
249 config HAVE_PIRQ_TABLE
252 This variable specifies whether a given board has PIRQ table support.
253 It is usually set in mainboard/*/Kconfig.
254 Whether or not the PIRQ table is actually generated by coreboot
255 is configurable by the user via GENERATE_PIRQ_TABLE.
257 config HAVE_HIGH_TABLES
262 config HAVE_LOW_TABLES
266 config WRITE_HIGH_TABLES
267 bool "Write 'high' tables to avoid being overwritten in F segment"
268 depends on HAVE_HIGH_TABLES
272 bool "Generate Multiboot tables (for GRUB2)"
275 config GENERATE_ACPI_TABLES
276 depends on HAVE_ACPI_TABLES
277 bool "Generate ACPI tables"
280 Generate ACPI tables for this board.
284 config GENERATE_MP_TABLE
285 depends on HAVE_MP_TABLE
286 bool "Generate an MP table"
289 Generate an MP table (conforming to the Intel MultiProcessor
290 specification 1.4) for this board.
294 config GENERATE_PIRQ_TABLE
295 depends on HAVE_PIRQ_TABLE
296 bool "Generate a PIRQ table"
299 Generate a PIRQ table for this board.
308 prompt "Add a payload"
314 Select this option if you want to create an "empty" coreboot
315 ROM image for a certain mainboard, i.e. a coreboot ROM image
316 which does not yet contain a payload.
318 For such an image to be useful, you have to use 'cbfstool'
319 to add a payload to the ROM image later.
322 bool "An ELF executable payload"
324 Select this option if you have a payload image (an ELF file)
325 which coreboot should run as soon as the basic hardware
326 initialization is completed.
328 You will be able to specify the location and file name of the
333 config FALLBACK_PAYLOAD_FILE
334 string "Payload path and filename"
335 depends on PAYLOAD_ELF
336 default "payload.elf"
338 The path and filename of the ELF executable file to use as payload.
340 # TODO: Defined if no payload? Breaks build?
341 config COMPRESSED_PAYLOAD_LZMA
342 bool "Use LZMA compression for payloads"
344 depends on PAYLOAD_ELF
346 In order to reduce the size payloads take up in the ROM chip
347 coreboot can compress them using the LZMA algorithm.
349 config COMPRESSED_PAYLOAD_NRV2B
357 bool "Add a VGA BIOS image"
359 Select this option if you have a VGA BIOS image that you would
360 like to add to your ROM.
362 You will be able to specify the location and file name of the
365 config FALLBACK_VGA_BIOS_FILE
366 string "VGA BIOS path and filename"
368 default "vgabios.bin"
370 The path and filename of the file to use as VGA BIOS.
372 config FALLBACK_VGA_BIOS_ID
377 The comma-separated PCI vendor and device ID that would associate
378 your VGA BIOS to your video card.
382 In the above example 1106 is the PCI vendor ID (in hex, but without
383 the "0x" prefix) and 3230 specifies the PCI device ID of the
384 video card (also in hex, without "0x" prefix).
390 # TODO: Better help text and detailed instructions.
392 bool "GDB debugging support"
395 If enabled, you will be able to set breakpoints for gdb debugging.
396 See src/arch/i386/lib/c_start.S for details.