payloads/libpayload/drivers/usb/ehci.c

   1 /*
   2  * This file is part of the libpayload project.
   3  *
   4  * Copyright (C) 2010 coresystems GmbH
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  * 3. The name of the author may not be used to endorse or promote products
  15  *    derived from this software without specific prior written permission.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  27  * SUCH DAMAGE.
  28  */
  29
  30 #include <libpayload.h>
  31 #include "ehci.h"
  32 #include "ehci_private.h"
  33
  34 static void dump_td(u32 addr)
  35 {
  36         qtd_t *td = phys_to_virt(addr);
  37         debug("td at phys(%x): active: %x, halted: %x, data_buf_err: %x\n    babble: %x, xact_err: %x, missed_mframe: %x\n    splitxstate: %x, perr: %x\n\n",
  38                 addr, td->active, td->halted, td->data_buf_err, td->babble, td->xact_err, td->missed_mframe, td->splitxstate, td->perr);
  39         debug("-   cerr: %x, total_len: %x\n\n", td->cerr, td->total_len);
  40 }
  41
  42 static void ehci_start (hci_t *controller)
  43 {
  44         EHCI_INST(controller)->operation->rs = 1;
  45 }
  46
  47 static void ehci_stop (hci_t *controller)
  48 {
  49         EHCI_INST(controller)->operation->rs = 0;
  50 }
  51
  52 static void ehci_reset (hci_t *controller)
  53 {
  54
  55 }
  56
  57 static void ehci_shutdown (hci_t *controller)
  58 {
  59
  60 }
  61
  62 enum { EHCI_OUT=0, EHCI_IN=1, EHCI_SETUP=2 };
  63
  64 /* returns handled bytes */
  65 int fill_td(qtd_t *td, void* data, int datalen)
  66 {
  67         u32 total_len = 0;
  68         u32 page_minus_1 = 0;
  69
  70         u32 start = virt_to_phys(data);
  71         u32 page = start & ~4095;
  72         u32 offset = start & 4095;
  73         u32 page_len = 4096 - offset;
  74
  75         td->c_page = 0;
  76         td->bufptr0 = page;
  77         td->cur_off = offset;
  78
  79         if (datalen <= page_len) {
  80                 total_len = datalen;
  81         } else {
  82                 datalen -= page_len;
  83                 total_len += page_len;
  84
  85                 do {
  86                         /* we have a continguous mapping between virtual and physical memory */
  87                         page += 4096;
  88
  89                         td->bufptrs[page_minus_1] = page;
  90                         if (datalen <= 4096) {
  91                                 total_len += datalen;
  92                                 break;
  93                         }
  94                         page_minus_1++;
  95                         datalen -= 4096;
  96                         total_len += 4096;
  97                 } while (page_minus_1<4);
  98         }
  99         td->total_len = total_len;
 100         return total_len;
 101 }
 102
 103 /* free up data structures */
 104 void free_qh_and_tds(ehci_qh_t *qh, qtd_t *cur)
 105 {
 106         qtd_t *next;
 107         while (cur) {
 108                 next = (qtd_t*)phys_to_virt(cur->next_qtd & ~31);
 109                 free(cur);
 110                 cur = next;
 111         }
 112         free(qh);
 113 }
 114
 115 int wait_for_tds(qtd_t *head)
 116 {
 117         int result = 0;
 118         qtd_t *cur = head;
 119         while (1) {
 120                 if (0) dump_td(virt_to_phys(cur));
 121                 while (cur->active && !cur->halted) udelay(60);
 122                 if (cur->halted) {
 123                         printf("ERROR with packet\n");
 124                         dump_td(virt_to_phys(cur));
 125                         debug("-----------------\n");
 126                         return 1;
 127                 }
 128                 if (cur->next_qtd & 1) {
 129                         return 0;
 130                 }
 131                 if (0) dump_td(virt_to_phys(cur));
 132                 /* helps debugging the TD chain */
 133                 if (0) debug("\nmoving from %x to %x\n", cur, phys_to_virt(cur->next_qtd));
 134                 cur = phys_to_virt(cur->next_qtd);
 135         }
 136         return result;
 137 }
 138
 139 static int ehci_bulk (endpoint_t *ep, int size, u8 *data, int finalize)
 140 {
 141         int result = 0;
 142         int endp = ep->endpoint & 0xf;
 143         int pid = (ep->direction==IN)?EHCI_IN:EHCI_OUT;
 144
 145         qtd_t *head = memalign(32, sizeof(qtd_t));
 146         qtd_t *cur = head;
 147         while (1) {
 148                 memset(cur, 0, sizeof(qtd_t));
 149                 cur->active = 1;
 150                 cur->pid = pid;
 151                 cur->cerr = 0;
 152                 u32 chunk = fill_td(cur, data, size);
 153                 size -= chunk;
 154                 data += chunk;
 155
 156                 cur->alt_terminate = 1;
 157                 if (size == 0) {
 158                         cur->next_qtd = virt_to_phys(0);
 159                         cur->terminate = 1;
 160                         break;
 161                 } else {
 162                         qtd_t *next = memalign(32, sizeof(qtd_t));
 163                         cur->next_qtd = virt_to_phys(next);
 164                         cur = next;
 165                 }
 166         }
 167
 168         /* create QH */
 169         ehci_qh_t *qh = memalign(32, sizeof(ehci_qh_t));
 170         memset(qh, 0, sizeof(ehci_qh_t));
 171         qh->horiz_link_ptr = virt_to_phys(qh);
 172         qh->type = 1; // FIXME: proper symbols for type. this is QH
 173         qh->addr = ep->dev->address;
 174         qh->ep = endp;
 175         qh->eps = ep->dev->speed;
 176         qh->dtc = 0;
 177         qh->reclaim_head = 1;
 178         qh->max_packet_len = ep->maxpacketsize;
 179         qh->nak_cnt_reload = 0;
 180         qh->pipe_multiplier = 3;
 181
 182         qh->td.next_qtd = virt_to_phys(head);
 183         qh->td.dt = ep->toggle;
 184         head->dt = ep->toggle;
 185
 186         /* hook up QH */
 187         EHCI_INST(ep->dev->controller)->operation->asynclistaddr = virt_to_phys(qh);
 188
 189         /* start async schedule */
 190         EHCI_INST(ep->dev->controller)->operation->async_sched_enable = 1;
 191         while (!EHCI_INST(ep->dev->controller)->operation->async_sched_status) ; /* wait */
 192
 193         /* wait for result */
 194         result = wait_for_tds(head);
 195
 196         /* disable async schedule */
 197         EHCI_INST(ep->dev->controller)->operation->async_sched_enable = 0;
 198         while (EHCI_INST(ep->dev->controller)->operation->async_sched_status) ; /* wait */
 199
 200         ep->toggle = cur->dt;
 201
 202         free_qh_and_tds(qh, head);
 203         return result;
 204 }
 205
 206
 207 /* FIXME: Handle control transfers as 3 QHs, so the 2nd stage can be >0x4000 bytes */
 208 static int ehci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq,
 209                          int dalen, u8 *data)
 210 {
 211         int endp = 0; // this is control. always 0 (for now)
 212         int toggle = 0;
 213         int mlen = dev->endpoints[0].maxpacketsize;
 214         int result = 0;
 215
 216         /* create qTDs */
 217         qtd_t *head = memalign(32, sizeof(qtd_t));
 218         qtd_t *cur = head;
 219         memset(cur, 0, sizeof(qtd_t));
 220         cur->active = 1;
 221         cur->dt = toggle;
 222         cur->pid = EHCI_SETUP;
 223         cur->cerr = 3;
 224         if (fill_td(cur, devreq, drlen) != drlen) {
 225                 printf("ERROR: couldn't send the entire device request\n");
 226         }
 227         qtd_t *next = memalign(32, sizeof(qtd_t));
 228         cur->next_qtd = virt_to_phys(next);
 229         cur->alt_terminate = 1;
 230
 231         /* FIXME: We're limited to 16-20K (depending on alignment) for payload for now.
 232          * Figure out, how toggle can be set sensibly in this scenario */
 233         if (dalen > 0) {
 234                 toggle ^= 1;
 235                 cur = next;
 236                 memset(cur, 0, sizeof(qtd_t));
 237                 cur->active = 1;
 238                 cur->dt = toggle;
 239                 cur->pid = (dir == OUT)?EHCI_OUT:EHCI_IN;
 240                 cur->cerr = 3;
 241                 if (fill_td(cur, data, dalen) != dalen) {
 242                         printf("ERROR: couldn't send the entire control payload\n");
 243                 }
 244                 next = memalign(32, sizeof(qtd_t));
 245                 cur->next_qtd = virt_to_phys(next);
 246                 cur->alt_terminate = 1;
 247         }
 248
 249         toggle = 1;
 250         cur = next;
 251         memset(cur, 0, sizeof(qtd_t));
 252         cur->active = 1;
 253         cur->dt = toggle;
 254         cur->pid = (dir == OUT)?EHCI_IN:EHCI_OUT;
 255         cur->cerr = 0;
 256         fill_td(cur, NULL, 0);
 257         cur->next_qtd = virt_to_phys(0);
 258         cur->terminate = 1;
 259         cur->alt_terminate = 1;
 260
 261         /* create QH */
 262         ehci_qh_t *qh = memalign(32, sizeof(ehci_qh_t));
 263         memset(qh, 0, sizeof(ehci_qh_t));
 264         qh->horiz_link_ptr = virt_to_phys(qh);
 265         qh->type = 1; // FIXME: proper symbols for type. this is QH
 266         qh->addr = dev->address;
 267         qh->ep = endp;
 268         qh->eps = dev->speed;
 269         qh->dtc = 1; /* Take data toggle from TD, as control transfers are special */
 270         qh->reclaim_head = 1;
 271         qh->max_packet_len = mlen;
 272         qh->non_hs_control_ep = 0; // no support for non-HS devices at this time
 273         qh->nak_cnt_reload = 0;
 274         qh->pipe_multiplier = 3;
 275         qh->td.next_qtd = virt_to_phys(head);
 276
 277         /* hook up QH */
 278         EHCI_INST(dev->controller)->operation->asynclistaddr = virt_to_phys(qh);
 279
 280         /* start async schedule */
 281         EHCI_INST(dev->controller)->operation->async_sched_enable = 1;
 282         while (!EHCI_INST(dev->controller)->operation->async_sched_status) ; /* wait */
 283
 284         result = wait_for_tds(head);
 285
 286         /* disable async schedule */
 287         EHCI_INST(dev->controller)->operation->async_sched_enable = 0;
 288         while (EHCI_INST(dev->controller)->operation->async_sched_status) ; /* wait */
 289
 290         free_qh_and_tds(qh, head);
 291         return result;
 292 }
 293
 294 static void* ehci_create_intr_queue (endpoint_t *ep, int reqsize, int reqcount, int reqtiming)
 295 {
 296         return NULL;
 297 }
 298
 299 static void ehci_destroy_intr_queue (endpoint_t *ep, void *queue)
 300 {
 301 }
 302
 303 static u8* ehci_poll_intr_queue (void *queue)
 304 {
 305         return NULL;
 306 }
 307
 308 hci_t *
 309 ehci_init (pcidev_t addr)
 310 {
 311         int i;
 312         hci_t *controller = new_controller ();
 313
 314         if (!controller)
 315                 usb_fatal("Could not create USB controller instance.\n");
 316
 317         controller->instance = malloc (sizeof (ehci_t));
 318         if(!controller->instance)
 319                 usb_fatal("Not enough memory creating USB controller instance.\n");
 320
 321 #define PCI_COMMAND 4
 322 #define PCI_COMMAND_IO 1
 323 #define PCI_COMMAND_MEMORY 2
 324 #define PCI_COMMAND_MASTER 4
 325
 326         u32 pci_command = pci_read_config32(addr, PCI_COMMAND);
 327         pci_command = (pci_command | PCI_COMMAND_MEMORY) & ~PCI_COMMAND_IO ;
 328         pci_write_config32(addr, PCI_COMMAND, pci_command);
 329
 330         controller->start = ehci_start;
 331         controller->stop = ehci_stop;
 332         controller->reset = ehci_reset;
 333         controller->shutdown = ehci_shutdown;
 334         controller->bulk = ehci_bulk;
 335         controller->control = ehci_control;
 336         controller->create_intr_queue = ehci_create_intr_queue;
 337         controller->destroy_intr_queue = ehci_destroy_intr_queue;
 338         controller->poll_intr_queue = ehci_poll_intr_queue;
 339         controller->bus_address = addr;
 340         for (i = 0; i < 128; i++) {
 341                 controller->devices[i] = 0;
 342         }
 343         init_device_entry (controller, 0);
 344
 345         EHCI_INST(controller)->capabilities = phys_to_virt(pci_read_config32(addr, USBBASE));
 346         EHCI_INST(controller)->operation = (hc_op_t *)(phys_to_virt(pci_read_config32(addr, USBBASE)) + EHCI_INST(controller)->capabilities->caplength);
 347
 348         /* default value for frame length adjust */
 349         pci_write_config8(addr, FLADJ, FLADJ_framelength(60000));
 350
 351         /* Enable operation of controller */
 352         controller->start(controller);
 353
 354         /* take over all ports. USB1 should be blind now */
 355         EHCI_INST(controller)->operation->configflag = 1;
 356
 357         /* TODO lots of stuff missing */
 358
 359         controller->devices[0]->controller = controller;
 360         controller->devices[0]->init = ehci_rh_init;
 361         controller->devices[0]->init (controller->devices[0]);
 362
 363         return controller;
 364 }