payloads/libpayload/drivers/usb/ehci.c

   1 /*
   2  * This file is part of the libpayload project.
   3  *
   4  * Copyright (C) 2010 coresystems GmbH
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  * 3. The name of the author may not be used to endorse or promote products
  15  *    derived from this software without specific prior written permission.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  27  * SUCH DAMAGE.
  28  */
  29
  30 #include <libpayload.h>
  31 #include "ehci.h"
  32 #include "ehci_private.h"
  33
  34 static void dump_td(u32 addr)
  35 {
  36         qtd_t *td = phys_to_virt(addr);
  37         debug("td at phys(%x): status: %x\n\n", addr, td->token & QTD_STATUS_MASK);
  38         debug("-   cerr: %x, total_len: %x\n\n", (td->token & QTD_CERR_MASK) >> QTD_CERR_SHIFT,
  39                 (td->token & QTD_TOTAL_LEN_MASK) >> QTD_TOTAL_LEN_SHIFT);
  40 }
  41
  42 static void ehci_start (hci_t *controller)
  43 {
  44         EHCI_INST(controller)->operation->usbcmd |= HC_OP_RS;
  45 }
  46
  47 static void ehci_stop (hci_t *controller)
  48 {
  49         EHCI_INST(controller)->operation->usbcmd &= ~HC_OP_RS;
  50 }
  51
  52 static void ehci_reset (hci_t *controller)
  53 {
  54
  55 }
  56
  57 static void ehci_shutdown (hci_t *controller)
  58 {
  59         EHCI_INST(controller)->operation->configflag = 0;
  60 }
  61
  62 enum { EHCI_OUT=0, EHCI_IN=1, EHCI_SETUP=2 };
  63
  64 /* returns handled bytes. assumes that the fields it writes are empty on entry */
  65 static int fill_td(qtd_t *td, void* data, int datalen)
  66 {
  67         u32 total_len = 0;
  68         u32 page_no = 0;
  69
  70         u32 start = virt_to_phys(data);
  71         u32 page = start & ~4095;
  72         u32 offset = start & 4095;
  73         u32 page_len = 4096 - offset;
  74
  75         td->token |= 0 << QTD_CPAGE_SHIFT;
  76         td->bufptrs[page_no++] = start;
  77
  78         if (datalen <= page_len) {
  79                 total_len = datalen;
  80         } else {
  81                 datalen -= page_len;
  82                 total_len += page_len;
  83
  84                 while (page_no < 5) {
  85                         /* we have a continguous mapping between virtual and physical memory */
  86                         page += 4096;
  87
  88                         td->bufptrs[page_no++] = page;
  89                         if (datalen <= 4096) {
  90                                 total_len += datalen;
  91                                 break;
  92                         }
  93                         datalen -= 4096;
  94                         total_len += 4096;
  95                 }
  96         }
  97         td->token |= total_len << QTD_TOTAL_LEN_SHIFT;
  98         return total_len;
  99 }
 100
 101 /* free up data structures */
 102 static void free_qh_and_tds(ehci_qh_t *qh, qtd_t *cur)
 103 {
 104         qtd_t *next;
 105         while (cur) {
 106                 next = (qtd_t*)phys_to_virt(cur->next_qtd & ~31);
 107                 free(cur);
 108                 cur = next;
 109         }
 110         free(qh);
 111 }
 112
 113 static int wait_for_tds(qtd_t *head)
 114 {
 115         int result = 0;
 116         qtd_t *cur = head;
 117         while (1) {
 118                 if (0) dump_td(virt_to_phys(cur));
 119                 while ((cur->token & QTD_ACTIVE) && !(cur->token & QTD_HALTED)) udelay(60);
 120                 if (cur->token & QTD_HALTED) {
 121                         printf("ERROR with packet\n");
 122                         dump_td(virt_to_phys(cur));
 123                         debug("-----------------\n");
 124                         return 1;
 125                 }
 126                 if (cur->next_qtd & 1) {
 127                         return 0;
 128                 }
 129                 if (0) dump_td(virt_to_phys(cur));
 130                 /* helps debugging the TD chain */
 131                 if (0) debug("\nmoving from %x to %x\n", cur, phys_to_virt(cur->next_qtd));
 132                 cur = phys_to_virt(cur->next_qtd);
 133         }
 134         return result;
 135 }
 136
 137 static int ehci_bulk (endpoint_t *ep, int size, u8 *data, int finalize)
 138 {
 139         int result = 0;
 140         int endp = ep->endpoint & 0xf;
 141         int pid = (ep->direction==IN)?EHCI_IN:EHCI_OUT;
 142
 143         qtd_t *head = memalign(32, sizeof(qtd_t));
 144         qtd_t *cur = head;
 145         while (1) {
 146                 memset(cur, 0, sizeof(qtd_t));
 147                 cur->token = QTD_ACTIVE |
 148                         (pid << QTD_PID_SHIFT) |
 149                         (0 << QTD_CERR_SHIFT);
 150                 u32 chunk = fill_td(cur, data, size);
 151                 size -= chunk;
 152                 data += chunk;
 153
 154                 cur->alt_next_qtd = QTD_TERMINATE;
 155                 if (size == 0) {
 156                         cur->next_qtd = virt_to_phys(0) | QTD_TERMINATE;
 157                         break;
 158                 } else {
 159                         qtd_t *next = memalign(32, sizeof(qtd_t));
 160                         cur->next_qtd = virt_to_phys(next);
 161                         cur = next;
 162                 }
 163         }
 164
 165         /* create QH */
 166         ehci_qh_t *qh = memalign(32, sizeof(ehci_qh_t));
 167         memset(qh, 0, sizeof(ehci_qh_t));
 168         qh->horiz_link_ptr = virt_to_phys(qh) | QH_QH;
 169         qh->epchar = ep->dev->address |
 170                 (endp << QH_EP_SHIFT) |
 171                 (ep->dev->speed << QH_EPS_SHIFT) |
 172                 (0 << QH_DTC_SHIFT) |
 173                 (1 << QH_RECLAIM_HEAD_SHIFT) |
 174                 (ep->maxpacketsize << QH_MPS_SHIFT) |
 175                 (0 << QH_NAK_CNT_SHIFT);
 176         qh->epcaps = 3 << QH_PIPE_MULTIPLIER_SHIFT;
 177
 178         qh->td.next_qtd = virt_to_phys(head);
 179         qh->td.token |= (ep->toggle?QTD_TOGGLE_DATA1:0);
 180         head->token |= (ep->toggle?QTD_TOGGLE_DATA1:0);
 181
 182         /* hook up QH */
 183         EHCI_INST(ep->dev->controller)->operation->asynclistaddr = virt_to_phys(qh);
 184
 185         /* start async schedule */
 186         EHCI_INST(ep->dev->controller)->operation->usbcmd |= HC_OP_ASYNC_SCHED_EN;
 187         while (!(EHCI_INST(ep->dev->controller)->operation->usbsts & HC_OP_ASYNC_SCHED_STAT)) ; /* wait */
 188
 189         /* wait for result */
 190         result = wait_for_tds(head);
 191
 192         /* disable async schedule */
 193         EHCI_INST(ep->dev->controller)->operation->usbcmd &= ~HC_OP_ASYNC_SCHED_EN;
 194         while (EHCI_INST(ep->dev->controller)->operation->usbsts & HC_OP_ASYNC_SCHED_STAT) ; /* wait */
 195
 196         ep->toggle = (cur->token & QTD_TOGGLE_MASK) >> QTD_TOGGLE_SHIFT;
 197
 198         free_qh_and_tds(qh, head);
 199         return result;
 200 }
 201
 202
 203 /* FIXME: Handle control transfers as 3 QHs, so the 2nd stage can be >0x4000 bytes */
 204 static int ehci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq,
 205                          int dalen, u8 *data)
 206 {
 207         int endp = 0; // this is control. always 0 (for now)
 208         int toggle = 0;
 209         int mlen = dev->endpoints[0].maxpacketsize;
 210         int result = 0;
 211
 212         /* create qTDs */
 213         qtd_t *head = memalign(32, sizeof(qtd_t));
 214         qtd_t *cur = head;
 215         memset(cur, 0, sizeof(qtd_t));
 216         cur->token = QTD_ACTIVE |
 217                 (toggle?QTD_TOGGLE_DATA1:0) |
 218                 (EHCI_SETUP << QTD_PID_SHIFT) |
 219                 (3 << QTD_CERR_SHIFT);
 220         if (fill_td(cur, devreq, drlen) != drlen) {
 221                 printf("ERROR: couldn't send the entire device request\n");
 222         }
 223         qtd_t *next = memalign(32, sizeof(qtd_t));
 224         cur->next_qtd = virt_to_phys(next);
 225         cur->alt_next_qtd = QTD_TERMINATE;
 226
 227         /* FIXME: We're limited to 16-20K (depending on alignment) for payload for now.
 228          * Figure out, how toggle can be set sensibly in this scenario */
 229         if (dalen > 0) {
 230                 toggle ^= 1;
 231                 cur = next;
 232                 memset(cur, 0, sizeof(qtd_t));
 233                 cur->token = QTD_ACTIVE |
 234                         (toggle?QTD_TOGGLE_DATA1:0) |
 235                         (((dir == OUT)?EHCI_OUT:EHCI_IN) << QTD_PID_SHIFT) |
 236                         (3 << QTD_CERR_SHIFT);
 237                 if (fill_td(cur, data, dalen) != dalen) {
 238                         printf("ERROR: couldn't send the entire control payload\n");
 239                 }
 240                 next = memalign(32, sizeof(qtd_t));
 241                 cur->next_qtd = virt_to_phys(next);
 242                 cur->alt_next_qtd = QTD_TERMINATE;
 243         }
 244
 245         toggle = 1;
 246         cur = next;
 247         memset(cur, 0, sizeof(qtd_t));
 248         cur->token = QTD_ACTIVE |
 249                 (toggle?QTD_TOGGLE_DATA1:QTD_TOGGLE_DATA0) |
 250                 ((dir == OUT)?EHCI_IN:EHCI_OUT) << QTD_PID_SHIFT |
 251                 (0 << QTD_CERR_SHIFT);
 252         fill_td(cur, NULL, 0);
 253         cur->next_qtd = virt_to_phys(0) | QTD_TERMINATE;
 254         cur->alt_next_qtd = QTD_TERMINATE;
 255
 256         /* create QH */
 257         ehci_qh_t *qh = memalign(32, sizeof(ehci_qh_t));
 258         memset(qh, 0, sizeof(ehci_qh_t));
 259         qh->horiz_link_ptr = virt_to_phys(qh) | QH_QH;
 260         qh->epchar = dev->address |
 261                 (endp << QH_EP_SHIFT) |
 262                 (dev->speed << QH_EPS_SHIFT) |
 263                 (1 << QH_DTC_SHIFT) | /* ctrl transfers are special: take toggle bit from TD */
 264                 (1 << QH_RECLAIM_HEAD_SHIFT) |
 265                 (mlen << QH_MPS_SHIFT) |
 266                 (0 << QH_NON_HS_CTRL_EP_SHIFT) | /* no non-HS device support yet */
 267                 (0 << QH_NAK_CNT_SHIFT);
 268         qh->epcaps = 3 << QH_PIPE_MULTIPLIER_SHIFT;
 269         qh->td.next_qtd = virt_to_phys(head);
 270
 271         /* hook up QH */
 272         EHCI_INST(dev->controller)->operation->asynclistaddr = virt_to_phys(qh);
 273
 274         /* start async schedule */
 275         EHCI_INST(dev->controller)->operation->usbcmd |= HC_OP_ASYNC_SCHED_EN;
 276         while (!(EHCI_INST(dev->controller)->operation->usbsts & HC_OP_ASYNC_SCHED_STAT)) ; /* wait */
 277
 278         result = wait_for_tds(head);
 279
 280         /* disable async schedule */
 281         EHCI_INST(dev->controller)->operation->usbcmd &= ~HC_OP_ASYNC_SCHED_EN;
 282         while (EHCI_INST(dev->controller)->operation->usbsts & HC_OP_ASYNC_SCHED_STAT) ; /* wait */
 283
 284         free_qh_and_tds(qh, head);
 285         return result;
 286 }
 287
 288 static void* ehci_create_intr_queue (endpoint_t *ep, int reqsize, int reqcount, int reqtiming)
 289 {
 290         return NULL;
 291 }
 292
 293 static void ehci_destroy_intr_queue (endpoint_t *ep, void *queue)
 294 {
 295 }
 296
 297 static u8* ehci_poll_intr_queue (void *queue)
 298 {
 299         return NULL;
 300 }
 301
 302 hci_t *
 303 ehci_init (pcidev_t addr)
 304 {
 305         int i;
 306         hci_t *controller = new_controller ();
 307
 308         if (!controller)
 309                 fatal("Could not create USB controller instance.\n");
 310
 311         controller->instance = malloc (sizeof (ehci_t));
 312         if(!controller->instance)
 313                 fatal("Not enough memory creating USB controller instance.\n");
 314
 315 #define PCI_COMMAND 4
 316 #define PCI_COMMAND_IO 1
 317 #define PCI_COMMAND_MEMORY 2
 318 #define PCI_COMMAND_MASTER 4
 319
 320         u32 pci_command = pci_read_config32(addr, PCI_COMMAND);
 321         pci_command = (pci_command | PCI_COMMAND_MEMORY) & ~PCI_COMMAND_IO ;
 322         pci_write_config32(addr, PCI_COMMAND, pci_command);
 323
 324         controller->start = ehci_start;
 325         controller->stop = ehci_stop;
 326         controller->reset = ehci_reset;
 327         controller->shutdown = ehci_shutdown;
 328         controller->bulk = ehci_bulk;
 329         controller->control = ehci_control;
 330         controller->create_intr_queue = ehci_create_intr_queue;
 331         controller->destroy_intr_queue = ehci_destroy_intr_queue;
 332         controller->poll_intr_queue = ehci_poll_intr_queue;
 333         controller->bus_address = addr;
 334         for (i = 0; i < 128; i++) {
 335                 controller->devices[i] = 0;
 336         }
 337         init_device_entry (controller, 0);
 338
 339         EHCI_INST(controller)->capabilities = phys_to_virt(pci_read_config32(addr, USBBASE));
 340         EHCI_INST(controller)->operation = (hc_op_t *)(phys_to_virt(pci_read_config32(addr, USBBASE)) + EHCI_INST(controller)->capabilities->caplength);
 341
 342         /* default value for frame length adjust */
 343         pci_write_config8(addr, FLADJ, FLADJ_framelength(60000));
 344
 345         /* Enable operation of controller */
 346         controller->start(controller);
 347
 348         /* take over all ports. USB1 should be blind now */
 349         EHCI_INST(controller)->operation->configflag = 1;
 350
 351         /* TODO lots of stuff missing */
 352
 353         controller->devices[0]->controller = controller;
 354         controller->devices[0]->init = ehci_rh_init;
 355         controller->devices[0]->init (controller->devices[0]);
 356
 357         return controller;
 358 }