payloads/libpayload/drivers/usb/ehci.c

   1 /*
   2  * This file is part of the libpayload project.
   3  *
   4  * Copyright (C) 2010 coresystems GmbH
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  * 3. The name of the author may not be used to endorse or promote products
  15  *    derived from this software without specific prior written permission.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  27  * SUCH DAMAGE.
  28  */
  29
  30 #include <libpayload.h>
  31 #include "ehci.h"
  32 #include "ehci_private.h"
  33
  34 static void dump_td(u32 addr) {
  35         qtd_t *td = phys_to_virt(addr);
  36         printf("td at phys(%x): active: %x, halted: %x, data_buf_err: %x\n    babble: %x, xact_err: %x, missed_mframe: %x\n    splitxstate: %x, perr: %x\n\n",
  37                 addr, td->active, td->halted, td->data_buf_err, td->babble, td->xact_err, td->missed_mframe, td->splitxstate, td->perr);
  38         printf("-   cerr: %x, total_len: %x\n\n", td->cerr, td->total_len);
  39 }
  40
  41 static void ehci_start (hci_t *controller)
  42 {
  43         EHCI_INST(controller)->operation->rs = 1;
  44 }
  45
  46 static void ehci_stop (hci_t *controller)
  47 {
  48         EHCI_INST(controller)->operation->rs = 0;
  49 }
  50
  51 static void ehci_reset (hci_t *controller)
  52 {
  53
  54 }
  55
  56 static void ehci_shutdown (hci_t *controller)
  57 {
  58
  59 }
  60
  61 enum { EHCI_OUT=0, EHCI_IN=1, EHCI_SETUP=2 };
  62
  63 /* returns handled bytes */
  64 int fill_td(qtd_t *td, void* data, int datalen) {
  65         u32 total_len = 0;
  66         u32 page_minus_1 = 0;
  67
  68         u32 start = virt_to_phys(data);
  69         u32 page = start & ~4095;
  70         u32 offset = start & 4095;
  71         u32 page_len = 4096 - offset;
  72
  73         td->c_page = 0;
  74         td->bufptr0 = page;
  75         td->cur_off = offset;
  76
  77         if (datalen <= page_len) {
  78                 total_len = datalen;
  79         } else {
  80                 datalen -= page_len;
  81                 total_len += page_len;
  82
  83                 do {
  84                         /* we have a continguous mapping between virtual and physical memory */
  85                         page += 4096;
  86
  87                         td->bufptrs[page_minus_1] = page;
  88                         if (datalen <= 4096) {
  89                                 total_len += datalen;
  90                                 break;
  91                         }
  92                         page_minus_1++;
  93                         datalen -= 4096;
  94                         total_len += 4096;
  95                 } while (page_minus_1<4);
  96         }
  97         td->total_len = total_len;
  98         return total_len;
  99 }
 100
 101 /* free up data structures */
 102 void free_qh_and_tds(ehci_qh_t *qh, qtd_t *cur) {
 103         qtd_t *next;
 104         while (cur) {
 105                 next = (qtd_t*)phys_to_virt(cur->next_qtd & ~31);
 106                 free(cur);
 107                 cur = next;
 108         }
 109         free(qh);
 110 }
 111
 112 int wait_for_tds(qtd_t *head) {
 113         int result = 0;
 114         qtd_t *cur = head;
 115         while (1) {
 116                 if (0) dump_td(virt_to_phys(cur));
 117                 while (cur->active && !cur->halted) udelay(60);
 118                 if (cur->halted) {
 119                         printf("ERROR with packet\n");
 120                         dump_td(virt_to_phys(cur));
 121                         printf("-----------------\n");
 122                         return 1;
 123                 }
 124                 if (cur->next_qtd & 1) {
 125                         return 0;
 126                 }
 127                 if (0) dump_td(virt_to_phys(cur));
 128                 /* helps debugging the TD chain */
 129                 if (0) printf("\nmoving from %x to %x\n", cur, phys_to_virt(cur->next_qtd));
 130                 cur = phys_to_virt(cur->next_qtd);
 131         }
 132         return result;
 133 }
 134
 135 static int ehci_bulk (endpoint_t *ep, int size, u8 *data, int finalize)
 136 {
 137         int result = 0;
 138         int endp = ep->endpoint & 0xf;
 139         int pid = (ep->direction==IN)?EHCI_IN:EHCI_OUT;
 140
 141         qtd_t *head = memalign(32, sizeof(qtd_t));
 142         qtd_t *cur = head;
 143         while (1) {
 144                 memset(cur, 0, sizeof(qtd_t));
 145                 cur->active = 1;
 146                 cur->pid = pid;
 147                 cur->cerr = 0;
 148                 u32 chunk = fill_td(cur, data, size);
 149                 size -= chunk;
 150                 data += chunk;
 151
 152                 cur->alt_terminate = 1;
 153                 if (size == 0) {
 154                         cur->next_qtd = virt_to_phys(0);
 155                         cur->terminate = 1;
 156                         break;
 157                 } else {
 158                         qtd_t *next = memalign(32, sizeof(qtd_t));
 159                         cur->next_qtd = virt_to_phys(next);
 160                         cur = next;
 161                 }
 162         }
 163
 164         /* create QH */
 165         ehci_qh_t *qh = memalign(32, sizeof(ehci_qh_t));
 166         memset(qh, 0, sizeof(ehci_qh_t));
 167         qh->horiz_link_ptr = virt_to_phys(qh);
 168         qh->type = 1; // FIXME: proper symbols for type. this is QH
 169         qh->addr = ep->dev->address;
 170         qh->ep = endp;
 171         qh->eps = ep->dev->speed;
 172         qh->dtc = 0;
 173         qh->reclaim_head = 1;
 174         qh->max_packet_len = ep->maxpacketsize;
 175         qh->nak_cnt_reload = 0;
 176         qh->pipe_multiplier = 3;
 177
 178         qh->td.next_qtd = virt_to_phys(head);
 179         qh->td.dt = ep->toggle;
 180         head->dt = ep->toggle;
 181
 182         /* hook up QH */
 183         EHCI_INST(ep->dev->controller)->operation->asynclistaddr = virt_to_phys(qh);
 184
 185         /* start async schedule */
 186         EHCI_INST(ep->dev->controller)->operation->async_sched_enable = 1;
 187         while (!EHCI_INST(ep->dev->controller)->operation->async_sched_status) ; /* wait */
 188
 189         /* wait for result */
 190         result = wait_for_tds(head);
 191
 192         /* disable async schedule */
 193         EHCI_INST(ep->dev->controller)->operation->async_sched_enable = 0;
 194         while (EHCI_INST(ep->dev->controller)->operation->async_sched_status) ; /* wait */
 195
 196         ep->toggle = cur->dt;
 197
 198         free_qh_and_tds(qh, head);
 199         return result;
 200 }
 201
 202
 203 /* FIXME: Handle control transfers as 3 QHs, so the 2nd stage can be >0x4000 bytes */
 204 static int ehci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq,
 205                          int dalen, u8 *data)
 206 {
 207         int endp = 0; // this is control. always 0 (for now)
 208         int toggle = 0;
 209         int mlen = dev->endpoints[0].maxpacketsize;
 210         int result = 0;
 211
 212         /* create qTDs */
 213         qtd_t *head = memalign(32, sizeof(qtd_t));
 214         qtd_t *cur = head;
 215         memset(cur, 0, sizeof(qtd_t));
 216         cur->active = 1;
 217         cur->dt = toggle;
 218         cur->pid = EHCI_SETUP;
 219         cur->cerr = 3;
 220         if (fill_td(cur, devreq, drlen) != drlen) {
 221                 printf("ERROR: couldn't send the entire device request\n");
 222         }
 223         qtd_t *next = memalign(32, sizeof(qtd_t));
 224         cur->next_qtd = virt_to_phys(next);
 225         cur->alt_terminate = 1;
 226
 227         /* FIXME: We're limited to 16-20K (depending on alignment) for payload for now.
 228          * Figure out, how toggle can be set sensibly in this scenario */
 229         if (dalen > 0) {
 230                 toggle ^= 1;
 231                 cur = next;
 232                 memset(cur, 0, sizeof(qtd_t));
 233                 cur->active = 1;
 234                 cur->dt = toggle;
 235                 cur->pid = (dir == OUT)?EHCI_OUT:EHCI_IN;
 236                 cur->cerr = 3;
 237                 if (fill_td(cur, data, dalen) != dalen) {
 238                         printf("ERROR: couldn't send the entire control payload\n");
 239                 }
 240                 next = memalign(32, sizeof(qtd_t));
 241                 cur->next_qtd = virt_to_phys(next);
 242                 cur->alt_terminate = 1;
 243         }
 244
 245         toggle = 1;
 246         cur = next;
 247         memset(cur, 0, sizeof(qtd_t));
 248         cur->active = 1;
 249         cur->dt = toggle;
 250         cur->pid = (dir == OUT)?EHCI_IN:EHCI_OUT;
 251         cur->cerr = 0;
 252         fill_td(cur, NULL, 0);
 253         cur->next_qtd = virt_to_phys(0);
 254         cur->terminate = 1;
 255         cur->alt_terminate = 1;
 256
 257         /* create QH */
 258         ehci_qh_t *qh = memalign(32, sizeof(ehci_qh_t));
 259         memset(qh, 0, sizeof(ehci_qh_t));
 260         qh->horiz_link_ptr = virt_to_phys(qh);
 261         qh->type = 1; // FIXME: proper symbols for type. this is QH
 262         qh->addr = dev->address;
 263         qh->ep = endp;
 264         qh->eps = dev->speed;
 265         qh->dtc = 1; /* Take data toggle from TD, as control transfers are special */
 266         qh->reclaim_head = 1;
 267         qh->max_packet_len = mlen;
 268         qh->non_hs_control_ep = 0; // no support for non-HS devices at this time
 269         qh->nak_cnt_reload = 0;
 270         qh->pipe_multiplier = 3;
 271         qh->td.next_qtd = virt_to_phys(head);
 272
 273         /* hook up QH */
 274         EHCI_INST(dev->controller)->operation->asynclistaddr = virt_to_phys(qh);
 275
 276         /* start async schedule */
 277         EHCI_INST(dev->controller)->operation->async_sched_enable = 1;
 278         while (!EHCI_INST(dev->controller)->operation->async_sched_status) ; /* wait */
 279
 280         result = wait_for_tds(head);
 281
 282         /* disable async schedule */
 283         EHCI_INST(dev->controller)->operation->async_sched_enable = 0;
 284         while (EHCI_INST(dev->controller)->operation->async_sched_status) ; /* wait */
 285
 286         free_qh_and_tds(qh, head);
 287         return result;
 288 }
 289
 290 static void* ehci_create_intr_queue (endpoint_t *ep, int reqsize, int reqcount, int reqtiming)
 291 {
 292         return NULL;
 293 }
 294
 295 static void ehci_destroy_intr_queue (endpoint_t *ep, void *queue)
 296 {
 297 }
 298
 299 static u8* ehci_poll_intr_queue (void *queue)
 300 {
 301         return NULL;
 302 }
 303
 304 hci_t *
 305 ehci_init (pcidev_t addr)
 306 {
 307         int i;
 308         hci_t *controller = new_controller ();
 309
 310         if (!controller)
 311                 usb_fatal("Could not create USB controller instance.\n");
 312
 313         controller->instance = malloc (sizeof (ehci_t));
 314         if(!controller->instance)
 315                 usb_fatal("Not enough memory creating USB controller instance.\n");
 316
 317 #define PCI_COMMAND 4
 318 #define PCI_COMMAND_IO 1
 319 #define PCI_COMMAND_MEMORY 2
 320 #define PCI_COMMAND_MASTER 4
 321
 322         u32 pci_command = pci_read_config32(addr, PCI_COMMAND);
 323         pci_command = (pci_command | PCI_COMMAND_MEMORY) & ~PCI_COMMAND_IO ;
 324         pci_write_config32(addr, PCI_COMMAND, pci_command);
 325
 326         controller->start = ehci_start;
 327         controller->stop = ehci_stop;
 328         controller->reset = ehci_reset;
 329         controller->shutdown = ehci_shutdown;
 330         controller->bulk = ehci_bulk;
 331         controller->control = ehci_control;
 332         controller->create_intr_queue = ehci_create_intr_queue;
 333         controller->destroy_intr_queue = ehci_destroy_intr_queue;
 334         controller->poll_intr_queue = ehci_poll_intr_queue;
 335         for (i = 0; i < 128; i++) {
 336                 controller->devices[i] = 0;
 337         }
 338         init_device_entry (controller, 0);
 339
 340         EHCI_INST(controller)->capabilities = phys_to_virt(pci_read_config32(addr, USBBASE));
 341         EHCI_INST(controller)->operation = (hc_op_t *)(phys_to_virt(pci_read_config32(addr, USBBASE)) + EHCI_INST(controller)->capabilities->caplength);
 342
 343         /* default value for frame length adjust */
 344         pci_write_config8(addr, FLADJ, FLADJ_framelength(60000));
 345
 346         /* Enable operation of controller */
 347         controller->start(controller);
 348
 349         /* take over all ports. USB1 should be blind now */
 350         EHCI_INST(controller)->operation->configflag = 1;
 351
 352         /* TODO lots of stuff missing */
 353
 354         controller->devices[0]->controller = controller;
 355         controller->devices[0]->init = ehci_rh_init;
 356         controller->devices[0]->init (controller->devices[0]);
 357
 358         return controller;
 359 }