isa: two more directives, todos and other stuff

diff --git a/2_isa/Makefile b/2_isa/Makefile
index 1b28a4306d6a0dbd9cacb651a458ddb69e16bbb1..3a500dc1f5bf0a71c3e774577b94aa101344b19d 100644 (file)
--- a/2_isa/Makefile
+++ b/2_isa/Makefile
@@ -1,6 +1,6 @@
 SHELL := bash
 
-FILES  = isa.tex conds.tex flags.tex callingconv.tex cmp.tex
+FILES  = isa.tex conds.tex flags.tex callingconv.tex cmp.tex desdis.tex
 FILES += Makefile
 TARGET = isa.pdf
 
@@ -20,7 +20,7 @@ $(TARGET): $(FILES) $(ISA_BUILD)
 %.tex: %.ptex gentex.pl
        ./gentex.pl $<
 
-.PHONY: clean html
+.PHONY: clean
 
 clean:
        rm -fr *.aux *.log *.dvi *.pdf *.toc *.outc $(ISA_BUILD)

diff --git a/2_isa/callingconv.tex b/2_isa/callingconv.tex
index 37e85dc29871614ad4bb6eeadd2159eebbea59f9..e5388d500ee2347a55d7c2e3c1bb57d6f78cc29d 100644 (file)
--- a/2_isa/callingconv.tex
+++ b/2_isa/callingconv.tex
@@ -5,7 +5,7 @@ Programs and functions implementing this instruction set, should implement the f
 \begin{table}[ht]
        \centering
        \begin{tabular}{|c|c|c|} \hline
-               register & saved by & usage  \\ \hline
+               \textbf{register} & \textbf{saved by} & \textbf{usage} \\ \hline
                r0       & caller   & return \\ \hline
                r1       & caller   & first parameter \\ \hline
                r2       & caller   & second parameter \\ \hline
@@ -47,24 +47,38 @@ a signed displacement.
 r1, 0x20-8(r3)} is a valid instruction
 \end{itemize}
 
-\subsubsection{Directives}
+\subsection{Directives}
 In order to gain extra comfort, several directives are interpreted by the
 assembler, a list is given in table~\ref{tab:asmdirs}.
 \begin{table}[ht]
        \centering
        \begin{tabular}{|l|p{10cm}|} \hline
-               Name & Description \\ \hline
+               \textbf{Name} & \textbf{Description} \\ \hline
                \texttt{.data} & subsequent data is desired for the data memory\\ \hline
                \texttt{.text} & subsequent code is desired for the instruction memory\\ \hline
                \verb+.include "file.s"+ & include a further file \\ \hline
-               \texttt{.define <name> <value>} & define a constant. Note that a define
-               isn't equal to a label\\ \hline
+               \texttt{.org \textit{addr}} & move \textit{forward} to a specific
+               address in data or instruction memory, depending on the current
+               section \\ \hline
+
+               \texttt{.fill \textit{repeat}, \textit{size}, \textit{value}} & place a
+               value of a specific size \texttt{\textit{repeat}}-times, while
+               \texttt{\textit{repeat}} and \texttt{\texttt{size}} are optional.
+
+               When one parameter is given, the value is placed at the current address.
+               Note that a given value will be rounded up to a full byte, e.g.
+               \texttt{0x123} occupy two bytes.
+
+               When two parameters are given, the first equals \texttt{\textit{repeat}}
+               and the second corresponds to \texttt{\textit{value}} \\ \hline
+
+               \texttt{.define \textit{name}, \textit{value}} & define a constant. Note
+               that a define isn't equal to a label\\ \hline
+
                \texttt{label: <instr/data>} & label an instruction or data. The label
                can be used as an alias for the address of this instruction in the
                instruction memory or as a reference in the data memory, depending on
                the current section\\ \hline
-               %TODO: those are maybe handy: .fill(
-               %http://www.myri.com/scs/L3/doc/as_7.html#SEC85)
        \end{tabular}
        \caption{supported directives by the assembler}
        \label{tab:asmdirs}

diff --git a/2_isa/common.sty b/2_isa/common.sty
index a82f0593730336566ac50a070bf3912041691e88..0887eb33f59046d7474a306573c71d681b64d8a9 100644 (file)
--- a/2_isa/common.sty
+++ b/2_isa/common.sty
@@ -2,6 +2,7 @@
 \usepackage{amsmath}
 \usepackage{hyperref}
 \usepackage{url}
+\usepackage{color}
 \usepackage[latin1]{inputenc}
 \usepackage{listings}
 %\usepackage{ngerman}
@@ -40,6 +41,10 @@ tabsize=4
        #1 {\small (#2)}\\{\small\insertemail{#3}}
 }
 
+\newcommand{\todo}[1]{
+       \large\textcolor{red}{TODO: #1}
+}
+
 \newcommand{\allauthors}{
        \author{
                \addauthor{Markus Hofst\"atter}{0725034}{markus.manrow@gmx.at}\and

diff --git a/2_isa/conds.tex b/2_isa/conds.tex
index 7ae8be794f3872aaf14eb1f1dbfc566371fae2cd..e68c6f15e6ddb1dd8a2f4078bd80d722b608efd0 100644 (file)
--- a/2_isa/conds.tex
+++ b/2_isa/conds.tex
@@ -8,7 +8,7 @@ Above and below are for unsigned values. Greater and less for signed values.\\
 \begin{table}[ht]
        \centering
        \begin{tabular}{|c|c|c|c|}\hline
-               Bitcode & Condition                & Bits to test                & suffixes      \\ \hline
+               \textbf{Bitcode}&\textbf{Condition}& \textbf{Bits to test}       &\textbf{suffixes}\\\hline
                0000    & not equal / not zero     & ZF = 0                      & nq, nz        \\ \hline
                0001    & equal / zero             & ZF = 1                      & eq, zs        \\ \hline
                0010    & not overflow             & OF = 0                      & no            \\ \hline
@@ -35,8 +35,8 @@ Above and below are for unsigned values. Greater and less for signed values.\\
 \begin{table}[hpt]
        \centering
        \begin{tabular}{|l|c|c|c|c|} \hline
-               Bit  & 3  & 2  & 1  & 0  \\ \hline
-               Flag & SF & CF & OF & ZF \\ \hline
+               \textbf{Bit} & 3  & 2  & 1  & 0  \\ \hline
+               \textbf{Flag}& SF & CF & OF & ZF \\ \hline
        \end{tabular}
        \caption{Bits in the PSW}
 \end{table}

diff --git a/2_isa/data.ptex b/2_isa/data.ptex
index 8836b0e9cd33155736216ad94ca34fe648f08121..d0d10a14b38b0497f422bd8e9fd927e27a1d7564 100644 (file)
--- a/2_isa/data.ptex
+++ b/2_isa/data.ptex
@@ -1,6 +1,6 @@
-ins ('32', 'movpf', 'Move from PSW/Stack', '4 | 5 | 4 | 1 | 18', 'Conditions | OpCode | Register Destination| st | - ');
+ins ('32', 'mov\{p,s\}f', 'Move from PSW/Stack', '4 | 5 | 4 | 1 | 18', 'Conditions | OpCode | Register Destination| st | - ');
 
-ins ('32', 'movpt', 'Move to PSW/Stack', '4 | 5 | 4 | 1 | 18', 'Conditions | OpCode | Register Source | st | - ',
+ins ('32', 'mov\{p,s\}t', 'Move to PSW/Stack', '4 | 5 | 4 | 1 | 18', 'Conditions | OpCode | Register Source | st | - ',
 'This instruction will set PSW or Stack to the value stored in the source register. When the move is to PSW the flags will be set like they are set in the source register.');
 
 ins ('32', 'ldw', 'Load word; needs to be aligned to 32bit', '4 | 5 | 4 | 4 | 15', 'Conditions | OpCode | Register Destination|Register Address| displacement ');
@@ -20,6 +20,7 @@ ins ('32', 'stx', 'Store to program space', '4 | 5 | 4 | 4 | 15', 'Conditions |
 
 ins ('32', 'stackop', 'pop/push/disc/fetch from/to stack', '4 | 5 | 4 | 2 | 17', 'Conditions | OpCode | Register Destination (not for disc) | Type | - ',
 'This operation should not be used direct, instead the aliases pop, push, disc and fetch should be used.');
+plaintext ('\\mbox{}\\\\ \\todo{Type == ??}');
 
 #ins ('32', 'pop', 'pop from stack', '4 | 5 | 4 | 19', 'Conditions | OpCode | Register Destination | - ');
 

diff --git a/2_isa/desdis.tex b/2_isa/desdis.tex
index d2fbb580241111a12cad016e863ae50d924bf08d..bc9514cbba3e11122a98fdd7024d342d4b53a4d1 100644 (file)
--- a/2_isa/desdis.tex
+++ b/2_isa/desdis.tex
@@ -4,5 +4,5 @@
        \item Saving the return address of a call onto the stack and not into a link register
        \item UART and timers are implemented as extension modules, which will allow us to implement additions modules for various functions
        \item We defined that carry set is the condition below (unsigned lower)
-       \item We use little endian for encoding our data and program space
+       \item We use little endian for encoding our data and program space\todo{hatten wir uns ned auf big endian geeinigt?}
 \end{itemize}

diff --git a/2_isa/flags.tex b/2_isa/flags.tex
index a4c461209559a12b14723a371916f514ea7f9f4c..5fa1f15b6815db3433e86cb0896a7b981283fa24 100644 (file)
--- a/2_isa/flags.tex
+++ b/2_isa/flags.tex
@@ -1,15 +1,15 @@
 In table~\ref{tab:flags} the flags that can suffix instructions are described. If and which flags are available depends on the instruction.
 
 \begin{longtable}{|c|c|c|}\hline
-       flag & function & default value \\ \hline
+       \textbf{flag} & \textbf{function} & \textbf{default value} \\ \hline
        C    & carry    & 0 (not set)   \\ \hline
        SU   & Status register update & 1 (set) \\ \hline
        H/L  & use high or low 16-bits & L (not set) \\ \hline
        F    & fill unused 16-bits with value of F & 0 (not set)\footnote{this means that andxf must be used, if the not specified 16-bit, should be preserve} \\ \hline
-       ST   & read/write stack instead of PSW & 0 (not set) \\ \hline
        S    & sign extension & 0 (not set) \\ \hline
        +/-  & branch taken or not taken & + (taken) \\ \hline
        A    & if set the shift operation will be arithmetic instead of logic & 0 (logic) \\ \hline
        \caption{ISA flag overview}
        \label{tab:flags}
 \end{longtable}
+\todo{@SU: mit welchem suffix deaktivieren? ``SU'' selbst ist imho verwirrend}

diff --git a/2_isa/gentex.pl b/2_isa/gentex.pl
index bee4292f355ed91e0a58702924b999888fc58aba..4b0d8ee82bd3e2baf5c4e2604589a34e087bba38 100755 (executable)
--- a/2_isa/gentex.pl
+++ b/2_isa/gentex.pl
@@ -1,6 +1,10 @@
 #!/usr/bin/perl
 use strict;
 
+sub plaintext {
+       print $_[0];
+}
+
 sub ins {
        my $bits = $_[0];
        my $bline;
@@ -70,7 +74,7 @@ sub ins {
 
        $count = $bits-1;
 
-       $tabular = "\\subsubsection{".$_[1]."}\n";
+       $tabular = "\\subsubsection{\\texttt{".$_[1]."} -- ".$_[2]."}\n";
        $tabular .= "\\begin{center} \n \\resizebox{\\textwidth}{!}{\n";
        $tabular .= "\\begin{tabular}{|l|";
        for($i = $bits-1; $i >= 0; $i--) {
@@ -162,7 +166,7 @@ sub ins {
                my @aliases = split(/\|/, $_[8]);
 
                $tabular .= "\\begin{table}[!h] \n \\centering \n \\begin{tabular}{|c|c|} \\hline \n";
-               $tabular .= "Alias & ".$_[1]." equivalent \\\\ \\hline \n";
+               $tabular .= "\\textbf{Alias }& \\textbf{".$_[1]." equivalent}\\\\ \\hline \n";
                foreach my $alias (@aliases) {
                        my $equv;
                        my $from;

diff --git a/2_isa/isa.tex b/2_isa/isa.tex
index 211114ceeb17b3e3a96c3e4a7ce5b93b1d5ac341..e333f4fd2d127c9a6e2021ce10bb85e151bd4ad0 100644 (file)
--- a/2_isa/isa.tex
+++ b/2_isa/isa.tex
@@ -3,7 +3,7 @@
 \begin{document}
 \allauthors
 
-\title{Instruction Set ``Deep Thought''}
+\title{Instruction Set ``Deep Thought''} % haha, deep throat
 \titlehead{Vienna University of Technology \hfill WS~2010}
 \subject{Computer Architecture Labor\"ubung}
 \date{\today}

diff --git a/2_isa/logic.ptex b/2_isa/logic.ptex
index 58fc3448d09dec5b0fbb655d21c360f22406af62..e5c25a36dccca1f6d25e8cde50f92536a7d6ca88 100644 (file)
--- a/2_isa/logic.ptex
+++ b/2_isa/logic.ptex
@@ -22,5 +22,7 @@ ins ('32', 'xorx', 'Xor im 16bit', '4 | 5 | 4 | 16 | 1 | 1 | 1', 'Conditions | O
 ins ('32', 'lls', 'left shift', '4 | 5 | 4 | 4 | 5 | 8 | 1 | 1', 'Conditions | OpCode | Register Destination|Register A (Source1)| Immediate | - | C | SU',
 '',' | Will change if C is set | | ');
 
+plaintext ('\\mbox{}\\\\ \\todo{lls und lrs zusammenfassen $\rightarrow$ ein bit entscheidet fuer shift nach links oder rechts}');
+
 ins ('32', 'lrs', 'right shift', '4 | 5 | 4 | 4 | 5 | 7 | 1 | 1 | 1', 'Conditions | OpCode | Register Destination|Register A (Source1)| Immediate | - | A | C | SU',
 '',' | Will change if C is set | | ');

diff --git a/2_isa/misc.ptex b/2_isa/misc.ptex
index 636c59166c75f979d696c8897e767c20965448ce..09c5a7f816d843ffab04f74727204c0fae029ce5 100644 (file)
--- a/2_isa/misc.ptex
+++ b/2_isa/misc.ptex
@@ -1,6 +1,10 @@
 ins ('32', 'branch', 'Branch; jump to pc+imm', '4 | 5 | 16 | 3 | 2 | 1 | 1', 'Conditions | OpCode | Immediate | - | Type | +/- | S',
 'This instruction should be used with it\'s aliases branch, call, ret and reti. No flags will be affected by this instructions.');
 
+plaintext ('\\mbox{}\\\\ \\todo{Type == ??}');
+
+plaintext ('\\mbox{}\\\\ \\todo{branchreg? :-(}');
+
 #ins ('32', 'call', 'Call; save pc+4 in stack, jump to pc+imm', '4 | 5 | 16 | 5 | 1 | 1', 'Conditions | OpCode | Immediate | - | +/- | S');
 
 #ins ('32', 'branchreg', 'Branch; branch to value of reg', '4 | 5 | 4 | 17 | 1 | 1', 'Conditions | OpCode | Register Source| - | +/- | S');

diff --git a/2_isa/src/bootrom.s b/2_isa/src/bootrom.s
index 2801118558b7dde0e897ba210aa7fdd2242292c6..6732e260d62d200263044b6d5acfac429d24da64 100644 (file)
--- a/2_isa/src/bootrom.s
+++ b/2_isa/src/bootrom.s
@@ -2,18 +2,18 @@
 
        .text
        ; TODO: will the assembler be able to evaluate these expressions?
-       UART_BASE=0x1000
-       UART_STATUS=(UART_BASE+0x4)
-       UART_RECV=(UART_BASE+0x8)
-       UART_TRANS=(UART_BASE+0xC)
-       UART_BAUD=(UART_BAUD+0x10)
-
-       UART_TRANS_EMPTY=0
-       UART_RECV_NEW=1
-
-       TIMEOUT_START=0x13371337
-       DEFAULT_PROG_START=0x200
-       STACKSTART=0x500 ; FIXME
+       .define UART_BASE, 0x1000
+       .define UART_STATUS, (UART_BASE+0x4)
+       .define UART_RECV, (UART_BASE+0x8)
+       .define UART_TRANS, (UART_BASE+0xC)
+       .define UART_BAUD, (UART_BAUD+0x10)
+
+       .define UART_TRANS_EMPTY, 0
+       .define UART_RECV_NEW, 1
+
+       .define TIMEOUT_START, 0x13371337
+       .define DEFAULT_PROG_START, 0x200
+       .define STACKSTART, 0x500 ; FIXME
 ;-----
 main:
        ; setup stackframe
@@ -29,21 +29,21 @@ timeout_loop:
        ldih r3, UART_STATUS@hi
        ldw r3, 0(r3)
        andi r3, r3, 1 << UART_RECV_NEW
-       jumpzs+ next; jump if zero
+       branchzs+ next; branch if zero
 
-       branch recv_byte
+       call recv_byte
        ; we received the enter bootrom sign
        cmp r0, 0x48 ; 'H'
-       jumpeq- bt_H
+       brancheq- bt_H
 
 next:
        subi r3, r3, 1
-       jumpnz+ timeout_loop
+       branchnz+ timeout_loop
 
-       ; branch to default entry point
+       ; call to default entry point
        ldil r0, DEFAULT_PROG_START@lo
        ldih r0, DEFAULT_PROG_START@hi
-       jumpreg r0
+       branchreg r0
 
 ;-----
 send_byte:
@@ -51,7 +51,7 @@ send_byte:
        ldih r3, UART_STATUS@hi
        ldw r3, 0(r3)
        andi r3, r3, 1 << UART_TRANS_EMPTY
-       jumpzs+ send_byte ; jump if zero
+       branchzs+ send_byte ; branch if zero
        ldil r3, UART_TRANS@lo  
        ldih r3, UART_TRANS@hi
        stb r1, 0(r3)
@@ -61,13 +61,13 @@ send_byte:
 send_word:
        ; TODO: loop? (less codesize...)
        lrs r0, r1, 0
-       branch send_byte
+       call send_byte
        lrs r0, r1, 8
-       branch send_byte
+       call send_byte
        lrs r0, r1, 16
-       branch send_byte
+       call send_byte
        lrs r0, r1, 24
-       branch send_byte
+       call send_byte
        ret
 
 ;-----
@@ -76,7 +76,7 @@ recv_byte:
        ldih r3, UART_STATUS@hi
        ldw r3, 0(r3)
        andi r3, r3, 1 << UART_RECV_NEW
-       jumpzs+ send_byte ; jump if zero
+       branchzs+ send_byte ; branch if zero
        ldil r3, UART_RECV@lo   
        ldih r3, UART_RECV@hi
        lwb r0, 0(r3)
@@ -85,18 +85,18 @@ recv_byte:
 ;-----
 recv_word:
        ldisl r0, 0x0
-       branch recv_byte
+       call recv_byte
        or r0, r0, r1
 
-       branch recv_byte
+       call recv_byte
        sll r1, r1, 8
        or r0, r0, r1
 
-       branch recv_byte
+       call recv_byte
        sll r1, r1, 16
        or r0, r0, r1
 
-       branch recv_byte
+       call recv_byte
        sll r1, r1, 24
        or r0, r0, r1
 
@@ -105,70 +105,70 @@ recv_word:
 
 ;-----
 bootrom:
-       branch recv_byte
+       call recv_byte
 
        cmpi r0, 0x57 ; 'W'
-       jumpeq- bt_W
+       brancheq- bt_W
 
        cmpi r0, 0x52 ; 'R'
-       jumpeq- bt_R
+       brancheq- bt_R
 
        cmpi r0, 0x51 ; 'Q'
-       jumpeq- bt_Q
+       brancheq- bt_Q
 
        cmpi r0, 0x54 ; 'T'
-       jumpeq- bt_T
+       brancheq- bt_T
 
        cmpi r0, 0x4a ; 'J'
-       jumpeq- bt_J
+       brancheq- bt_J
 
        ; cmpi r0, 0x48 ; 'H'
-       ; jumpeq bt_H
+       ; brancheq bt_H
        ; FALL THROUGH ;)
 
 bt_H:
        ldisl r1, 0x4f ; 'O'
-       branch send_byte
-       jump bootrom
+       call send_byte
+       branch bootrom
 
 bt_W:
-       branch recv_word ; receive addr
+       call recv_word ; receive addr
        mov r6, r0
-       branch recv_word ; receive instr
+       call recv_word ; receive instr
        stx r0, 0(r6)
        ldisl r1, 0x44 ; 'D'
-       branch send_byte
-       jump bootrom
+       call send_byte
+       branch bootrom
 
 bt_R:
-       branch recv_word ; receive addr
+       call recv_word ; receive addr
        mov r2, r0
        ldisl r1, 0x46 ; 'F'
-       branch send_byte
+       call send_byte
        ldx r1, 0(r2)
-       branch send_word
-       jump bootrom
+       call send_word
+       branch bootrom
 
 bt_Q:
-       branch recv_word ; receive addr
+       call recv_word ; receive addr
        mov r6, r0
-       branch recv_word ; receive data
+       call recv_word ; receive data
        stw r0, 0(r6)
        ldisl r1, 0x41 ; 'A'
-       branch send_byte
-       jump bootrom
+       call send_byte
+       branch bootrom
 
 bt_T:
-       branch recv_word ; receive addr
+       call recv_word ; receive addr
        mov r2, r0
        ldisl r1, 0x47 ; 'G'
-       branch send_byte
+       call send_byte
        ldw r1, 0(r2)
-       branch send_word
-       jump bootrom
+       call send_word
+       branch bootrom
 
 bt_J:
-       branch recv_word
-       jumpreg r0
+       call recv_word
+       branchreg r0
 
 ; 102 instr. please update after modification