bootromfun: laut modelsim werden die instruktionen ins RAM geschrieben, aber ...

... programm counter zickt beim uebergang von ROM->RAM herum

diff --git a/3_test/uartint.s b/3_test/uartint.s
index bf8e43d46128840ef52b61b556a613c32cff487e..f1033f167a4f4c61758d1c9721f517059a8ab52e 100644 (file)
--- a/3_test/uartint.s
+++ b/3_test/uartint.s
@@ -14,52 +14,64 @@ main:
        ; stwnv r5, 0(r4)
 uartrdy:
        ; load instructions into ram
-       ldi r8, 0x2037 ; paddr
-       ldi r9, 0x203b ; pdata
-
-    ; x"e7390000"; -- ldw r7, 0(r2)
-       xor r10, r10, r10
-       stw r10, 0(r8)
+       ldi r8, 0x2034 ; paddr
+       ldi r9, 0x2038 ; pdata
        xor r10, r10, r10
-       ldi r10, 0xe739
-       lls r10, r10, 16
-       stw r10, 0(r9)
+       xor r11, r11, r11
 
-       ;x"e7b98000"; -- stw r7, 0(r3)
+       ; place this small program into instr-ram:
+       ;.text
+       ;start:
+       ;       br+ main
+       ;       call+ main
+       ;       ret
+       ;main:
+       ;       ldw r7, 0(r2)
+       ;       stw r7, 0(r1)
+       ;halt:
+       ;       br+ halt
+
+       ;eb000183;br+ main;;
+       ldi r10, 0
+       stw r10, 0(r8)
+       ldi r11, 0x0183
+       ldih r11, 0xeb00
+       stw r11, 0(r9)
+       ;eb000107;call+ main;;
        xor r10, r10, r10
        ldi r10, 1
        stw r10, 0(r8)
-       xor r10, r10, r10
-       ldi r10, 0xe7b9
-       lls r10, r10, 8
-       addi r10, r10, 0x80
-       lls r10, r10, 8
-       stw r10, 0(r9)
-
-       ;x"e7b88000"; -- stw r7, 0(r1)
+       ldi r11, 0x107
+       ldih r11, 0xeb00
+       stw r11, 0(r9)
+       ;eb000008;ret;;
        xor r10, r10, r10
        ldi r10, 2
        stw r10, 0(r8)
-       xor r10, r10, r10
-       ldi r10, 0xe7b8
-       lls r10, r10, 8
-       addi r10, r10, 0x80
-       lls r10, r10, 8
-       stw r10, 0(r9)
-
-       ;x"eb000008"; -- ret-
+       ldi r11, 0x8
+       ldih r11, 0xeb00
+       stw r11, 0(r9)
+       ;e7390000;ldw r7, 0(r2);;
        xor r10, r10, r10
        ldi r10, 3
        stw r10, 0(r8)
+       ldi r11, 0x0
+       ldih r11, 0xeb00
+       stw r11, 0(r9)
+       ;e7b88000;stw r7, 0(r1);;
        xor r10, r10, r10
-       ldi r10, 0xeb00
-       lls r10, r10, 16
-       addi r10, r10, 0x8
-       stw r10, 0(r9)
-       br hmm
+       ldi r10, 4
+       stw r10, 0(r8)
+       ldi r11, 0x8000
+       ldih r11, 0xe7b8
+       stw r11, 0(r9)
+       ;eb000003;br+ halt;;
+       xor r10, r10, r10
+       ldi r10, 5
+       stw r10, 0(r8)
+       ldi r11, 0x3
+       ldih r11, 0xeb00
+       stw r11, 0(r9)
 
-.org 0x1fc
-hmm:
-       ldinv r0, 0
-; real ram...
-woot:
+leave:
+       ; just run and run, until we leave ROM and enter

diff --git a/cpu/sim/testcore1.do b/cpu/sim/testcore1.do
index c781ad4b771bb90ef5d63dee70216a80a337845b..d16e5c31b0f59604dbf15f662a0807a2f41e3de4 100644 (file)
--- a/cpu/sim/testcore1.do
+++ b/cpu/sim/testcore1.do
@@ -74,6 +74,7 @@ add wave  -group fetchstage -radix hexadecimal /pipeline_tb/fetch_st/instr_r_add
 add wave  -group fetchstage -radix hexadecimal /pipeline_tb/fetch_st/instr_rd_data
 add wave  -group fetchstageregister -radix hexadecimal /pipeline_tb/fetch_st/instruction
 add wave  -group fetchstage -format logic /pipeline_tb/fetch_st/branch_prediction_bit
+add wave  -group fetchstage -format logic /pipeline_tb/fetch_st/rom_ram
 add wave  -group fetchstage -radix hexadecimal /pipeline_tb/fetch_st/prediction_result
 
 add wave  -group decodestage -radix hexadecimal /pipeline_tb/decode_st/instruction

diff --git a/cpu/src/fetch_stage_b.vhd b/cpu/src/fetch_stage_b.vhd
index 6a6380c838532efc7ec592e85b7a9cf3a79cc7fa..23d8ecfe13a1b35c9439c2a7ac9a7cd91543b4f0 100644 (file)
--- a/cpu/src/fetch_stage_b.vhd
+++ b/cpu/src/fetch_stage_b.vhd
@@ -78,9 +78,10 @@ begin
 
        if (instr_r_addr(ROM_INSTR_ADDR_WIDTH) = '1' and rom_ram = ROM_USE) then
                rom_ram_nxt <= RAM_USE;
-               instr_r_addr_nxt <= (others => '0');
+               -- TODO: wenn genau auf adresse 0 im RAM ein br steht kracht es... :/
+               instr_r_addr_nxt <= x"00000000";
        end if;
-       
+
        if (reset = RESET_VALUE) then
                instr_r_addr_nxt <= (others => '0');
        end if;

diff --git a/cpu/src/rom_b.vhd b/cpu/src/rom_b.vhd
index e45f7de9f73940945cec80df26e826962668b138..492c5a63fde6117239c477e07e08014a9547d62a 100644 (file)
--- a/cpu/src/rom_b.vhd
+++ b/cpu/src/rom_b.vhd
@@ -132,41 +132,46 @@ begin
        when "0000110" => data_out <= x"ed210120"; -- ldi r4, 0x2024 
        when "0000111" => data_out <= x"ed280018"; -- ldi r5, 3
        when "0001000" => data_out <= x"e7aa0000"; -- stw r5, 0(r4)
-       when "0001001" => data_out <= x"eb7ffb83"; -- br+ start
-       when "0001010" => data_out <= x"ed4101b8"; -- ldi r8, 0x2037 
-       when "0001011" => data_out <= x"ed4901d8"; -- ldi r9, 0x203b 
+       -- when "0001001" => data_out <= x"eb7ffb83"; -- br+ start
+       when "0001010" => data_out <= x"ed4101a0"; -- ldi r8, 0x2034 
+       when "0001011" => data_out <= x"ed4901c0"; -- ldi r9, 0x2038 
        when "0001100" => data_out <= x"e4555000"; -- xor r10, r10, r10
-       when "0001101" => data_out <= x"e7d40000"; -- stw r10, 0(r8)
-       when "0001110" => data_out <= x"e4555000"; -- xor r10, r10, r10
-       when "0001111" => data_out <= x"ed5739c8"; -- ldi r10, 0xe739
-       when "0010000" => data_out <= x"e5554000"; -- lls r10, r10, 16
-       when "0010001" => data_out <= x"e7d48000"; -- stw r10, 0(r9)
-       when "0010010" => data_out <= x"e4555000"; -- xor r10, r10, r10
-       when "0010011" => data_out <= x"ed500008"; -- ldi r10, 1
-       when "0010100" => data_out <= x"e7d40000"; -- stw r10, 0(r8)
-       when "0010101" => data_out <= x"e4555000"; -- xor r10, r10, r10
-       when "0010110" => data_out <= x"ed573dc8"; -- ldi r10, 0xe7b9
-       when "0010111" => data_out <= x"e5552000"; -- lls r10, r10, 8
-       when "0011000" => data_out <= x"e1550400"; -- addi r10, r10, 0x80
-       when "0011001" => data_out <= x"e5552000"; -- lls r10, r10, 8
-       when "0011010" => data_out <= x"e7d48000"; -- stw r10, 0(r9)
-       when "0011011" => data_out <= x"e4555000"; -- xor r10, r10, r10
-       when "0011100" => data_out <= x"ed500010"; -- ldi r10, 2
-       when "0011101" => data_out <= x"e7d40000"; -- stw r10, 0(r8)
-       when "0011110" => data_out <= x"e4555000"; -- xor r10, r10, r10
-       when "0011111" => data_out <= x"ed573dc0"; -- ldi r10, 0xe7b8
-       when "0100000" => data_out <= x"e5552000"; -- lls r10, r10, 8
-       when "0100001" => data_out <= x"e1550400"; -- addi r10, r10, 0x80
-       when "0100010" => data_out <= x"e5552000"; -- lls r10, r10, 8
-       when "0100011" => data_out <= x"e7d48000"; -- stw r10, 0(r9)
-       when "0100100" => data_out <= x"e4555000"; -- xor r10, r10, r10
-       when "0100101" => data_out <= x"ed500018"; -- ldi r10, 3
-       when "0100110" => data_out <= x"e7d40000"; -- stw r10, 0(r8)
-       when "0100111" => data_out <= x"e4555000"; -- xor r10, r10, r10
-       when "0101000" => data_out <= x"ed575800"; -- ldi r10, 0xeb00
-       when "0101001" => data_out <= x"e5554000"; -- lls r10, r10, 16
-       when "0101010" => data_out <= x"e1550040"; -- addi r10, r10, 0x8
-       when "0101011" => data_out <= x"e7d48000"; -- stw r10, 0(r9)
+       when "0001101" => data_out <= x"e45dd800"; -- xor r11, r11, r11
+       when "0001110" => data_out <= x"ed500400"; -- ldi r10, 0x80
+       when "0001111" => data_out <= x"e7d40000"; -- stw r10, 0(r8)
+       when "0010000" => data_out <= x"ed580c18"; -- ldi r11, 0x0183
+       when "0010001" => data_out <= x"ed5f5802"; -- ldih r11, 0xeb00
+       when "0010010" => data_out <= x"e7dc8000"; -- stw r11, 0(r9)
+       when "0010011" => data_out <= x"e4555000"; -- xor r10, r10, r10
+       when "0010100" => data_out <= x"ed500408"; -- ldi r10, 0x81
+       when "0010101" => data_out <= x"e7d40000"; -- stw r10, 0(r8)
+       when "0010110" => data_out <= x"ed580838"; -- ldi r11, 0x107
+       when "0010111" => data_out <= x"ed5f5802"; -- ldih r11, 0xeb00
+       when "0011000" => data_out <= x"e7dc8000"; -- stw r11, 0(r9)
+       when "0011001" => data_out <= x"e4555000"; -- xor r10, r10, r10
+       when "0011010" => data_out <= x"ed500410"; -- ldi r10, 0x82
+       when "0011011" => data_out <= x"e7d40000"; -- stw r10, 0(r8)
+       when "0011100" => data_out <= x"ed580040"; -- ldi r11, 0x8
+       when "0011101" => data_out <= x"ed5f5802"; -- ldih r11, 0xeb00
+       when "0011110" => data_out <= x"e7dc8000"; -- stw r11, 0(r9)
+       when "0011111" => data_out <= x"e4555000"; -- xor r10, r10, r10
+       when "0100000" => data_out <= x"ed500418"; -- ldi r10, 0x83
+       when "0100001" => data_out <= x"e7d40000"; -- stw r10, 0(r8)
+       when "0100010" => data_out <= x"ed580000"; -- ldi r11, 0x0
+       when "0100011" => data_out <= x"ed5f5802"; -- ldih r11, 0xeb00
+       when "0100100" => data_out <= x"e7dc8000"; -- stw r11, 0(r9)
+       when "0100101" => data_out <= x"e4555000"; -- xor r10, r10, r10
+       when "0100110" => data_out <= x"ed500420"; -- ldi r10, 0x84
+       when "0100111" => data_out <= x"e7d40000"; -- stw r10, 0(r8)
+       when "0101000" => data_out <= x"ed5c0000"; -- ldi r11, 0x8000
+       when "0101001" => data_out <= x"ed5f3dc2"; -- ldih r11, 0xe7b8
+       when "0101010" => data_out <= x"e7dc8000"; -- stw r11, 0(r9)
+       when "0101011" => data_out <= x"e4555000"; -- xor r10, r10, r10
+       when "0101100" => data_out <= x"ed500428"; -- ldi r10, 0x85
+       when "0101101" => data_out <= x"e7d40000"; -- stw r10, 0(r8)
+       when "0101110" => data_out <= x"ed580018"; -- ldi r11, 0x3
+       when "0101111" => data_out <= x"ed5f5802"; -- ldih r11, 0xeb00
+       when "0110000" => data_out <= x"e7dc8000"; -- stw r11, 0(r9)
        -- just nop until rom end!
        when others => data_out <= x"fd000000";
                        end case;