}
}
+void CCpu::breakNext()
+{
+ m_breakNext = true;
+}
+
+bool CCpu::shouldBreak()
+{
+ return m_breakNext;
+}
+
void CCpu::tick()
{
// signal extensions
}
-CCpu::CCpu(int regs, int ram, int prog) : m_Z(false), m_S(false), m_C(false), m_O(false), m_pc(0), m_pc_next(0), m_perf(0), m_reg(regs), m_ram(ram), m_prog(prog), m_exts(0), m_stack(0)
+CCpu::CCpu(int regs, int ram, int prog) : m_Z(false), m_S(false), m_C(false), m_O(false), m_breakNext(0), m_pc(0), m_pc_next(0), m_perf(0), m_reg(regs), m_ram(ram), m_prog(prog), m_exts(0), m_stack(0)
{
}
class CCpu {
private:
- bool m_Z, m_S, m_C, m_O;
+ bool m_Z, m_S, m_C, m_O, m_breakNext;
CDat m_pc, m_pc_next, m_perf;
CMem<CDat> m_reg, m_ram;
void applyToExtensions(const vector<string>& in);
void tick();
+ void breakNext();
+ bool shouldBreak();
+
CDat getRegister(const int) const;
void setRegister(const int, CDat);
#include "extensions/cprog.hpp"
#include "extensions/cuart.hpp"
+#include <signal.h>
+
#include "SReadline/SReadline.h"
using namespace swift;
bool exitProg = false;
+void signalCpuBreak(int)
+{
+ global_cpu->breakNext();
+}
+
void doExit(const vector<string>&)
{
exitProg = true;
while(1) {
try {
auto breakp = find(breakpoints.begin(), breakpoints.end(), global_cpu->getNextPC());
- if(breakp == breakpoints.end() || ignoreBreak) {
+ if((breakp == breakpoints.end() || ignoreBreak) && !global_cpu->shouldBreak() ) {
global_cpu->tick();
ignoreBreak = false;
}
global_cpu = &cpu;
+ signal(SIGINT, signalCpuBreak);
Iinstr::setCPU(&cpu);
Iext::setCPU(&cpu);
{
//cout << "should exec " << this->toString() << endl;
CDat pc = this->m_cpu->getRegister(this->m_rd);
+ pc *= 4; //komisch fix?
if(this->m_typ == 1) {
CDat sp = this->m_cpu->getStack();