interrupt version 1

[calu.git] / transcript

diff --git a/transcript b/transcript
index fb6bf88ef9c64976bc40a25755d5720674e59963..f43f4eaee30d1aa178e0b5f67b55ae280fd16a40 100644 (file)
--- a/transcript
+++ b/transcript
@@ -1,9 +1,12 @@
+pwd
+# /home/stefan/processor/calu
 cd cpu/sim
 # reading modelsim.ini
 ls
 # modelsim.ini
 # testcore1.do
 # testcore.do
+# transcript
 # vsim.wlf
 # wave.do
 # work
@@ -31,75 +34,14 @@ do testcore.do
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package mem_pkg
-# -- Compiling entity r2_w_ram
-# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
-# -- Loading package standard
-# -- Loading package std_logic_1164
-# -- Loading package numeric_std
-# -- Loading package mem_pkg
-# -- Compiling architecture behaviour of r2_w_ram
-# -- Loading entity r2_w_ram
-# ** Warning: ../src/r2_w_ram_b.vhd(18): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association.
-# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
-# -- Loading package standard
-# -- Loading package std_logic_1164
-# -- Loading package numeric_std
-# -- Compiling entity rom
-# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
-# -- Loading package standard
-# -- Loading package std_logic_1164
-# -- Loading package numeric_std
-# -- Loading package mem_pkg
-# -- Compiling architecture behaviour of rom
-# -- Loading entity rom
-# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
-# -- Loading package standard
-# -- Loading package std_logic_1164
-# -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Compiling package extension_pkg
-# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
-# -- Loading package standard
-# -- Loading package std_logic_1164
-# -- Loading package numeric_std
-# -- Compiling package common_pkg
-# -- Compiling package body common_pkg
-# -- Loading package common_pkg
-# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
-# -- Loading package standard
-# -- Loading package std_logic_1164
-# -- Loading package numeric_std
-# -- Loading package common_pkg
-# ** Error: (vcom-13) Recompile work.extension_pkg because work.common_pkg has changed.
-# ** Error: ../src/core_pkg.vhd(7): (vcom-1195) Cannot find expanded name "work.extension_pkg".
-# ** Error: ../src/core_pkg.vhd(7): Unknown expanded name.
-# ** Error: ../src/core_pkg.vhd(9): VHDL Compiler exiting
-# ** Error: /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
-# Error in macro ./testcore.do line 13
-# /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
-#     while executing
-# "vcom -work work ../src/core_pkg.vhd"
-do testcore.do
-# ** Warning: (vlib-34) Library already exists at "work".
-# Modifying modelsim.ini
-# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
-# -- Loading package standard
-# -- Loading package std_logic_1164
-# -- Loading package numeric_std
-# -- Compiling package mem_pkg
-# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
-# -- Loading package standard
-# -- Loading package std_logic_1164
-# -- Loading package numeric_std
-# -- Compiling entity r_w_ram
+# -- Compiling entity r_w_ram_be
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package mem_pkg
-# -- Compiling architecture behaviour of r_w_ram
-# -- Loading entity r_w_ram
+# -- Compiling architecture behaviour of r_w_ram_be
+# -- Loading entity r_w_ram_be
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
@@ -138,82 +80,67 @@ do testcore.do
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package common_pkg
-# ** Error: (vcom-13) Recompile work.extension_pkg because work.common_pkg has changed.
-# ** Error: ../src/core_pkg.vhd(7): (vcom-1195) Cannot find expanded name "work.extension_pkg".
-# ** Error: ../src/core_pkg.vhd(7): Unknown expanded name.
-# ** Error: ../src/core_pkg.vhd(9): VHDL Compiler exiting
-# ** Error: /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
-# Error in macro ./testcore.do line 12
-# /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
-#     while executing
-# "vcom -work work ../src/core_pkg.vhd"
-do testcore.do
-# ** Warning: (vlib-34) Library already exists at "work".
-# Modifying modelsim.ini
-# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
-# -- Loading package standard
-# -- Loading package std_logic_1164
-# -- Loading package numeric_std
-# -- Compiling package mem_pkg
-# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
-# -- Loading package standard
-# -- Loading package std_logic_1164
-# -- Loading package numeric_std
-# -- Compiling entity r_w_ram
-# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
-# -- Loading package standard
-# -- Loading package std_logic_1164
-# -- Loading package numeric_std
-# -- Loading package mem_pkg
-# -- Compiling architecture behaviour of r_w_ram
-# -- Loading entity r_w_ram
+# -- Compiling package extension_pkg
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package mem_pkg
-# -- Compiling entity r2_w_ram
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Compiling package core_pkg
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package mem_pkg
-# -- Compiling architecture behaviour of r2_w_ram
-# -- Loading entity r2_w_ram
-# ** Warning: ../src/r2_w_ram_b.vhd(18): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association.
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Compiling package extension_uart_pkg
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Compiling entity rom
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package extension_uart_pkg
+# -- Compiling entity extension_uart
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
 # -- Loading package mem_pkg
-# -- Compiling architecture behaviour of rom
-# -- Loading entity rom
+# -- Loading package extension_uart_pkg
+# -- Compiling architecture behav of extension_uart
+# -- Loading entity extension_uart
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Compiling package common_pkg
-# -- Compiling package body common_pkg
 # -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Compiling entity extension_interrupt
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package common_pkg
-# ** Error: (vcom-13) Recompile work.extension_pkg because work.common_pkg has changed.
-# ** Error: ../src/core_pkg.vhd(7): (vcom-1195) Cannot find expanded name "work.extension_pkg".
-# ** Error: ../src/core_pkg.vhd(7): Unknown expanded name.
-# ** Error: ../src/core_pkg.vhd(9): VHDL Compiler exiting
+# -- Loading package extension_pkg
+# -- Compiling architecture behav of extension_interrupt
+# -- Loading entity extension_interrupt
+# ** Error: ../src/extension_interrupt_b.vhd(64): (vcom-1136) Unknown identifier "w2_uart_config".
+# ** Error: ../src/extension_interrupt_b.vhd(64): Expression is not a signal.
+# ** Error: ../src/extension_interrupt_b.vhd(64): (vcom-1136) Unknown identifier "w3_uart_send".
+# ** Error: ../src/extension_interrupt_b.vhd(64): Expression is not a signal.
+# ** Error: ../src/extension_interrupt_b.vhd(64): (vcom-1136) Unknown identifier "w4_uart_receive".
+# ** Error: ../src/extension_interrupt_b.vhd(64): Expression is not a signal.
+# ** Error: ../src/extension_interrupt_b.vhd(132): VHDL Compiler exiting
 # ** Error: /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
-# Error in macro ./testcore.do line 12
+# Error in macro ./testcore.do line 20
 # /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
 #     while executing
-# "vcom -work work ../src/core_pkg.vhd"
+# "vcom -work work ../src/extension_interrupt_b.vhd"
 do testcore.do
 # ** Warning: (vlib-34) Library already exists at "work".
 # Modifying modelsim.ini
@@ -238,6 +165,18 @@ do testcore.do
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
+# -- Compiling entity r_w_ram_be
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of r_w_ram_be
+# -- Loading entity r_w_ram_be
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
 # -- Loading package mem_pkg
 # -- Compiling entity r2_w_ram
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
@@ -312,6 +251,21 @@ do testcore.do
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
+# -- Compiling entity extension_interrupt
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Compiling architecture behav of extension_interrupt
+# -- Loading entity extension_interrupt
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
 # -- Compiling package extension_7seg_pkg
 # -- Compiling package body extension_7seg_pkg
 # -- Loading package extension_7seg_pkg
@@ -398,174 +352,172 @@ do testcore.do
 # -- Loading package core_pkg
 # -- Compiling architecture behav_d of decoder
 # -- Loading entity decoder
+# ** Error: ../src/decoder_b.vhd(35): (vcom-1312) Unknown record element "int" for selected name prefix "instr_s" of record type "work.common_pkg.instruction_rec".
+# ** Error: ../src/decoder_b.vhd(358): (vcom-1312) Unknown record element "int" for selected name prefix "instr_s" of record type "work.common_pkg.instruction_rec".
+# ** Error: ../src/decoder_b.vhd(437): VHDL Compiler exiting
+# ** Error: /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
+# Error in macro ./testcore.do line 30
+# /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
+#     while executing
+# "vcom -work work ../src/decoder_b.vhd"
+do testcore.do
+# ** Warning: (vlib-34) Library already exists at "work".
+# Modifying modelsim.ini
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package core_pkg
-# -- Compiling entity fetch_stage
+# -- Compiling package mem_pkg
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Compiling entity r_w_ram
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package core_pkg
 # -- Loading package mem_pkg
-# -- Compiling architecture behav of fetch_stage
-# -- Loading entity fetch_stage
+# -- Compiling architecture behaviour of r_w_ram
+# -- Loading entity r_w_ram
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package core_pkg
-# -- Compiling entity decode_stage
+# -- Compiling entity r_w_ram_be
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package mem_pkg
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package core_pkg
-# -- Compiling architecture behav of decode_stage
-# -- Loading entity decode_stage
+# -- Compiling architecture behaviour of r_w_ram_be
+# -- Loading entity r_w_ram_be
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Compiling package alu_pkg
-# -- Compiling package body alu_pkg
-# -- Loading package alu_pkg
+# -- Loading package mem_pkg
+# -- Compiling entity r2_w_ram
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Compiling package extension_pkg
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of r2_w_ram
+# -- Loading entity r2_w_ram
+# ** Warning: ../src/r2_w_ram_b.vhd(18): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association.
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling entity exec_op
+# -- Compiling entity rom
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture add_op of exec_op
-# -- Loading entity exec_op
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of rom
+# -- Loading entity rom
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
+# -- Compiling package common_pkg
+# -- Compiling package body common_pkg
 # -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture and_op of exec_op
-# -- Loading entity exec_op
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture or_op of exec_op
-# -- Loading entity exec_op
+# -- Compiling package extension_pkg
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture xor_op of exec_op
-# -- Loading entity exec_op
+# -- Compiling package core_pkg
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture shift_op of exec_op
-# -- Loading entity exec_op
+# -- Compiling package extension_uart_pkg
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling entity alu
+# -- Loading package extension_uart_pkg
+# -- Compiling entity extension_uart
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture behaviour of alu
-# -- Loading entity alu
-# -- Loading entity exec_op
+# -- Loading package core_pkg
+# -- Loading package mem_pkg
+# -- Loading package extension_uart_pkg
+# -- Compiling architecture behav of extension_uart
+# -- Loading entity extension_uart
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package common_pkg
-# -- Compiling package extension_pkg
+# -- Loading package extension_pkg
+# -- Compiling entity extension_interrupt
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
-# -- Compiling entity extension_gpm
+# -- Compiling architecture behav of extension_interrupt
+# -- Loading entity extension_interrupt
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
-# -- Loading package core_pkg
-# -- Loading package mem_pkg
-# -- Compiling architecture behav of extension_gpm
-# -- Loading entity extension_gpm
+# -- Compiling package extension_7seg_pkg
+# -- Compiling package body extension_7seg_pkg
+# -- Loading package extension_7seg_pkg
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling entity execute_stage
+# -- Loading package extension_7seg_pkg
+# -- Compiling entity extension_7seg
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture behav of execute_stage
-# -- Loading entity execute_stage
+# -- Loading package core_pkg
+# -- Loading package mem_pkg
+# -- Loading package extension_7seg_pkg
+# -- Compiling architecture behav of extension_7seg
+# -- Loading entity extension_7seg
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
+# -- Loading package std_logic_arith
+# -- Loading package std_logic_unsigned
 # -- Loading package numeric_std
 # -- Loading package common_pkg
-# -- Compiling entity writeback_stage
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Loading package extension_uart_pkg
+# -- Compiling entity rs232_tx
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
@@ -573,83 +525,60 @@ do testcore.do
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
 # -- Loading package core_pkg
-# -- Loading package mem_pkg
 # -- Loading package extension_uart_pkg
-# -- Loading package extension_7seg_pkg
-# -- Compiling architecture behav of writeback_stage
-# -- Loading entity writeback_stage
-# ** Warning: ../src/writeback_stage_b.vhd(298): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(314): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(332): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(345): Case choice must be a locally static expression.
+# -- Compiling architecture beh of rs232_tx
+# -- Loading package std_logic_arith
+# -- Loading package std_logic_unsigned
+# -- Loading entity rs232_tx
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
+# -- Loading package std_logic_arith
+# -- Loading package std_logic_unsigned
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
 # -- Loading package core_pkg
-# -- Compiling entity pipeline_tb
-# -- Compiling architecture behavior of pipeline_tb
-# -- Compiling configuration pipeline_conf_beh
-# -- Loading entity pipeline_tb
-# -- Loading architecture behavior of pipeline_tb
-# -- Loading entity fetch_stage
-# -- Loading entity decode_stage
-# -- Loading package alu_pkg
-# -- Loading entity execute_stage
-# -- Loading entity writeback_stage
-# vsim -t ns work.pipeline_conf_beh 
-# Loading std.standard
-# Loading ieee.std_logic_1164(body)
-# Loading ieee.numeric_std(body)
-# Loading work.common_pkg(body)
-# Loading work.extension_pkg
-# Loading work.core_pkg
-# Loading work.alu_pkg(body)
-# Loading work.pipeline_conf_beh
-# Loading work.pipeline_tb(behavior)
-# Loading work.mem_pkg
-# Loading work.fetch_stage(behav)
-# Loading work.r_w_ram(behaviour)
-# Loading work.decode_stage(behav)
-# Loading work.r2_w_ram(behaviour)
-# Loading work.decoder(behav_d)
-# Loading work.execute_stage(behav)
-# Loading work.alu(behaviour)
-# Loading work.exec_op(add_op)
-# Loading work.exec_op(and_op)
-# Loading work.exec_op(or_op)
-# Loading work.exec_op(xor_op)
-# Loading work.exec_op(shift_op)
-# Loading work.extension_gpm(behav)
-# Loading work.extension_uart_pkg
-# Loading work.extension_7seg_pkg(body)
-# Loading work.writeback_stage(behav)
-# Loading work.extension_uart(behav)
-# Loading ieee.std_logic_arith(body)
-# Loading ieee.std_logic_unsigned(body)
-# Loading work.rs232_tx(beh)
-# Loading work.rs232_rx(beh)
-# Loading work.extension_7seg(behav)
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/writeback_st
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/exec_st/gpmp_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 1  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 3  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 4  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 5  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 20 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st/data_ram
+# -- Loading package extension_uart_pkg
+# -- Compiling entity rs232_rx
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package extension_uart_pkg
+# -- Loading package core_pkg
+# -- Compiling architecture beh of rs232_rx
+# -- Loading package std_logic_arith
+# -- Loading package std_logic_unsigned
+# -- Loading entity rs232_rx
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Compiling entity decoder
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package mem_pkg
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Compiling architecture behav_d of decoder
+# -- Loading entity decoder
+# ** Error: ../src/decoder_b.vhd(35): (vcom-1312) Unknown record element "int" for selected name prefix "instr_s" of record type "work.common_pkg.instruction_rec".
+# ** Error: ../src/decoder_b.vhd(358): (vcom-1312) Unknown record element "int" for selected name prefix "instr_s" of record type "work.common_pkg.instruction_rec".
+# ** Error: ../src/decoder_b.vhd(437): VHDL Compiler exiting
+# ** Error: /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
+# Error in macro ./testcore.do line 30
+# /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
+#     while executing
+# "vcom -work work ../src/decoder_b.vhd"
 do testcore.do
 # ** Warning: (vlib-34) Library already exists at "work".
 # Modifying modelsim.ini
@@ -674,6 +603,18 @@ do testcore.do
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
+# -- Compiling entity r_w_ram_be
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of r_w_ram_be
+# -- Loading entity r_w_ram_be
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
 # -- Loading package mem_pkg
 # -- Compiling entity r2_w_ram
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
@@ -748,6 +689,21 @@ do testcore.do
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
+# -- Compiling entity extension_interrupt
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Compiling architecture behav of extension_interrupt
+# -- Loading entity extension_interrupt
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
 # -- Compiling package extension_7seg_pkg
 # -- Compiling package body extension_7seg_pkg
 # -- Loading package extension_7seg_pkg
@@ -852,156 +808,171 @@ do testcore.do
 # -- Loading package mem_pkg
 # -- Compiling architecture behav of fetch_stage
 # -- Loading entity fetch_stage
+# ** Error: ../src/fetch_stage_b.vhd(100): Illegal type conversion from std.standard.integer to ieee.numeric_std.unsigned (numeric to array).
+# ** Error: ../src/fetch_stage_b.vhd(113): VHDL Compiler exiting
+# ** Error: /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
+# Error in macro ./testcore.do line 32
+# /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
+#     while executing
+# "vcom -work work ../src/fetch_stage_b.vhd"
+do testcore.do
+# ** Warning: (vlib-34) Library already exists at "work".
+# Modifying modelsim.ini
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package core_pkg
-# -- Compiling entity decode_stage
+# -- Compiling package mem_pkg
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Compiling entity r_w_ram
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package mem_pkg
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package core_pkg
-# -- Compiling architecture behav of decode_stage
-# -- Loading entity decode_stage
+# -- Compiling architecture behaviour of r_w_ram
+# -- Loading entity r_w_ram
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Compiling package alu_pkg
-# -- Compiling package body alu_pkg
-# -- Loading package alu_pkg
+# -- Compiling entity r_w_ram_be
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Compiling package extension_pkg
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of r_w_ram_be
+# -- Loading entity r_w_ram_be
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling entity exec_op
+# -- Loading package mem_pkg
+# -- Compiling entity r2_w_ram
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture add_op of exec_op
-# -- Loading entity exec_op
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of r2_w_ram
+# -- Loading entity r2_w_ram
+# ** Warning: ../src/r2_w_ram_b.vhd(18): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association.
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Compiling entity rom
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of rom
+# -- Loading entity rom
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Compiling package common_pkg
+# -- Compiling package body common_pkg
 # -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture and_op of exec_op
-# -- Loading entity exec_op
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture or_op of exec_op
-# -- Loading entity exec_op
+# -- Compiling package extension_pkg
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture xor_op of exec_op
-# -- Loading entity exec_op
+# -- Compiling package core_pkg
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture shift_op of exec_op
-# -- Loading entity exec_op
+# -- Compiling package extension_uart_pkg
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling entity alu
+# -- Loading package extension_uart_pkg
+# -- Compiling entity extension_uart
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture behaviour of alu
-# -- Loading entity alu
-# -- Loading entity exec_op
+# -- Loading package core_pkg
+# -- Loading package mem_pkg
+# -- Loading package extension_uart_pkg
+# -- Compiling architecture behav of extension_uart
+# -- Loading entity extension_uart
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package common_pkg
-# -- Compiling package extension_pkg
+# -- Loading package extension_pkg
+# -- Compiling entity extension_interrupt
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
-# -- Compiling entity extension_gpm
+# -- Compiling architecture behav of extension_interrupt
+# -- Loading entity extension_interrupt
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
-# -- Loading package core_pkg
-# -- Loading package mem_pkg
-# -- Compiling architecture behav of extension_gpm
-# -- Loading entity extension_gpm
+# -- Compiling package extension_7seg_pkg
+# -- Compiling package body extension_7seg_pkg
+# -- Loading package extension_7seg_pkg
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling entity execute_stage
+# -- Loading package extension_7seg_pkg
+# -- Compiling entity extension_7seg
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture behav of execute_stage
-# -- Loading entity execute_stage
+# -- Loading package core_pkg
+# -- Loading package mem_pkg
+# -- Loading package extension_7seg_pkg
+# -- Compiling architecture behav of extension_7seg
+# -- Loading entity extension_7seg
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
+# -- Loading package std_logic_arith
+# -- Loading package std_logic_unsigned
 # -- Loading package numeric_std
 # -- Loading package common_pkg
-# -- Compiling entity writeback_stage
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Loading package extension_uart_pkg
+# -- Compiling entity rs232_tx
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
@@ -1009,84 +980,77 @@ do testcore.do
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
 # -- Loading package core_pkg
-# -- Loading package mem_pkg
 # -- Loading package extension_uart_pkg
-# -- Loading package extension_7seg_pkg
-# -- Compiling architecture behav of writeback_stage
-# -- Loading entity writeback_stage
-# ** Warning: ../src/writeback_stage_b.vhd(298): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(314): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(332): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(345): Case choice must be a locally static expression.
+# -- Compiling architecture beh of rs232_tx
+# -- Loading package std_logic_arith
+# -- Loading package std_logic_unsigned
+# -- Loading entity rs232_tx
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
+# -- Loading package std_logic_arith
+# -- Loading package std_logic_unsigned
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
 # -- Loading package core_pkg
-# -- Compiling entity pipeline_tb
-# -- Compiling architecture behavior of pipeline_tb
-# -- Compiling configuration pipeline_conf_beh
-# -- Loading entity pipeline_tb
-# -- Loading architecture behavior of pipeline_tb
+# -- Loading package extension_uart_pkg
+# -- Compiling entity rs232_rx
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package extension_uart_pkg
+# -- Loading package core_pkg
+# -- Compiling architecture beh of rs232_rx
+# -- Loading package std_logic_arith
+# -- Loading package std_logic_unsigned
+# -- Loading entity rs232_rx
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Compiling entity decoder
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package mem_pkg
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Compiling architecture behav_d of decoder
+# -- Loading entity decoder
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Compiling entity fetch_stage
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Loading package mem_pkg
+# -- Compiling architecture behav of fetch_stage
 # -- Loading entity fetch_stage
-# -- Loading entity decode_stage
-# -- Loading package alu_pkg
-# -- Loading entity execute_stage
-# -- Loading entity writeback_stage
-# vsim -t ns work.pipeline_conf_beh 
-# Loading std.standard
-# Loading ieee.std_logic_1164(body)
-# Loading ieee.numeric_std(body)
-# Loading work.common_pkg(body)
-# Loading work.extension_pkg
-# Loading work.core_pkg
-# Loading work.alu_pkg(body)
-# Loading work.pipeline_conf_beh
-# Loading work.pipeline_tb(behavior)
-# Loading work.mem_pkg
-# Loading work.fetch_stage(behav)
-# Loading work.rom(behaviour)
-# Loading work.decode_stage(behav)
-# Loading work.r2_w_ram(behaviour)
-# Loading work.decoder(behav_d)
-# Loading work.execute_stage(behav)
-# Loading work.alu(behaviour)
-# Loading work.exec_op(add_op)
-# Loading work.exec_op(and_op)
-# Loading work.exec_op(or_op)
-# Loading work.exec_op(xor_op)
-# Loading work.exec_op(shift_op)
-# Loading work.extension_gpm(behav)
-# Loading work.extension_uart_pkg
-# Loading work.extension_7seg_pkg(body)
-# Loading work.writeback_stage(behav)
-# Loading work.r_w_ram(behaviour)
-# Loading work.extension_uart(behav)
-# Loading ieee.std_logic_arith(body)
-# Loading ieee.std_logic_unsigned(body)
-# Loading work.rs232_tx(beh)
-# Loading work.rs232_rx(beh)
-# Loading work.extension_7seg(behav)
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/writeback_st
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/exec_st/gpmp_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 1  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 3  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 4  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 5  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 20 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st/data_ram
+# ** Error: ../src/fetch_stage_b.vhd(100): Illegal type conversion from std.standard.integer to ieee.std_logic_1164.std_logic_vector (numeric to array).
+# ** Error: ../src/fetch_stage_b.vhd(113): VHDL Compiler exiting
+# ** Error: /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
+# Error in macro ./testcore.do line 32
+# /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
+#     while executing
+# "vcom -work work ../src/fetch_stage_b.vhd"
 do testcore.do
 # ** Warning: (vlib-34) Library already exists at "work".
 # Modifying modelsim.ini
@@ -1111,6 +1075,18 @@ do testcore.do
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
+# -- Compiling entity r_w_ram_be
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of r_w_ram_be
+# -- Loading entity r_w_ram_be
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
 # -- Loading package mem_pkg
 # -- Compiling entity r2_w_ram
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
@@ -1185,6 +1161,21 @@ do testcore.do
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
+# -- Compiling entity extension_interrupt
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Compiling architecture behav of extension_interrupt
+# -- Loading entity extension_interrupt
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
 # -- Compiling package extension_7seg_pkg
 # -- Compiling package body extension_7seg_pkg
 # -- Loading package extension_7seg_pkg
@@ -1289,241 +1280,154 @@ do testcore.do
 # -- Loading package mem_pkg
 # -- Compiling architecture behav of fetch_stage
 # -- Loading entity fetch_stage
+# ** Error: ../src/fetch_stage_b.vhd(100): No feasible entries for subprogram "to_unsigned".
+# ** Error: ../src/fetch_stage_b.vhd(100): Illegal type conversion to ieee.std_logic_1164.std_logic_vector (operand type is not known).
+# ** Error: ../src/fetch_stage_b.vhd(113): VHDL Compiler exiting
+# ** Error: /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
+# Error in macro ./testcore.do line 32
+# /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
+#     while executing
+# "vcom -work work ../src/fetch_stage_b.vhd"
+do testcore.do
+# ** Warning: (vlib-34) Library already exists at "work".
+# Modifying modelsim.ini
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package core_pkg
-# -- Compiling entity decode_stage
+# -- Compiling package mem_pkg
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package mem_pkg
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package core_pkg
-# -- Compiling architecture behav of decode_stage
-# -- Loading entity decode_stage
+# -- Compiling entity r_w_ram
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Compiling package alu_pkg
-# -- Compiling package body alu_pkg
-# -- Loading package alu_pkg
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of r_w_ram
+# -- Loading entity r_w_ram
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Compiling package extension_pkg
+# -- Compiling entity r_w_ram_be
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling entity exec_op
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of r_w_ram_be
+# -- Loading entity r_w_ram_be
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture add_op of exec_op
-# -- Loading entity exec_op
+# -- Loading package mem_pkg
+# -- Compiling entity r2_w_ram
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture and_op of exec_op
-# -- Loading entity exec_op
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of r2_w_ram
+# -- Loading entity r2_w_ram
+# ** Warning: ../src/r2_w_ram_b.vhd(18): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association.
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture or_op of exec_op
-# -- Loading entity exec_op
+# -- Compiling entity rom
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture xor_op of exec_op
-# -- Loading entity exec_op
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of rom
+# -- Loading entity rom
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture shift_op of exec_op
-# -- Loading entity exec_op
+# -- Compiling package common_pkg
+# ** Error: ../src/common_pkg.vhd(84): (vcom-1272) Length of expected is 12; length of actual is 11.
+# ** Error: ../src/common_pkg.vhd(173): VHDL Compiler exiting
+# ** Error: /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
+# Error in macro ./testcore.do line 13
+# /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
+#     while executing
+# "vcom -work work ../src/common_pkg.vhd"
+do testcore.do
+# ** Warning: (vlib-34) Library already exists at "work".
+# Modifying modelsim.ini
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling entity alu
+# -- Compiling package mem_pkg
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture behaviour of alu
-# -- Loading entity alu
-# -- Loading entity exec_op
+# -- Compiling entity r_w_ram
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Compiling package extension_pkg
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of r_w_ram
+# -- Loading entity r_w_ram
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Compiling entity extension_gpm
+# -- Compiling entity r_w_ram_be
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package core_pkg
 # -- Loading package mem_pkg
-# -- Compiling architecture behav of extension_gpm
-# -- Loading entity extension_gpm
+# -- Compiling architecture behaviour of r_w_ram_be
+# -- Loading entity r_w_ram_be
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling entity execute_stage
+# -- Loading package mem_pkg
+# -- Compiling entity r2_w_ram
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture behav of execute_stage
-# -- Loading entity execute_stage
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of r2_w_ram
+# -- Loading entity r2_w_ram
+# ** Warning: ../src/r2_w_ram_b.vhd(18): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association.
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Compiling entity writeback_stage
+# -- Compiling entity rom
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package core_pkg
 # -- Loading package mem_pkg
-# -- Loading package extension_uart_pkg
-# -- Loading package extension_7seg_pkg
-# -- Compiling architecture behav of writeback_stage
-# -- Loading entity writeback_stage
-# ** Warning: ../src/writeback_stage_b.vhd(298): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(314): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(332): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(345): Case choice must be a locally static expression.
+# -- Compiling architecture behaviour of rom
+# -- Loading entity rom
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package core_pkg
-# -- Compiling entity pipeline_tb
-# -- Compiling architecture behavior of pipeline_tb
-# -- Compiling configuration pipeline_conf_beh
-# -- Loading entity pipeline_tb
-# -- Loading architecture behavior of pipeline_tb
-# -- Loading entity fetch_stage
-# -- Loading entity decode_stage
-# -- Loading package alu_pkg
-# -- Loading entity execute_stage
-# -- Loading entity writeback_stage
-# vsim -t ns work.pipeline_conf_beh 
-# Loading std.standard
-# Loading ieee.std_logic_1164(body)
-# Loading ieee.numeric_std(body)
-# Loading work.common_pkg(body)
-# Loading work.extension_pkg
-# Loading work.core_pkg
-# Loading work.alu_pkg(body)
-# Loading work.pipeline_conf_beh
-# Loading work.pipeline_tb(behavior)
-# Loading work.mem_pkg
-# Loading work.fetch_stage(behav)
-# Loading work.rom(behaviour)
-# Loading work.decode_stage(behav)
-# Loading work.r2_w_ram(behaviour)
-# Loading work.decoder(behav_d)
-# Loading work.execute_stage(behav)
-# Loading work.alu(behaviour)
-# Loading work.exec_op(add_op)
-# Loading work.exec_op(and_op)
-# Loading work.exec_op(or_op)
-# Loading work.exec_op(xor_op)
-# Loading work.exec_op(shift_op)
-# Loading work.extension_gpm(behav)
-# Loading work.extension_uart_pkg
-# Loading work.extension_7seg_pkg(body)
-# Loading work.writeback_stage(behav)
-# Loading work.r_w_ram(behaviour)
-# Loading work.extension_uart(behav)
-# Loading ieee.std_logic_arith(body)
-# Loading ieee.std_logic_unsigned(body)
-# Loading work.rs232_tx(beh)
-# Loading work.rs232_rx(beh)
-# Loading work.extension_7seg(behav)
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/writeback_st
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/exec_st/gpmp_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 1  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 3  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 4  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 5  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 20 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st/data_ram
+# -- Compiling package common_pkg
+# ** Error: ../src/common_pkg.vhd(84): (vcom-1272) Length of expected is 12; length of actual is 11.
+# ** Error: ../src/common_pkg.vhd(173): VHDL Compiler exiting
+# ** Error: /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
+# Error in macro ./testcore.do line 13
+# /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
+#     while executing
+# "vcom -work work ../src/common_pkg.vhd"
 do testcore.do
 # ** Warning: (vlib-34) Library already exists at "work".
 # Modifying modelsim.ini
@@ -1548,6 +1452,18 @@ do testcore.do
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
+# -- Compiling entity r_w_ram_be
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of r_w_ram_be
+# -- Loading entity r_w_ram_be
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
 # -- Loading package mem_pkg
 # -- Compiling entity r2_w_ram
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
@@ -1622,6 +1538,21 @@ do testcore.do
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
+# -- Compiling entity extension_interrupt
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Compiling architecture behav of extension_interrupt
+# -- Loading entity extension_interrupt
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
 # -- Compiling package extension_7seg_pkg
 # -- Compiling package body extension_7seg_pkg
 # -- Loading package extension_7seg_pkg
@@ -1726,6 +1657,7 @@ do testcore.do
 # -- Loading package mem_pkg
 # -- Compiling architecture behav of fetch_stage
 # -- Loading entity fetch_stage
+# ** Warning: [14] ../src/fetch_stage_b.vhd(100): (vcom-1272) Length of expected is 16; length of actual is 11.
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
@@ -1888,79 +1820,18 @@ do testcore.do
 # -- Loading package extension_7seg_pkg
 # -- Compiling architecture behav of writeback_stage
 # -- Loading entity writeback_stage
-# ** Warning: ../src/writeback_stage_b.vhd(298): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(314): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(332): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(345): Case choice must be a locally static expression.
-# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
-# -- Loading package standard
-# -- Loading package std_logic_1164
-# -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package core_pkg
-# -- Compiling entity pipeline_tb
-# -- Compiling architecture behavior of pipeline_tb
-# -- Compiling configuration pipeline_conf_beh
-# -- Loading entity pipeline_tb
-# -- Loading architecture behavior of pipeline_tb
-# -- Loading entity fetch_stage
-# -- Loading entity decode_stage
-# -- Loading package alu_pkg
-# -- Loading entity execute_stage
-# -- Loading entity writeback_stage
-# vsim -t ns work.pipeline_conf_beh 
-# Loading std.standard
-# Loading ieee.std_logic_1164(body)
-# Loading ieee.numeric_std(body)
-# Loading work.common_pkg(body)
-# Loading work.extension_pkg
-# Loading work.core_pkg
-# Loading work.alu_pkg(body)
-# Loading work.pipeline_conf_beh
-# Loading work.pipeline_tb(behavior)
-# Loading work.mem_pkg
-# Loading work.fetch_stage(behav)
-# Loading work.rom(behaviour)
-# Loading work.decode_stage(behav)
-# Loading work.r2_w_ram(behaviour)
-# Loading work.decoder(behav_d)
-# Loading work.execute_stage(behav)
-# Loading work.alu(behaviour)
-# Loading work.exec_op(add_op)
-# Loading work.exec_op(and_op)
-# Loading work.exec_op(or_op)
-# Loading work.exec_op(xor_op)
-# Loading work.exec_op(shift_op)
-# Loading work.extension_gpm(behav)
-# Loading work.extension_uart_pkg
-# Loading work.extension_7seg_pkg(body)
-# Loading work.writeback_stage(behav)
-# Loading work.r_w_ram(behaviour)
-# Loading work.extension_uart(behav)
-# Loading ieee.std_logic_arith(body)
-# Loading ieee.std_logic_unsigned(body)
-# Loading work.rs232_tx(beh)
-# Loading work.rs232_rx(beh)
-# Loading work.extension_7seg(behav)
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/writeback_st
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/exec_st/gpmp_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 1  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 3  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 4  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 5  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 20 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st/data_ram
+# ** Error: ../src/writeback_stage_b.vhd(91): Cannot assign to object "int_req" of mode IN.
+# ** Warning: ../src/writeback_stage_b.vhd(334): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(350): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(366): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(384): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(397): Case choice must be a locally static expression.
+# ** Error: ../src/writeback_stage_b.vhd(417): VHDL Compiler exiting
+# ** Error: /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
+# Error in macro ./testcore.do line 62
+# /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
+#     while executing
+# "vcom -work work ../src/writeback_stage_b.vhd"
 do testcore.do
 # ** Warning: (vlib-34) Library already exists at "work".
 # Modifying modelsim.ini
@@ -1985,6 +1856,18 @@ do testcore.do
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
+# -- Compiling entity r_w_ram_be
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of r_w_ram_be
+# -- Loading entity r_w_ram_be
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
 # -- Loading package mem_pkg
 # -- Compiling entity r2_w_ram
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
@@ -2059,6 +1942,21 @@ do testcore.do
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
+# -- Compiling entity extension_interrupt
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Compiling architecture behav of extension_interrupt
+# -- Loading entity extension_interrupt
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
 # -- Compiling package extension_7seg_pkg
 # -- Compiling package body extension_7seg_pkg
 # -- Loading package extension_7seg_pkg
@@ -2163,6 +2061,7 @@ do testcore.do
 # -- Loading package mem_pkg
 # -- Compiling architecture behav of fetch_stage
 # -- Loading entity fetch_stage
+# ** Warning: [14] ../src/fetch_stage_b.vhd(100): (vcom-1272) Length of expected is 16; length of actual is 11.
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
@@ -2325,10 +2224,11 @@ do testcore.do
 # -- Loading package extension_7seg_pkg
 # -- Compiling architecture behav of writeback_stage
 # -- Loading entity writeback_stage
-# ** Warning: ../src/writeback_stage_b.vhd(298): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(314): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(332): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(345): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(334): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(350): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(366): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(384): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(397): Case choice must be a locally static expression.
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
@@ -2338,66 +2238,13 @@ do testcore.do
 # -- Loading package core_pkg
 # -- Compiling entity pipeline_tb
 # -- Compiling architecture behavior of pipeline_tb
-# -- Compiling configuration pipeline_conf_beh
-# -- Loading entity pipeline_tb
-# -- Loading architecture behavior of pipeline_tb
-# -- Loading entity fetch_stage
-# -- Loading entity decode_stage
-# -- Loading package alu_pkg
-# -- Loading entity execute_stage
-# -- Loading entity writeback_stage
-# vsim -t ns work.pipeline_conf_beh 
-# Loading std.standard
-# Loading ieee.std_logic_1164(body)
-# Loading ieee.numeric_std(body)
-# Loading work.common_pkg(body)
-# Loading work.extension_pkg
-# Loading work.core_pkg
-# Loading work.alu_pkg(body)
-# Loading work.pipeline_conf_beh
-# Loading work.pipeline_tb(behavior)
-# Loading work.mem_pkg
-# Loading work.fetch_stage(behav)
-# Loading work.rom(behaviour)
-# Loading work.decode_stage(behav)
-# Loading work.r2_w_ram(behaviour)
-# Loading work.decoder(behav_d)
-# Loading work.execute_stage(behav)
-# Loading work.alu(behaviour)
-# Loading work.exec_op(add_op)
-# Loading work.exec_op(and_op)
-# Loading work.exec_op(or_op)
-# Loading work.exec_op(xor_op)
-# Loading work.exec_op(shift_op)
-# Loading work.extension_gpm(behav)
-# Loading work.extension_uart_pkg
-# Loading work.extension_7seg_pkg(body)
-# Loading work.writeback_stage(behav)
-# Loading work.r_w_ram(behaviour)
-# Loading work.extension_uart(behav)
-# Loading ieee.std_logic_arith(body)
-# Loading ieee.std_logic_unsigned(body)
-# Loading work.rs232_tx(beh)
-# Loading work.rs232_rx(beh)
-# Loading work.extension_7seg(behav)
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/writeback_st
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/exec_st/gpmp_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 1  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 3  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 4  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 0 ns  Iteration: 5  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
-# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
-#    Time: 20 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st/data_ram
+# ** Error: ../src/pipeline_tb.vhd(102): (vcom-1035) Formal port "int_req" has OPEN or no actual associated with it.
+# ** Error: ../src/pipeline_tb.vhd(223): VHDL Compiler exiting
+# ** Error: /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
+# Error in macro ./testcore.do line 64
+# /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
+#     while executing
+# "vcom -work work ../src/pipeline_tb.vhd"
 do testcore.do
 # ** Warning: (vlib-34) Library already exists at "work".
 # Modifying modelsim.ini
@@ -2422,16 +2269,28 @@ do testcore.do
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package mem_pkg
-# -- Compiling entity r2_w_ram
+# -- Compiling entity r_w_ram_be
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package mem_pkg
-# -- Compiling architecture behaviour of r2_w_ram
-# -- Loading entity r2_w_ram
-# ** Warning: ../src/r2_w_ram_b.vhd(18): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association.
+# -- Compiling architecture behaviour of r_w_ram_be
+# -- Loading entity r_w_ram_be
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package mem_pkg
+# -- Compiling entity r2_w_ram
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of r2_w_ram
+# -- Loading entity r2_w_ram
+# ** Warning: ../src/r2_w_ram_b.vhd(18): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association.
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
@@ -2496,6 +2355,21 @@ do testcore.do
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
+# -- Compiling entity extension_interrupt
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Compiling architecture behav of extension_interrupt
+# -- Loading entity extension_interrupt
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
 # -- Compiling package extension_7seg_pkg
 # -- Compiling package body extension_7seg_pkg
 # -- Loading package extension_7seg_pkg
@@ -2600,6 +2474,7 @@ do testcore.do
 # -- Loading package mem_pkg
 # -- Compiling architecture behav of fetch_stage
 # -- Loading entity fetch_stage
+# ** Warning: [14] ../src/fetch_stage_b.vhd(100): (vcom-1272) Length of expected is 16; length of actual is 11.
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
@@ -2762,10 +2637,11 @@ do testcore.do
 # -- Loading package extension_7seg_pkg
 # -- Compiling architecture behav of writeback_stage
 # -- Loading entity writeback_stage
-# ** Warning: ../src/writeback_stage_b.vhd(298): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(314): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(332): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(345): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(334): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(350): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(366): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(384): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(397): Case choice must be a locally static expression.
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
@@ -2795,6 +2671,7 @@ do testcore.do
 # Loading work.pipeline_tb(behavior)
 # Loading work.mem_pkg
 # Loading work.fetch_stage(behav)
+# Loading work.r_w_ram(behaviour)
 # Loading work.rom(behaviour)
 # Loading work.decode_stage(behav)
 # Loading work.r2_w_ram(behaviour)
@@ -2810,13 +2687,14 @@ do testcore.do
 # Loading work.extension_uart_pkg
 # Loading work.extension_7seg_pkg(body)
 # Loading work.writeback_stage(behav)
-# Loading work.r_w_ram(behaviour)
+# Loading work.r_w_ram_be(behaviour)
 # Loading work.extension_uart(behav)
 # Loading ieee.std_logic_arith(body)
 # Loading ieee.std_logic_unsigned(body)
 # Loading work.rs232_tx(beh)
 # Loading work.rs232_rx(beh)
 # Loading work.extension_7seg(behav)
+# Loading work.extension_interrupt(behav)
 # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
 #    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/writeback_st
 # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
@@ -2859,6 +2737,18 @@ do testcore.do
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
+# -- Compiling entity r_w_ram_be
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of r_w_ram_be
+# -- Loading entity r_w_ram_be
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
 # -- Loading package mem_pkg
 # -- Compiling entity r2_w_ram
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
@@ -2933,6 +2823,21 @@ do testcore.do
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
+# -- Compiling entity extension_interrupt
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Compiling architecture behav of extension_interrupt
+# -- Loading entity extension_interrupt
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
 # -- Compiling package extension_7seg_pkg
 # -- Compiling package body extension_7seg_pkg
 # -- Loading package extension_7seg_pkg
@@ -2995,30 +2900,762 @@ do testcore.do
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
-# -- Loading package extension_uart_pkg
-# -- Loading package core_pkg
-# -- Compiling architecture beh of rs232_rx
-# -- Loading package std_logic_arith
-# -- Loading package std_logic_unsigned
-# -- Loading entity rs232_rx
+# -- Loading package extension_uart_pkg
+# -- Loading package core_pkg
+# -- Compiling architecture beh of rs232_rx
+# -- Loading package std_logic_arith
+# -- Loading package std_logic_unsigned
+# -- Loading entity rs232_rx
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Compiling entity decoder
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package mem_pkg
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Compiling architecture behav_d of decoder
+# -- Loading entity decoder
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Compiling entity fetch_stage
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Loading package mem_pkg
+# -- Compiling architecture behav of fetch_stage
+# -- Loading entity fetch_stage
+# ** Warning: [14] ../src/fetch_stage_b.vhd(100): (vcom-1272) Length of expected is 16; length of actual is 11.
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Compiling entity decode_stage
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package mem_pkg
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Compiling architecture behav of decode_stage
+# -- Loading entity decode_stage
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Compiling package alu_pkg
+# -- Compiling package body alu_pkg
+# -- Loading package alu_pkg
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Compiling package extension_pkg
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package alu_pkg
+# -- Compiling entity exec_op
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package alu_pkg
+# -- Compiling architecture add_op of exec_op
+# -- Loading entity exec_op
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package alu_pkg
+# -- Compiling architecture and_op of exec_op
+# -- Loading entity exec_op
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package alu_pkg
+# -- Compiling architecture or_op of exec_op
+# -- Loading entity exec_op
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package alu_pkg
+# -- Compiling architecture xor_op of exec_op
+# -- Loading entity exec_op
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package alu_pkg
+# -- Compiling architecture shift_op of exec_op
+# -- Loading entity exec_op
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package alu_pkg
+# -- Compiling entity alu
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package alu_pkg
+# -- Compiling architecture behaviour of alu
+# -- Loading entity alu
+# -- Loading entity exec_op
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Compiling package extension_pkg
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Compiling entity extension_gpm
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Loading package mem_pkg
+# -- Compiling architecture behav of extension_gpm
+# -- Loading entity extension_gpm
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package alu_pkg
+# -- Compiling entity execute_stage
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package alu_pkg
+# -- Compiling architecture behav of execute_stage
+# -- Loading entity execute_stage
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Compiling entity writeback_stage
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Loading package mem_pkg
+# -- Loading package extension_uart_pkg
+# -- Loading package extension_7seg_pkg
+# -- Compiling architecture behav of writeback_stage
+# -- Loading entity writeback_stage
+# ** Warning: ../src/writeback_stage_b.vhd(334): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(350): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(366): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(384): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(397): Case choice must be a locally static expression.
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Compiling entity pipeline_tb
+# -- Compiling architecture behavior of pipeline_tb
+# -- Compiling configuration pipeline_conf_beh
+# -- Loading entity pipeline_tb
+# -- Loading architecture behavior of pipeline_tb
+# -- Loading entity fetch_stage
+# -- Loading entity decode_stage
+# -- Loading package alu_pkg
+# -- Loading entity execute_stage
+# -- Loading entity writeback_stage
+# vsim -t ns work.pipeline_conf_beh 
+# Loading std.standard
+# Loading ieee.std_logic_1164(body)
+# Loading ieee.numeric_std(body)
+# Loading work.common_pkg(body)
+# Loading work.extension_pkg
+# Loading work.core_pkg
+# Loading work.alu_pkg(body)
+# Loading work.pipeline_conf_beh
+# Loading work.pipeline_tb(behavior)
+# Loading work.mem_pkg
+# Loading work.fetch_stage(behav)
+# Loading work.r_w_ram(behaviour)
+# Loading work.rom(behaviour)
+# Loading work.decode_stage(behav)
+# Loading work.r2_w_ram(behaviour)
+# Loading work.decoder(behav_d)
+# Loading work.execute_stage(behav)
+# Loading work.alu(behaviour)
+# Loading work.exec_op(add_op)
+# Loading work.exec_op(and_op)
+# Loading work.exec_op(or_op)
+# Loading work.exec_op(xor_op)
+# Loading work.exec_op(shift_op)
+# Loading work.extension_gpm(behav)
+# Loading work.extension_uart_pkg
+# Loading work.extension_7seg_pkg(body)
+# Loading work.writeback_stage(behav)
+# Loading work.r_w_ram_be(behaviour)
+# Loading work.extension_uart(behav)
+# Loading ieee.std_logic_arith(body)
+# Loading ieee.std_logic_unsigned(body)
+# Loading work.rs232_tx(beh)
+# Loading work.rs232_rx(beh)
+# Loading work.extension_7seg(behav)
+# Loading work.extension_interrupt(behav)
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/writeback_st
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/exec_st/gpmp_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 1  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 3  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 4  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 5  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 20 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st/data_ram
+run
+run
+run
+run
+run
+run
+run
+run
+run
+run
+run
+run
+restart
+run
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/writeback_st
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/exec_st/gpmp_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 1  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 3  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 4  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 5  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 20 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st/data_ram
+restart
+run
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/writeback_st
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/exec_st/gpmp_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 1  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 3  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 4  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 5  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 20 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st/data_ram
+restart
+run
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/writeback_st
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/exec_st/gpmp_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 1  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 3  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 4  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 5  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 20 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st/data_ram
+run -continue
+run
+restart
+run
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/writeback_st
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/exec_st/gpmp_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 1  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 3  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 4  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 5  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 20 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st/data_ram
+run
+do testcore.do
+# ** Warning: (vlib-34) Library already exists at "work".
+# Modifying modelsim.ini
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Compiling package mem_pkg
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Compiling entity r_w_ram
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of r_w_ram
+# -- Loading entity r_w_ram
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Compiling entity r_w_ram_be
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of r_w_ram_be
+# -- Loading entity r_w_ram_be
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package mem_pkg
+# -- Compiling entity r2_w_ram
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of r2_w_ram
+# -- Loading entity r2_w_ram
+# ** Warning: ../src/r2_w_ram_b.vhd(18): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association.
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Compiling entity rom
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of rom
+# -- Loading entity rom
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Compiling package common_pkg
+# -- Compiling package body common_pkg
+# -- Loading package common_pkg
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Compiling package extension_pkg
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Compiling package core_pkg
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Compiling package extension_uart_pkg
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package extension_uart_pkg
+# -- Compiling entity extension_uart
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Loading package mem_pkg
+# -- Loading package extension_uart_pkg
+# -- Compiling architecture behav of extension_uart
+# -- Loading entity extension_uart
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Compiling entity extension_interrupt
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Compiling architecture behav of extension_interrupt
+# -- Loading entity extension_interrupt
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Compiling package extension_7seg_pkg
+# -- Compiling package body extension_7seg_pkg
+# -- Loading package extension_7seg_pkg
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package extension_7seg_pkg
+# -- Compiling entity extension_7seg
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Loading package mem_pkg
+# -- Loading package extension_7seg_pkg
+# -- Compiling architecture behav of extension_7seg
+# -- Loading entity extension_7seg
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package std_logic_arith
+# -- Loading package std_logic_unsigned
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Loading package extension_uart_pkg
+# -- Compiling entity rs232_tx
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Loading package extension_uart_pkg
+# -- Compiling architecture beh of rs232_tx
+# -- Loading package std_logic_arith
+# -- Loading package std_logic_unsigned
+# -- Loading entity rs232_tx
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package std_logic_arith
+# -- Loading package std_logic_unsigned
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Loading package extension_uart_pkg
+# -- Compiling entity rs232_rx
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package extension_uart_pkg
+# -- Loading package core_pkg
+# -- Compiling architecture beh of rs232_rx
+# -- Loading package std_logic_arith
+# -- Loading package std_logic_unsigned
+# -- Loading entity rs232_rx
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Compiling entity decoder
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package mem_pkg
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Compiling architecture behav_d of decoder
+# -- Loading entity decoder
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Compiling entity fetch_stage
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Loading package mem_pkg
+# -- Compiling architecture behav of fetch_stage
+# -- Loading entity fetch_stage
+# ** Warning: [14] ../src/fetch_stage_b.vhd(100): (vcom-1272) Length of expected is 16; length of actual is 11.
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Compiling entity decode_stage
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package mem_pkg
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Compiling architecture behav of decode_stage
+# -- Loading entity decode_stage
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Compiling package alu_pkg
+# -- Compiling package body alu_pkg
+# -- Loading package alu_pkg
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Compiling package extension_pkg
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package alu_pkg
+# -- Compiling entity exec_op
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package alu_pkg
+# -- Compiling architecture add_op of exec_op
+# -- Loading entity exec_op
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package alu_pkg
+# -- Compiling architecture and_op of exec_op
+# -- Loading entity exec_op
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package alu_pkg
+# -- Compiling architecture or_op of exec_op
+# -- Loading entity exec_op
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package alu_pkg
+# -- Compiling architecture xor_op of exec_op
+# -- Loading entity exec_op
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package alu_pkg
+# -- Compiling architecture shift_op of exec_op
+# -- Loading entity exec_op
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package alu_pkg
+# -- Compiling entity alu
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package alu_pkg
+# -- Compiling architecture behaviour of alu
+# -- Loading entity alu
+# -- Loading entity exec_op
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Compiling package extension_pkg
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Compiling entity extension_gpm
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package core_pkg
+# -- Loading package mem_pkg
+# -- Compiling architecture behav of extension_gpm
+# -- Loading entity extension_gpm
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Loading package alu_pkg
+# -- Compiling entity execute_stage
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
-# -- Loading package core_pkg
-# -- Compiling entity decoder
+# -- Loading package alu_pkg
+# -- Compiling architecture behav of execute_stage
+# -- Loading entity execute_stage
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package mem_pkg
 # -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package core_pkg
-# -- Compiling architecture behav_d of decoder
-# -- Loading entity decoder
+# -- Compiling entity writeback_stage
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
@@ -3026,7 +3663,16 @@ do testcore.do
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
 # -- Loading package core_pkg
-# -- Compiling entity fetch_stage
+# -- Loading package mem_pkg
+# -- Loading package extension_uart_pkg
+# -- Loading package extension_7seg_pkg
+# -- Compiling architecture behav of writeback_stage
+# -- Loading entity writeback_stage
+# ** Warning: ../src/writeback_stage_b.vhd(334): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(350): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(366): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(384): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(397): Case choice must be a locally static expression.
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
@@ -3034,9 +3680,120 @@ do testcore.do
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
 # -- Loading package core_pkg
-# -- Loading package mem_pkg
-# -- Compiling architecture behav of fetch_stage
+# -- Compiling entity pipeline_tb
+# -- Compiling architecture behavior of pipeline_tb
+# -- Compiling configuration pipeline_conf_beh
+# -- Loading entity pipeline_tb
+# -- Loading architecture behavior of pipeline_tb
 # -- Loading entity fetch_stage
+# -- Loading entity decode_stage
+# -- Loading package alu_pkg
+# -- Loading entity execute_stage
+# -- Loading entity writeback_stage
+# vsim -t ns work.pipeline_conf_beh 
+# Loading std.standard
+# Loading ieee.std_logic_1164(body)
+# Loading ieee.numeric_std(body)
+# Loading work.common_pkg(body)
+# Loading work.extension_pkg
+# Loading work.core_pkg
+# Loading work.alu_pkg(body)
+# Loading work.pipeline_conf_beh
+# Loading work.pipeline_tb(behavior)
+# Loading work.mem_pkg
+# Loading work.fetch_stage(behav)
+# Loading work.r_w_ram(behaviour)
+# Loading work.rom(behaviour)
+# Loading work.decode_stage(behav)
+# Loading work.r2_w_ram(behaviour)
+# Loading work.decoder(behav_d)
+# Loading work.execute_stage(behav)
+# Loading work.alu(behaviour)
+# Loading work.exec_op(add_op)
+# Loading work.exec_op(and_op)
+# Loading work.exec_op(or_op)
+# Loading work.exec_op(xor_op)
+# Loading work.exec_op(shift_op)
+# Loading work.extension_gpm(behav)
+# Loading work.extension_uart_pkg
+# Loading work.extension_7seg_pkg(body)
+# Loading work.writeback_stage(behav)
+# Loading work.r_w_ram_be(behaviour)
+# Loading work.extension_uart(behav)
+# Loading ieee.std_logic_arith(body)
+# Loading ieee.std_logic_unsigned(body)
+# Loading work.rs232_tx(beh)
+# Loading work.rs232_rx(beh)
+# Loading work.extension_7seg(behav)
+# Loading work.extension_interrupt(behav)
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/writeback_st
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/exec_st/gpmp_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 1  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 3  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 4  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 5  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 20 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st/data_ram
+run
+run
+run
+run
+run
+run
+run
+# ** Fatal: (vsim-3420) Array lengths do not match. Left is 16 (22 downto 7). Right is 11 (10 downto 0).
+#    Time: 104840 ns  Iteration: 3  Process: /pipeline_tb/fetch_st/asyn File: ../src/fetch_stage_b.vhd
+# Fatal error in Process asyn at ../src/fetch_stage_b.vhd line 100
+# 
+# HDL call sequence:
+# Stopped at ../src/fetch_stage_b.vhd 100 Process asyn
+# 
+run
+# Cannot continue because of fatal error.
+# HDL call sequence:
+# Stopped at ../src/fetch_stage_b.vhd 100 Process asyn
+# 
+run
+# Cannot continue because of fatal error.
+# HDL call sequence:
+# Stopped at ../src/fetch_stage_b.vhd 100 Process asyn
+# 
+run
+# Cannot continue because of fatal error.
+# HDL call sequence:
+# Stopped at ../src/fetch_stage_b.vhd 100 Process asyn
+# 
+run
+# Cannot continue because of fatal error.
+# HDL call sequence:
+# Stopped at ../src/fetch_stage_b.vhd 100 Process asyn
+# 
+run
+# Cannot continue because of fatal error.
+# HDL call sequence:
+# Stopped at ../src/fetch_stage_b.vhd 100 Process asyn
+# 
+run
+# Cannot continue because of fatal error.
+# HDL call sequence:
+# Stopped at ../src/fetch_stage_b.vhd 100 Process asyn
+# 
+run
+# Cannot continue because of fatal error.
+# HDL call sequence:
+# Stopped at ../src/fetch_stage_b.vhd 100 Process asyn
+# 
+vcom -reportprogress 300 -work work /home/stefan/processor/calu/cpu/src/fetch_stage_b.vhd
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
@@ -3044,110 +3801,127 @@ do testcore.do
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
 # -- Loading package core_pkg
-# -- Compiling entity decode_stage
+# -- Loading package mem_pkg
+# -- Compiling architecture behav of fetch_stage
+# -- Loading entity fetch_stage
+# ** Error: /home/stefan/processor/calu/cpu/src/fetch_stage_b.vhd(101): (vcom-1136) Unknown identifier "physical_instr_addr_width".
+# ** Error: /home/stefan/processor/calu/cpu/src/fetch_stage_b.vhd(101): Bad expression in left bound of range expression.
+# ** Error: /home/stefan/processor/calu/cpu/src/fetch_stage_b.vhd(101): Type error in range expression.
+# ** Error: /home/stefan/processor/calu/cpu/src/fetch_stage_b.vhd(114): VHDL Compiler exiting
+vcom -reportprogress 300 -work work /home/stefan/processor/calu/cpu/src/fetch_stage_b.vhd
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package mem_pkg
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
 # -- Loading package core_pkg
-# -- Compiling architecture behav of decode_stage
-# -- Loading entity decode_stage
+# -- Loading package mem_pkg
+# -- Compiling architecture behav of fetch_stage
+# -- Loading entity fetch_stage
+# ** Warning: [3] /home/stefan/processor/calu/cpu/src/fetch_stage_b.vhd(101): (vcom-1246) Range 5 downto 7 is null.
+# ** Warning: [14] /home/stefan/processor/calu/cpu/src/fetch_stage_b.vhd(101): (vcom-1272) Length of expected is 0; length of actual is 11.
+vcom -reportprogress 300 -work work /home/stefan/processor/calu/cpu/src/fetch_stage_b.vhd
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
-# -- Compiling package alu_pkg
-# -- Compiling package body alu_pkg
-# -- Loading package alu_pkg
+# -- Loading package core_pkg
+# -- Loading package mem_pkg
+# -- Compiling architecture behav of fetch_stage
+# -- Loading entity fetch_stage
+restart
+# Loading work.fetch_stage(behav)
+run
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/writeback_st
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/exec_st/gpmp_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 1  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 3  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 4  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 0 ns  Iteration: 5  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
+# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
+#    Time: 20 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st/data_ram
+run
+do testcore.do
+# ** Warning: (vlib-34) Library already exists at "work".
+# Modifying modelsim.ini
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Compiling package extension_pkg
+# -- Compiling package mem_pkg
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling entity exec_op
+# -- Compiling entity r_w_ram
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture add_op of exec_op
-# -- Loading entity exec_op
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of r_w_ram
+# -- Loading entity r_w_ram
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture and_op of exec_op
-# -- Loading entity exec_op
+# -- Compiling entity r_w_ram_be
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture or_op of exec_op
-# -- Loading entity exec_op
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of r_w_ram_be
+# -- Loading entity r_w_ram_be
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture xor_op of exec_op
-# -- Loading entity exec_op
+# -- Loading package mem_pkg
+# -- Compiling entity r2_w_ram
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture shift_op of exec_op
-# -- Loading entity exec_op
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of r2_w_ram
+# -- Loading entity r2_w_ram
+# ** Warning: ../src/r2_w_ram_b.vhd(18): (vcom-1074) Non-locally static OTHERS choice is allowed only if it is the only choice of the only association.
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling entity alu
+# -- Compiling entity rom
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
-# -- Loading package common_pkg
-# -- Loading package extension_pkg
-# -- Loading package alu_pkg
-# -- Compiling architecture behaviour of alu
-# -- Loading entity alu
-# -- Loading entity exec_op
-# ** Error: ../src/alu_b.vhd(178): No feasible entries for subprogram "to_stdlogicvector".
-# ** Error: ../src/alu_b.vhd(221): VHDL Compiler exiting
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of rom
+# -- Loading entity rom
+# ** Error: ../src/rom_b.vhd(127): (vcom-1167) Index value -4 is out of std.standard.natural range 0 to 2147483647.
+# ** Error: ../src/rom_b.vhd(128): (vcom-1167) Index value -4 is out of std.standard.natural range 0 to 2147483647.
+# ** Warning: [14] ../src/rom_b.vhd(127): (vcom-1272) Length of expected is 7; length of actual is 11.
+# ** Warning: [14] ../src/rom_b.vhd(128): (vcom-1272) Length of expected is 7; length of actual is 11.
+# ** Error: ../src/rom_b.vhd(137): VHDL Compiler exiting
 # ** Error: /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
-# Error in macro ./testcore.do line 43
+# Error in macro ./testcore.do line 12
 # /opt/altera/10.0sp1/modelsim_ase/linuxaloem/vcom failed.
 #     while executing
-# "vcom -work work ../src/alu_b.vhd"
+# "vcom -work work ../src/rom_b.vhd"
 do testcore.do
 # ** Warning: (vlib-34) Library already exists at "work".
 # Modifying modelsim.ini
@@ -3172,6 +3946,18 @@ do testcore.do
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
+# -- Compiling entity r_w_ram_be
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of r_w_ram_be
+# -- Loading entity r_w_ram_be
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
 # -- Loading package mem_pkg
 # -- Compiling entity r2_w_ram
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
@@ -3246,6 +4032,21 @@ do testcore.do
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
+# -- Compiling entity extension_interrupt
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Compiling architecture behav of extension_interrupt
+# -- Loading entity extension_interrupt
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
 # -- Compiling package extension_7seg_pkg
 # -- Compiling package body extension_7seg_pkg
 # -- Loading package extension_7seg_pkg
@@ -3512,10 +4313,11 @@ do testcore.do
 # -- Loading package extension_7seg_pkg
 # -- Compiling architecture behav of writeback_stage
 # -- Loading entity writeback_stage
-# ** Warning: ../src/writeback_stage_b.vhd(298): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(314): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(332): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(345): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(334): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(350): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(366): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(384): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(397): Case choice must be a locally static expression.
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
@@ -3545,6 +4347,7 @@ do testcore.do
 # Loading work.pipeline_tb(behavior)
 # Loading work.mem_pkg
 # Loading work.fetch_stage(behav)
+# Loading work.r_w_ram(behaviour)
 # Loading work.rom(behaviour)
 # Loading work.decode_stage(behav)
 # Loading work.r2_w_ram(behaviour)
@@ -3560,13 +4363,14 @@ do testcore.do
 # Loading work.extension_uart_pkg
 # Loading work.extension_7seg_pkg(body)
 # Loading work.writeback_stage(behav)
-# Loading work.r_w_ram(behaviour)
+# Loading work.r_w_ram_be(behaviour)
 # Loading work.extension_uart(behav)
 # Loading ieee.std_logic_arith(body)
 # Loading ieee.std_logic_unsigned(body)
 # Loading work.rs232_tx(beh)
 # Loading work.rs232_rx(beh)
 # Loading work.extension_7seg(behav)
+# Loading work.extension_interrupt(behav)
 # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
 #    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/writeback_st
 # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
@@ -3585,6 +4389,8 @@ do testcore.do
 #    Time: 0 ns  Iteration: 5  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
 # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
 #    Time: 20 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st/data_ram
+run
+run
 do testcore.do
 # ** Warning: (vlib-34) Library already exists at "work".
 # Modifying modelsim.ini
@@ -3609,6 +4415,18 @@ do testcore.do
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
+# -- Compiling entity r_w_ram_be
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of r_w_ram_be
+# -- Loading entity r_w_ram_be
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
 # -- Loading package mem_pkg
 # -- Compiling entity r2_w_ram
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
@@ -3683,6 +4501,21 @@ do testcore.do
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
+# -- Compiling entity extension_interrupt
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Compiling architecture behav of extension_interrupt
+# -- Loading entity extension_interrupt
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
 # -- Compiling package extension_7seg_pkg
 # -- Compiling package body extension_7seg_pkg
 # -- Loading package extension_7seg_pkg
@@ -3949,10 +4782,11 @@ do testcore.do
 # -- Loading package extension_7seg_pkg
 # -- Compiling architecture behav of writeback_stage
 # -- Loading entity writeback_stage
-# ** Warning: ../src/writeback_stage_b.vhd(298): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(314): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(332): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(345): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(334): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(350): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(366): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(384): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(397): Case choice must be a locally static expression.
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
@@ -3982,6 +4816,7 @@ do testcore.do
 # Loading work.pipeline_tb(behavior)
 # Loading work.mem_pkg
 # Loading work.fetch_stage(behav)
+# Loading work.r_w_ram(behaviour)
 # Loading work.rom(behaviour)
 # Loading work.decode_stage(behav)
 # Loading work.r2_w_ram(behaviour)
@@ -3997,13 +4832,14 @@ do testcore.do
 # Loading work.extension_uart_pkg
 # Loading work.extension_7seg_pkg(body)
 # Loading work.writeback_stage(behav)
-# Loading work.r_w_ram(behaviour)
+# Loading work.r_w_ram_be(behaviour)
 # Loading work.extension_uart(behav)
 # Loading ieee.std_logic_arith(body)
 # Loading ieee.std_logic_unsigned(body)
 # Loading work.rs232_tx(beh)
 # Loading work.rs232_rx(beh)
 # Loading work.extension_7seg(behav)
+# Loading work.extension_interrupt(behav)
 # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
 #    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/writeback_st
 # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
@@ -4022,6 +4858,7 @@ do testcore.do
 #    Time: 0 ns  Iteration: 5  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
 # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
 #    Time: 20 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st/data_ram
+run
 do testcore.do
 # ** Warning: (vlib-34) Library already exists at "work".
 # Modifying modelsim.ini
@@ -4046,6 +4883,18 @@ do testcore.do
 # -- Loading package standard
 # -- Loading package std_logic_1164
 # -- Loading package numeric_std
+# -- Compiling entity r_w_ram_be
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package mem_pkg
+# -- Compiling architecture behaviour of r_w_ram_be
+# -- Loading entity r_w_ram_be
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
 # -- Loading package mem_pkg
 # -- Compiling entity r2_w_ram
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
@@ -4120,6 +4969,21 @@ do testcore.do
 # -- Loading package numeric_std
 # -- Loading package common_pkg
 # -- Loading package extension_pkg
+# -- Compiling entity extension_interrupt
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
+# -- Compiling architecture behav of extension_interrupt
+# -- Loading entity extension_interrupt
+# Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
+# -- Loading package standard
+# -- Loading package std_logic_1164
+# -- Loading package numeric_std
+# -- Loading package common_pkg
+# -- Loading package extension_pkg
 # -- Compiling package extension_7seg_pkg
 # -- Compiling package body extension_7seg_pkg
 # -- Loading package extension_7seg_pkg
@@ -4386,10 +5250,11 @@ do testcore.do
 # -- Loading package extension_7seg_pkg
 # -- Compiling architecture behav of writeback_stage
 # -- Loading entity writeback_stage
-# ** Warning: ../src/writeback_stage_b.vhd(298): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(314): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(332): Case choice must be a locally static expression.
-# ** Warning: ../src/writeback_stage_b.vhd(345): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(334): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(350): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(366): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(384): Case choice must be a locally static expression.
+# ** Warning: ../src/writeback_stage_b.vhd(397): Case choice must be a locally static expression.
 # Model Technology ModelSim ALTERA vcom 6.5e Compiler 2010.02 Feb 27 2010
 # -- Loading package standard
 # -- Loading package std_logic_1164
@@ -4419,6 +5284,7 @@ do testcore.do
 # Loading work.pipeline_tb(behavior)
 # Loading work.mem_pkg
 # Loading work.fetch_stage(behav)
+# Loading work.r_w_ram(behaviour)
 # Loading work.rom(behaviour)
 # Loading work.decode_stage(behav)
 # Loading work.r2_w_ram(behaviour)
@@ -4434,13 +5300,14 @@ do testcore.do
 # Loading work.extension_uart_pkg
 # Loading work.extension_7seg_pkg(body)
 # Loading work.writeback_stage(behav)
-# Loading work.r_w_ram(behaviour)
+# Loading work.r_w_ram_be(behaviour)
 # Loading work.extension_uart(behav)
 # Loading ieee.std_logic_arith(body)
 # Loading ieee.std_logic_unsigned(body)
 # Loading work.rs232_tx(beh)
 # Loading work.rs232_rx(beh)
 # Loading work.extension_7seg(behav)
+# Loading work.extension_interrupt(behav)
 # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
 #    Time: 0 ns  Iteration: 0  Instance: /pipeline_tb/writeback_st
 # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
@@ -4459,3 +5326,4 @@ do testcore.do
 #    Time: 0 ns  Iteration: 5  Instance: /pipeline_tb/exec_st/alu_inst/shift_inst
 # ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
 #    Time: 20 ns  Iteration: 1  Instance: /pipeline_tb/writeback_st/data_ram
+run