Classic Timing Analyzer report for dt
-Thu Dec 16 16:55:05 2010
+Fri Dec 17 10:10:42 2010
Quartus II Version 10.0 Build 262 08/18/2010 Service Pack 1 SJ Web Edition
5. Clock Settings Summary
6. Parallel Compilation
7. Clock Setup: 'sys_clk'
- 8. tco
- 9. Timing Analyzer Messages
+ 8. tsu
+ 9. tco
+ 10. th
+ 11. Timing Analyzer Messages
+------------------------------+-------+---------------+----------------------------------+----------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+------------+----------+--------------+
; Type ; Slack ; Required Time ; Actual Time ; From ; To ; From Clock ; To Clock ; Failed Paths ;
+------------------------------+-------+---------------+----------------------------------+----------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+------------+----------+--------------+
-; Worst-case tco ; N/A ; None ; 8.846 ns ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|bus_tx_int ; bus_tx ; sys_clk ; -- ; 0 ;
-; Clock Setup: 'sys_clk' ; N/A ; None ; 49.70 MHz ( period = 20.119 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; 0 ;
+; Worst-case tsu ; N/A ; None ; 16.692 ns ; sys_res ; execute_stage:exec_st|reg.result[2] ; -- ; sys_clk ; 0 ;
+; Worst-case tco ; N/A ; None ; 8.362 ns ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|bus_tx_int ; bus_tx ; sys_clk ; -- ; 0 ;
+; Worst-case th ; N/A ; None ; -8.416 ns ; sys_res ; writeback_stage:writeback_st|extension_uart:uart|new_tx_data ; -- ; sys_clk ; 0 ;
+; Clock Setup: 'sys_clk' ; N/A ; None ; 46.92 MHz ( period = 21.311 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; 0 ;
; Total number of failed paths ; ; ; ; ; ; ; ; 0 ;
+------------------------------+-------+---------------+----------------------------------+----------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+------------+----------+--------------+
+-----------------------------------------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
-; N/A ; 49.70 MHz ( period = 20.119 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 19.416 ns ;
-; N/A ; 49.70 MHz ( period = 20.119 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 19.416 ns ;
-; N/A ; 49.70 MHz ( period = 20.119 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 19.416 ns ;
-; N/A ; 49.70 MHz ( period = 20.119 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 19.416 ns ;
-; N/A ; 49.70 MHz ( period = 20.119 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 19.416 ns ;
-; N/A ; 49.70 MHz ( period = 20.119 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 19.416 ns ;
-; N/A ; 50.36 MHz ( period = 19.856 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 19.162 ns ;
-; N/A ; 50.36 MHz ( period = 19.856 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 19.162 ns ;
-; N/A ; 50.36 MHz ( period = 19.856 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 19.162 ns ;
-; N/A ; 50.36 MHz ( period = 19.856 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 19.162 ns ;
-; N/A ; 50.36 MHz ( period = 19.856 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 19.162 ns ;
-; N/A ; 50.36 MHz ( period = 19.856 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 19.162 ns ;
-; N/A ; 51.44 MHz ( period = 19.439 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 18.669 ns ;
-; N/A ; 51.44 MHz ( period = 19.439 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 18.669 ns ;
-; N/A ; 51.44 MHz ( period = 19.439 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 18.669 ns ;
-; N/A ; 51.64 MHz ( period = 19.366 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 18.663 ns ;
-; N/A ; 51.64 MHz ( period = 19.366 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 18.663 ns ;
-; N/A ; 51.64 MHz ( period = 19.366 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 18.663 ns ;
-; N/A ; 51.64 MHz ( period = 19.366 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 18.663 ns ;
-; N/A ; 51.64 MHz ( period = 19.366 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 18.663 ns ;
-; N/A ; 51.64 MHz ( period = 19.366 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 18.663 ns ;
-; N/A ; 51.64 MHz ( period = 19.366 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 18.663 ns ;
-; N/A ; 51.64 MHz ( period = 19.366 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 18.663 ns ;
-; N/A ; 51.64 MHz ( period = 19.366 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 18.663 ns ;
-; N/A ; 51.64 MHz ( period = 19.366 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 18.663 ns ;
-; N/A ; 51.64 MHz ( period = 19.366 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 18.663 ns ;
-; N/A ; 51.64 MHz ( period = 19.366 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 18.663 ns ;
-; N/A ; 51.64 MHz ( period = 19.366 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 18.663 ns ;
-; N/A ; 51.64 MHz ( period = 19.366 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 18.663 ns ;
-; N/A ; 51.64 MHz ( period = 19.366 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 18.663 ns ;
-; N/A ; 52.15 MHz ( period = 19.176 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 18.415 ns ;
-; N/A ; 52.15 MHz ( period = 19.176 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 18.415 ns ;
-; N/A ; 52.15 MHz ( period = 19.176 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 18.415 ns ;
-; N/A ; 52.35 MHz ( period = 19.103 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 18.409 ns ;
-; N/A ; 52.35 MHz ( period = 19.103 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 18.409 ns ;
-; N/A ; 52.35 MHz ( period = 19.103 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 18.409 ns ;
-; N/A ; 52.35 MHz ( period = 19.103 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 18.409 ns ;
-; N/A ; 52.35 MHz ( period = 19.103 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 18.409 ns ;
-; N/A ; 52.35 MHz ( period = 19.103 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 18.409 ns ;
-; N/A ; 52.35 MHz ( period = 19.103 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 18.409 ns ;
-; N/A ; 52.35 MHz ( period = 19.103 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 18.409 ns ;
-; N/A ; 52.35 MHz ( period = 19.103 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 18.409 ns ;
-; N/A ; 52.35 MHz ( period = 19.103 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 18.409 ns ;
-; N/A ; 52.35 MHz ( period = 19.103 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 18.409 ns ;
-; N/A ; 52.35 MHz ( period = 19.103 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 18.409 ns ;
-; N/A ; 52.35 MHz ( period = 19.103 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 18.409 ns ;
-; N/A ; 52.35 MHz ( period = 19.103 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 18.409 ns ;
-; N/A ; 52.35 MHz ( period = 19.103 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 18.409 ns ;
-; N/A ; 54.24 MHz ( period = 18.437 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 17.734 ns ;
-; N/A ; 54.24 MHz ( period = 18.437 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 17.734 ns ;
-; N/A ; 54.24 MHz ( period = 18.437 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 17.734 ns ;
-; N/A ; 55.02 MHz ( period = 18.174 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 17.480 ns ;
-; N/A ; 55.02 MHz ( period = 18.174 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 17.480 ns ;
-; N/A ; 55.02 MHz ( period = 18.174 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 17.480 ns ;
-; N/A ; 57.24 MHz ( period = 17.470 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|new_tx_data ; sys_clk ; sys_clk ; None ; None ; 16.700 ns ;
-; N/A ; 57.24 MHz ( period = 17.470 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|new_tx_data ; sys_clk ; sys_clk ; None ; None ; 16.700 ns ;
-; N/A ; 57.24 MHz ( period = 17.470 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|new_tx_data ; sys_clk ; sys_clk ; None ; None ; 16.700 ns ;
-; N/A ; 58.12 MHz ( period = 17.207 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|new_tx_data ; sys_clk ; sys_clk ; None ; None ; 16.446 ns ;
-; N/A ; 58.12 MHz ( period = 17.207 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|new_tx_data ; sys_clk ; sys_clk ; None ; None ; 16.446 ns ;
-; N/A ; 58.12 MHz ( period = 17.207 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|new_tx_data ; sys_clk ; sys_clk ; None ; None ; 16.446 ns ;
-; N/A ; 59.51 MHz ( period = 16.805 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 16.544 ns ;
-; N/A ; 59.51 MHz ( period = 16.805 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 16.544 ns ;
-; N/A ; 59.73 MHz ( period = 16.743 ns ) ; execute_stage:exec_st|reg.res_addr[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 16.473 ns ;
-; N/A ; 59.73 MHz ( period = 16.743 ns ) ; execute_stage:exec_st|reg.res_addr[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 16.473 ns ;
-; N/A ; 60.26 MHz ( period = 16.594 ns ) ; decode_stage:decode_st|rtw_rec.immediate[3] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 16.324 ns ;
-; N/A ; 60.26 MHz ( period = 16.594 ns ) ; decode_stage:decode_st|rtw_rec.immediate[3] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 16.324 ns ;
-; N/A ; 60.70 MHz ( period = 16.475 ns ) ; decode_stage:decode_st|dec_op_inst.displacement[3] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 16.205 ns ;
-; N/A ; 60.70 MHz ( period = 16.475 ns ) ; decode_stage:decode_st|dec_op_inst.displacement[3] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 16.205 ns ;
-; N/A ; 61.33 MHz ( period = 16.306 ns ) ; execute_stage:exec_st|reg.wr_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 16.036 ns ;
-; N/A ; 61.33 MHz ( period = 16.306 ns ) ; execute_stage:exec_st|reg.wr_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 16.036 ns ;
-; N/A ; 62.02 MHz ( period = 16.125 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 15.797 ns ;
-; N/A ; 62.17 MHz ( period = 16.085 ns ) ; decode_stage:decode_st|dec_op_inst.saddr2[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 15.815 ns ;
-; N/A ; 62.17 MHz ( period = 16.085 ns ) ; decode_stage:decode_st|dec_op_inst.saddr2[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 15.815 ns ;
-; N/A ; 62.25 MHz ( period = 16.063 ns ) ; execute_stage:exec_st|reg.res_addr[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 15.726 ns ;
-; N/A ; 62.30 MHz ( period = 16.052 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 15.791 ns ;
-; N/A ; 62.30 MHz ( period = 16.052 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 15.791 ns ;
-; N/A ; 62.30 MHz ( period = 16.052 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 15.791 ns ;
-; N/A ; 62.30 MHz ( period = 16.052 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 15.791 ns ;
-; N/A ; 62.30 MHz ( period = 16.052 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 15.791 ns ;
-; N/A ; 62.54 MHz ( period = 15.990 ns ) ; execute_stage:exec_st|reg.res_addr[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 15.720 ns ;
-; N/A ; 62.54 MHz ( period = 15.990 ns ) ; execute_stage:exec_st|reg.res_addr[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 15.720 ns ;
-; N/A ; 62.54 MHz ( period = 15.990 ns ) ; execute_stage:exec_st|reg.res_addr[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 15.720 ns ;
-; N/A ; 62.54 MHz ( period = 15.990 ns ) ; execute_stage:exec_st|reg.res_addr[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 15.720 ns ;
-; N/A ; 62.54 MHz ( period = 15.990 ns ) ; execute_stage:exec_st|reg.res_addr[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 15.720 ns ;
-; N/A ; 62.84 MHz ( period = 15.914 ns ) ; decode_stage:decode_st|rtw_rec.immediate[3] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 15.577 ns ;
-; N/A ; 63.13 MHz ( period = 15.841 ns ) ; decode_stage:decode_st|rtw_rec.immediate[3] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 15.571 ns ;
-; N/A ; 63.13 MHz ( period = 15.841 ns ) ; decode_stage:decode_st|rtw_rec.immediate[3] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 15.571 ns ;
-; N/A ; 63.13 MHz ( period = 15.841 ns ) ; decode_stage:decode_st|rtw_rec.immediate[3] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 15.571 ns ;
-; N/A ; 63.13 MHz ( period = 15.841 ns ) ; decode_stage:decode_st|rtw_rec.immediate[3] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 15.571 ns ;
-; N/A ; 63.13 MHz ( period = 15.841 ns ) ; decode_stage:decode_st|rtw_rec.immediate[3] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 15.571 ns ;
-; N/A ; 63.24 MHz ( period = 15.812 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 15.542 ns ;
-; N/A ; 63.24 MHz ( period = 15.812 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 15.542 ns ;
-; N/A ; 63.31 MHz ( period = 15.795 ns ) ; decode_stage:decode_st|dec_op_inst.displacement[3] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 15.458 ns ;
-; N/A ; 63.53 MHz ( period = 15.741 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[7] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 15.480 ns ;
-; N/A ; 63.53 MHz ( period = 15.741 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[7] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 15.480 ns ;
-; N/A ; 63.61 MHz ( period = 15.722 ns ) ; decode_stage:decode_st|dec_op_inst.displacement[3] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 15.452 ns ;
-; N/A ; 63.61 MHz ( period = 15.722 ns ) ; decode_stage:decode_st|dec_op_inst.displacement[3] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 15.452 ns ;
-; N/A ; 63.61 MHz ( period = 15.722 ns ) ; decode_stage:decode_st|dec_op_inst.displacement[3] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 15.452 ns ;
-; N/A ; 63.61 MHz ( period = 15.722 ns ) ; decode_stage:decode_st|dec_op_inst.displacement[3] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 15.452 ns ;
-; N/A ; 63.61 MHz ( period = 15.722 ns ) ; decode_stage:decode_st|dec_op_inst.displacement[3] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 15.452 ns ;
-; N/A ; 64.00 MHz ( period = 15.626 ns ) ; execute_stage:exec_st|reg.wr_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 15.289 ns ;
-; N/A ; 64.30 MHz ( period = 15.553 ns ) ; execute_stage:exec_st|reg.wr_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 15.283 ns ;
-; N/A ; 64.30 MHz ( period = 15.553 ns ) ; execute_stage:exec_st|reg.wr_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 15.283 ns ;
-; N/A ; 64.30 MHz ( period = 15.553 ns ) ; execute_stage:exec_st|reg.wr_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 15.283 ns ;
-; N/A ; 64.30 MHz ( period = 15.553 ns ) ; execute_stage:exec_st|reg.wr_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 15.283 ns ;
-; N/A ; 64.30 MHz ( period = 15.553 ns ) ; execute_stage:exec_st|reg.wr_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 15.283 ns ;
-; N/A ; 64.86 MHz ( period = 15.417 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 15.156 ns ;
-; N/A ; 64.86 MHz ( period = 15.417 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 15.156 ns ;
-; N/A ; 64.91 MHz ( period = 15.405 ns ) ; decode_stage:decode_st|dec_op_inst.saddr2[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 15.068 ns ;
-; N/A ; 65.22 MHz ( period = 15.332 ns ) ; decode_stage:decode_st|dec_op_inst.saddr2[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 15.062 ns ;
-; N/A ; 65.22 MHz ( period = 15.332 ns ) ; decode_stage:decode_st|dec_op_inst.saddr2[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 15.062 ns ;
-; N/A ; 65.22 MHz ( period = 15.332 ns ) ; decode_stage:decode_st|dec_op_inst.saddr2[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 15.062 ns ;
-; N/A ; 65.22 MHz ( period = 15.332 ns ) ; decode_stage:decode_st|dec_op_inst.saddr2[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 15.062 ns ;
-; N/A ; 65.22 MHz ( period = 15.332 ns ) ; decode_stage:decode_st|dec_op_inst.saddr2[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 15.062 ns ;
-; N/A ; 66.09 MHz ( period = 15.132 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 14.795 ns ;
-; N/A ; 66.12 MHz ( period = 15.123 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 14.862 ns ;
-; N/A ; 66.40 MHz ( period = 15.061 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[7] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 14.733 ns ;
-; N/A ; 66.40 MHz ( period = 15.061 ns ) ; execute_stage:exec_st|reg.res_addr[2] ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 14.791 ns ;
-; N/A ; 66.41 MHz ( period = 15.059 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 14.789 ns ;
-; N/A ; 66.41 MHz ( period = 15.059 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 14.789 ns ;
-; N/A ; 66.41 MHz ( period = 15.059 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 14.789 ns ;
-; N/A ; 66.41 MHz ( period = 15.059 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 14.789 ns ;
-; N/A ; 66.41 MHz ( period = 15.059 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 14.789 ns ;
-; N/A ; 66.72 MHz ( period = 14.988 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[7] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 14.727 ns ;
-; N/A ; 66.72 MHz ( period = 14.988 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[7] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 14.727 ns ;
-; N/A ; 66.72 MHz ( period = 14.988 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[7] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 14.727 ns ;
-; N/A ; 66.72 MHz ( period = 14.988 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[7] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 14.727 ns ;
-; N/A ; 66.72 MHz ( period = 14.988 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[7] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 14.727 ns ;
-; N/A ; 67.06 MHz ( period = 14.912 ns ) ; decode_stage:decode_st|rtw_rec.immediate[3] ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 14.642 ns ;
-; N/A ; 67.32 MHz ( period = 14.854 ns ) ; execute_stage:exec_st|reg.result[9] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 14.593 ns ;
-; N/A ; 67.32 MHz ( period = 14.854 ns ) ; execute_stage:exec_st|reg.result[9] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 14.593 ns ;
-; N/A ; 67.60 MHz ( period = 14.793 ns ) ; decode_stage:decode_st|dec_op_inst.displacement[3] ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 14.523 ns ;
-; N/A ; 67.86 MHz ( period = 14.737 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 14.409 ns ;
-; N/A ; 68.19 MHz ( period = 14.664 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 14.403 ns ;
-; N/A ; 68.19 MHz ( period = 14.664 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 14.403 ns ;
-; N/A ; 68.19 MHz ( period = 14.664 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 14.403 ns ;
-; N/A ; 68.19 MHz ( period = 14.664 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 14.403 ns ;
-; N/A ; 68.19 MHz ( period = 14.664 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 14.403 ns ;
-; N/A ; 68.38 MHz ( period = 14.624 ns ) ; execute_stage:exec_st|reg.wr_en ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 14.354 ns ;
-; N/A ; 68.41 MHz ( period = 14.618 ns ) ; execute_stage:exec_st|reg.result[6] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 14.424 ns ;
-; N/A ; 68.41 MHz ( period = 14.618 ns ) ; execute_stage:exec_st|reg.result[6] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 14.424 ns ;
-; N/A ; 68.73 MHz ( period = 14.549 ns ) ; execute_stage:exec_st|reg.result[3] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 14.288 ns ;
-; N/A ; 68.73 MHz ( period = 14.549 ns ) ; execute_stage:exec_st|reg.result[3] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 14.288 ns ;
-; N/A ; 68.77 MHz ( period = 14.541 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[8] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 14.280 ns ;
-; N/A ; 68.77 MHz ( period = 14.541 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[8] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 14.280 ns ;
-; N/A ; 69.24 MHz ( period = 14.443 ns ) ; decode_stage:decode_st|rtw_rec.immediate[12] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 14.182 ns ;
-; N/A ; 69.24 MHz ( period = 14.443 ns ) ; decode_stage:decode_st|rtw_rec.immediate[12] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 14.182 ns ;
-; N/A ; 69.43 MHz ( period = 14.403 ns ) ; decode_stage:decode_st|dec_op_inst.saddr2[2] ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 14.133 ns ;
-; N/A ; 69.48 MHz ( period = 14.393 ns ) ; execute_stage:exec_st|reg.result[1] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 14.132 ns ;
-; N/A ; 69.48 MHz ( period = 14.393 ns ) ; execute_stage:exec_st|reg.result[1] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 14.132 ns ;
-; N/A ; 69.59 MHz ( period = 14.369 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[12] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 14.108 ns ;
-; N/A ; 69.59 MHz ( period = 14.369 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[12] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 14.108 ns ;
-; N/A ; 70.14 MHz ( period = 14.258 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[3] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 13.997 ns ;
-; N/A ; 70.14 MHz ( period = 14.258 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[3] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 13.997 ns ;
-; N/A ; 70.48 MHz ( period = 14.189 ns ) ; execute_stage:exec_st|reg.result[7] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 13.928 ns ;
-; N/A ; 70.48 MHz ( period = 14.189 ns ) ; execute_stage:exec_st|reg.result[7] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 13.928 ns ;
-; N/A ; 70.55 MHz ( period = 14.175 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[1] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 13.905 ns ;
-; N/A ; 70.55 MHz ( period = 14.175 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[1] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 13.905 ns ;
-; N/A ; 70.55 MHz ( period = 14.174 ns ) ; execute_stage:exec_st|reg.result[9] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 13.846 ns ;
-; N/A ; 70.64 MHz ( period = 14.156 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg2 ; writeback_stage:writeback_st|extension_uart:uart|new_tx_data ; sys_clk ; sys_clk ; None ; None ; 13.828 ns ;
-; N/A ; 70.77 MHz ( period = 14.130 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 13.860 ns ;
-; N/A ; 70.92 MHz ( period = 14.101 ns ) ; execute_stage:exec_st|reg.result[9] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 13.840 ns ;
-; N/A ; 70.92 MHz ( period = 14.101 ns ) ; execute_stage:exec_st|reg.result[9] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 13.840 ns ;
-; N/A ; 70.92 MHz ( period = 14.101 ns ) ; execute_stage:exec_st|reg.result[9] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 13.840 ns ;
-; N/A ; 70.92 MHz ( period = 14.101 ns ) ; execute_stage:exec_st|reg.result[9] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 13.840 ns ;
-; N/A ; 70.92 MHz ( period = 14.101 ns ) ; execute_stage:exec_st|reg.result[9] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 13.840 ns ;
-; N/A ; 70.95 MHz ( period = 14.094 ns ) ; execute_stage:exec_st|reg.res_addr[2] ; writeback_stage:writeback_st|extension_uart:uart|new_tx_data ; sys_clk ; sys_clk ; None ; None ; 13.757 ns ;
-; N/A ; 71.06 MHz ( period = 14.072 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[5] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 13.811 ns ;
-; N/A ; 71.06 MHz ( period = 14.072 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[5] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 13.811 ns ;
-; N/A ; 71.13 MHz ( period = 14.059 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[7] ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 13.798 ns ;
-; N/A ; 71.71 MHz ( period = 13.945 ns ) ; decode_stage:decode_st|rtw_rec.immediate[3] ; writeback_stage:writeback_st|extension_uart:uart|new_tx_data ; sys_clk ; sys_clk ; None ; None ; 13.608 ns ;
-; N/A ; 71.73 MHz ( period = 13.942 ns ) ; decode_stage:decode_st|rtw_rec.immediate[6] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 13.681 ns ;
-; N/A ; 71.73 MHz ( period = 13.942 ns ) ; decode_stage:decode_st|rtw_rec.immediate[6] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 13.681 ns ;
-; N/A ; 71.75 MHz ( period = 13.938 ns ) ; execute_stage:exec_st|reg.result[6] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 13.677 ns ;
-; N/A ; 71.95 MHz ( period = 13.898 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; execute_stage:exec_st|reg.result[26] ; sys_clk ; sys_clk ; None ; None ; 13.128 ns ;
-; N/A ; 71.95 MHz ( period = 13.898 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; execute_stage:exec_st|reg.result[26] ; sys_clk ; sys_clk ; None ; None ; 13.128 ns ;
-; N/A ; 71.95 MHz ( period = 13.898 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; execute_stage:exec_st|reg.result[26] ; sys_clk ; sys_clk ; None ; None ; 13.128 ns ;
-; N/A ; 72.07 MHz ( period = 13.875 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[10] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 13.614 ns ;
-; N/A ; 72.07 MHz ( period = 13.875 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[10] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 13.614 ns ;
-; N/A ; 72.10 MHz ( period = 13.869 ns ) ; execute_stage:exec_st|reg.result[3] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 13.541 ns ;
-; N/A ; 72.12 MHz ( period = 13.865 ns ) ; execute_stage:exec_st|reg.result[6] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 13.671 ns ;
-; N/A ; 72.12 MHz ( period = 13.865 ns ) ; execute_stage:exec_st|reg.result[6] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 13.671 ns ;
-; N/A ; 72.12 MHz ( period = 13.865 ns ) ; execute_stage:exec_st|reg.result[6] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 13.671 ns ;
-; N/A ; 72.12 MHz ( period = 13.865 ns ) ; execute_stage:exec_st|reg.result[6] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 13.671 ns ;
-; N/A ; 72.12 MHz ( period = 13.865 ns ) ; execute_stage:exec_st|reg.result[6] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 13.671 ns ;
-; N/A ; 72.14 MHz ( period = 13.861 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[8] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 13.533 ns ;
-; N/A ; 72.18 MHz ( period = 13.855 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; execute_stage:exec_st|reg.result[26] ; sys_clk ; sys_clk ; None ; None ; 13.094 ns ;
-; N/A ; 72.18 MHz ( period = 13.855 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; execute_stage:exec_st|reg.result[26] ; sys_clk ; sys_clk ; None ; None ; 13.094 ns ;
-; N/A ; 72.18 MHz ( period = 13.855 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; execute_stage:exec_st|reg.result[26] ; sys_clk ; sys_clk ; None ; None ; 13.094 ns ;
-; N/A ; 72.33 MHz ( period = 13.826 ns ) ; decode_stage:decode_st|dec_op_inst.displacement[3] ; writeback_stage:writeback_st|extension_uart:uart|new_tx_data ; sys_clk ; sys_clk ; None ; None ; 13.489 ns ;
-; N/A ; 72.35 MHz ( period = 13.821 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; execute_stage:exec_st|reg.result[27] ; sys_clk ; sys_clk ; None ; None ; 13.118 ns ;
-; N/A ; 72.35 MHz ( period = 13.821 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; execute_stage:exec_st|reg.result[27] ; sys_clk ; sys_clk ; None ; None ; 13.118 ns ;
-; N/A ; 72.35 MHz ( period = 13.821 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; execute_stage:exec_st|reg.result[27] ; sys_clk ; sys_clk ; None ; None ; 13.118 ns ;
-; N/A ; 72.47 MHz ( period = 13.799 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[13] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 13.529 ns ;
-; N/A ; 72.47 MHz ( period = 13.799 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg[13] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 13.529 ns ;
-; N/A ; 72.48 MHz ( period = 13.796 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; execute_stage:exec_st|reg.result[29] ; sys_clk ; sys_clk ; None ; None ; 13.093 ns ;
-; N/A ; 72.48 MHz ( period = 13.796 ns ) ; execute_stage:exec_st|reg.result[3] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 13.535 ns ;
-; N/A ; 72.48 MHz ( period = 13.796 ns ) ; execute_stage:exec_st|reg.result[3] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 13.535 ns ;
-; N/A ; 72.48 MHz ( period = 13.796 ns ) ; execute_stage:exec_st|reg.result[3] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 13.535 ns ;
-; N/A ; 72.48 MHz ( period = 13.796 ns ) ; execute_stage:exec_st|reg.result[3] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 13.535 ns ;
+; N/A ; 46.92 MHz ( period = 21.311 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 20.617 ns ;
+; N/A ; 46.92 MHz ( period = 21.311 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 20.617 ns ;
+; N/A ; 46.92 MHz ( period = 21.311 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 20.617 ns ;
+; N/A ; 46.92 MHz ( period = 21.311 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 20.617 ns ;
+; N/A ; 46.92 MHz ( period = 21.311 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 20.617 ns ;
+; N/A ; 46.92 MHz ( period = 21.311 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 20.617 ns ;
+; N/A ; 46.92 MHz ( period = 21.311 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 20.617 ns ;
+; N/A ; 46.92 MHz ( period = 21.311 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 20.617 ns ;
+; N/A ; 46.92 MHz ( period = 21.311 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 20.617 ns ;
+; N/A ; 46.92 MHz ( period = 21.311 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 20.617 ns ;
+; N/A ; 46.92 MHz ( period = 21.311 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 20.617 ns ;
+; N/A ; 46.92 MHz ( period = 21.311 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 20.617 ns ;
+; N/A ; 46.92 MHz ( period = 21.311 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 20.617 ns ;
+; N/A ; 46.92 MHz ( period = 21.311 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 20.617 ns ;
+; N/A ; 46.92 MHz ( period = 21.311 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 20.617 ns ;
+; N/A ; 47.00 MHz ( period = 21.278 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 20.584 ns ;
+; N/A ; 47.00 MHz ( period = 21.278 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 20.584 ns ;
+; N/A ; 47.00 MHz ( period = 21.278 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 20.584 ns ;
+; N/A ; 47.00 MHz ( period = 21.278 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 20.584 ns ;
+; N/A ; 47.00 MHz ( period = 21.278 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 20.584 ns ;
+; N/A ; 47.00 MHz ( period = 21.278 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 20.584 ns ;
+; N/A ; 47.00 MHz ( period = 21.278 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 20.584 ns ;
+; N/A ; 47.00 MHz ( period = 21.278 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 20.584 ns ;
+; N/A ; 47.00 MHz ( period = 21.278 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 20.584 ns ;
+; N/A ; 47.00 MHz ( period = 21.278 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 20.584 ns ;
+; N/A ; 47.00 MHz ( period = 21.278 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 20.584 ns ;
+; N/A ; 47.00 MHz ( period = 21.278 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 20.584 ns ;
+; N/A ; 47.00 MHz ( period = 21.278 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 20.584 ns ;
+; N/A ; 47.00 MHz ( period = 21.278 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 20.584 ns ;
+; N/A ; 47.00 MHz ( period = 21.278 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 20.584 ns ;
+; N/A ; 48.16 MHz ( period = 20.764 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 20.129 ns ;
+; N/A ; 48.16 MHz ( period = 20.764 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 20.129 ns ;
+; N/A ; 48.16 MHz ( period = 20.764 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 20.129 ns ;
+; N/A ; 48.16 MHz ( period = 20.764 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 20.129 ns ;
+; N/A ; 48.16 MHz ( period = 20.764 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 20.129 ns ;
+; N/A ; 48.16 MHz ( period = 20.764 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 20.129 ns ;
+; N/A ; 48.24 MHz ( period = 20.731 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 20.096 ns ;
+; N/A ; 48.24 MHz ( period = 20.731 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 20.096 ns ;
+; N/A ; 48.24 MHz ( period = 20.731 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 20.096 ns ;
+; N/A ; 48.24 MHz ( period = 20.731 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 20.096 ns ;
+; N/A ; 48.24 MHz ( period = 20.731 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 20.096 ns ;
+; N/A ; 48.24 MHz ( period = 20.731 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 20.096 ns ;
+; N/A ; 48.50 MHz ( period = 20.620 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 20.300 ns ;
+; N/A ; 48.50 MHz ( period = 20.620 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 20.300 ns ;
+; N/A ; 48.50 MHz ( period = 20.620 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 20.300 ns ;
+; N/A ; 48.50 MHz ( period = 20.620 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 20.300 ns ;
+; N/A ; 48.50 MHz ( period = 20.620 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 20.300 ns ;
+; N/A ; 48.64 MHz ( period = 20.559 ns ) ; execute_stage:exec_st|reg.res_addr[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 20.307 ns ;
+; N/A ; 48.64 MHz ( period = 20.559 ns ) ; execute_stage:exec_st|reg.res_addr[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 20.307 ns ;
+; N/A ; 48.64 MHz ( period = 20.559 ns ) ; execute_stage:exec_st|reg.res_addr[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 20.307 ns ;
+; N/A ; 48.64 MHz ( period = 20.559 ns ) ; execute_stage:exec_st|reg.res_addr[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 20.307 ns ;
+; N/A ; 48.64 MHz ( period = 20.559 ns ) ; execute_stage:exec_st|reg.res_addr[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 20.307 ns ;
+; N/A ; 48.82 MHz ( period = 20.485 ns ) ; writeback_stage:writeback_st|wb_reg.dmem_write_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 20.224 ns ;
+; N/A ; 48.82 MHz ( period = 20.485 ns ) ; writeback_stage:writeback_st|wb_reg.dmem_write_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 20.224 ns ;
+; N/A ; 48.82 MHz ( period = 20.485 ns ) ; writeback_stage:writeback_st|wb_reg.dmem_write_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 20.224 ns ;
+; N/A ; 48.82 MHz ( period = 20.485 ns ) ; writeback_stage:writeback_st|wb_reg.dmem_write_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 20.224 ns ;
+; N/A ; 48.82 MHz ( period = 20.485 ns ) ; writeback_stage:writeback_st|wb_reg.dmem_write_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 20.224 ns ;
+; N/A ; 48.85 MHz ( period = 20.472 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 19.778 ns ;
+; N/A ; 48.85 MHz ( period = 20.472 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 19.778 ns ;
+; N/A ; 48.85 MHz ( period = 20.472 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 19.778 ns ;
+; N/A ; 48.93 MHz ( period = 20.439 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 19.745 ns ;
+; N/A ; 48.93 MHz ( period = 20.439 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 19.745 ns ;
+; N/A ; 48.93 MHz ( period = 20.439 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 19.745 ns ;
+; N/A ; 49.16 MHz ( period = 20.340 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 19.705 ns ;
+; N/A ; 49.16 MHz ( period = 20.340 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 19.705 ns ;
+; N/A ; 49.16 MHz ( period = 20.340 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 19.705 ns ;
+; N/A ; 49.24 MHz ( period = 20.307 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 19.672 ns ;
+; N/A ; 49.24 MHz ( period = 20.307 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 19.672 ns ;
+; N/A ; 49.24 MHz ( period = 20.307 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 19.672 ns ;
+; N/A ; 49.30 MHz ( period = 20.286 ns ) ; decode_stage:decode_st|rtw_rec.imm_set ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 20.025 ns ;
+; N/A ; 49.30 MHz ( period = 20.286 ns ) ; decode_stage:decode_st|rtw_rec.imm_set ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 20.025 ns ;
+; N/A ; 49.30 MHz ( period = 20.286 ns ) ; decode_stage:decode_st|rtw_rec.imm_set ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 20.025 ns ;
+; N/A ; 49.30 MHz ( period = 20.286 ns ) ; decode_stage:decode_st|rtw_rec.imm_set ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 20.025 ns ;
+; N/A ; 49.30 MHz ( period = 20.286 ns ) ; decode_stage:decode_st|rtw_rec.imm_set ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 20.025 ns ;
+; N/A ; 49.35 MHz ( period = 20.265 ns ) ; writeback_stage:writeback_st|wb_reg.dmem_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 20.004 ns ;
+; N/A ; 49.35 MHz ( period = 20.265 ns ) ; writeback_stage:writeback_st|wb_reg.dmem_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 20.004 ns ;
+; N/A ; 49.35 MHz ( period = 20.265 ns ) ; writeback_stage:writeback_st|wb_reg.dmem_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 20.004 ns ;
+; N/A ; 49.35 MHz ( period = 20.265 ns ) ; writeback_stage:writeback_st|wb_reg.dmem_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 20.004 ns ;
+; N/A ; 49.35 MHz ( period = 20.265 ns ) ; writeback_stage:writeback_st|wb_reg.dmem_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 20.004 ns ;
+; N/A ; 49.72 MHz ( period = 20.112 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg0 ; execute_stage:exec_st|reg.result[20] ; sys_clk ; sys_clk ; None ; None ; 19.418 ns ;
+; N/A ; 49.72 MHz ( period = 20.112 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg1 ; execute_stage:exec_st|reg.result[20] ; sys_clk ; sys_clk ; None ; None ; 19.418 ns ;
+; N/A ; 49.72 MHz ( period = 20.112 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg2 ; execute_stage:exec_st|reg.result[20] ; sys_clk ; sys_clk ; None ; None ; 19.418 ns ;
+; N/A ; 49.75 MHz ( period = 20.100 ns ) ; execute_stage:exec_st|reg.alu_jump ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 19.839 ns ;
+; N/A ; 49.75 MHz ( period = 20.100 ns ) ; execute_stage:exec_st|reg.alu_jump ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 19.839 ns ;
+; N/A ; 49.75 MHz ( period = 20.100 ns ) ; execute_stage:exec_st|reg.alu_jump ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 19.839 ns ;
+; N/A ; 49.75 MHz ( period = 20.100 ns ) ; execute_stage:exec_st|reg.alu_jump ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 19.839 ns ;
+; N/A ; 49.75 MHz ( period = 20.100 ns ) ; execute_stage:exec_st|reg.alu_jump ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 19.839 ns ;
+; N/A ; 49.82 MHz ( period = 20.073 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 19.812 ns ;
+; N/A ; 49.82 MHz ( period = 20.073 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 19.812 ns ;
+; N/A ; 49.97 MHz ( period = 20.014 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; execute_stage:exec_st|reg.result[20] ; sys_clk ; sys_clk ; None ; None ; 19.320 ns ;
+; N/A ; 49.97 MHz ( period = 20.014 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; execute_stage:exec_st|reg.result[20] ; sys_clk ; sys_clk ; None ; None ; 19.320 ns ;
+; N/A ; 49.97 MHz ( period = 20.014 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; execute_stage:exec_st|reg.result[20] ; sys_clk ; sys_clk ; None ; None ; 19.320 ns ;
+; N/A ; 49.97 MHz ( period = 20.012 ns ) ; execute_stage:exec_st|reg.res_addr[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 19.819 ns ;
+; N/A ; 49.97 MHz ( period = 20.012 ns ) ; execute_stage:exec_st|reg.res_addr[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 19.819 ns ;
+; N/A ; 49.98 MHz ( period = 20.008 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg2 ; execute_stage:exec_st|reg.result[20] ; sys_clk ; sys_clk ; None ; None ; 19.688 ns ;
+; N/A ; 50.12 MHz ( period = 19.952 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg0 ; execute_stage:exec_st|reg.result[2] ; sys_clk ; sys_clk ; None ; None ; 19.258 ns ;
+; N/A ; 50.12 MHz ( period = 19.952 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg1 ; execute_stage:exec_st|reg.result[2] ; sys_clk ; sys_clk ; None ; None ; 19.258 ns ;
+; N/A ; 50.12 MHz ( period = 19.952 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg2 ; execute_stage:exec_st|reg.result[2] ; sys_clk ; sys_clk ; None ; None ; 19.258 ns ;
+; N/A ; 50.16 MHz ( period = 19.938 ns ) ; writeback_stage:writeback_st|wb_reg.dmem_write_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 19.736 ns ;
+; N/A ; 50.16 MHz ( period = 19.938 ns ) ; writeback_stage:writeback_st|wb_reg.dmem_write_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 19.736 ns ;
+; N/A ; 50.54 MHz ( period = 19.786 ns ) ; execute_stage:exec_st|reg.wr_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 19.525 ns ;
+; N/A ; 50.54 MHz ( period = 19.786 ns ) ; execute_stage:exec_st|reg.wr_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 19.525 ns ;
+; N/A ; 50.54 MHz ( period = 19.786 ns ) ; execute_stage:exec_st|reg.wr_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 19.525 ns ;
+; N/A ; 50.54 MHz ( period = 19.786 ns ) ; execute_stage:exec_st|reg.wr_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 19.525 ns ;
+; N/A ; 50.54 MHz ( period = 19.786 ns ) ; execute_stage:exec_st|reg.wr_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 19.525 ns ;
+; N/A ; 50.55 MHz ( period = 19.781 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 19.461 ns ;
+; N/A ; 50.66 MHz ( period = 19.739 ns ) ; decode_stage:decode_st|rtw_rec.imm_set ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 19.537 ns ;
+; N/A ; 50.66 MHz ( period = 19.739 ns ) ; decode_stage:decode_st|rtw_rec.imm_set ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 19.537 ns ;
+; N/A ; 50.71 MHz ( period = 19.720 ns ) ; execute_stage:exec_st|reg.res_addr[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 19.468 ns ;
+; N/A ; 50.72 MHz ( period = 19.718 ns ) ; writeback_stage:writeback_st|wb_reg.dmem_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 19.516 ns ;
+; N/A ; 50.72 MHz ( period = 19.718 ns ) ; writeback_stage:writeback_st|wb_reg.dmem_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 19.516 ns ;
+; N/A ; 50.74 MHz ( period = 19.709 ns ) ; execute_stage:exec_st|reg.res_addr[2] ; execute_stage:exec_st|reg.result[20] ; sys_clk ; sys_clk ; None ; None ; 19.457 ns ;
+; N/A ; 50.89 MHz ( period = 19.649 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg2 ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 19.388 ns ;
+; N/A ; 50.90 MHz ( period = 19.646 ns ) ; writeback_stage:writeback_st|wb_reg.dmem_write_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 19.385 ns ;
+; N/A ; 51.01 MHz ( period = 19.603 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; execute_stage:exec_st|reg.result[31] ; sys_clk ; sys_clk ; None ; None ; 18.909 ns ;
+; N/A ; 51.01 MHz ( period = 19.603 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; execute_stage:exec_st|reg.result[31] ; sys_clk ; sys_clk ; None ; None ; 18.909 ns ;
+; N/A ; 51.01 MHz ( period = 19.603 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; execute_stage:exec_st|reg.result[31] ; sys_clk ; sys_clk ; None ; None ; 18.909 ns ;
+; N/A ; 51.03 MHz ( period = 19.597 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg2 ; execute_stage:exec_st|reg.result[31] ; sys_clk ; sys_clk ; None ; None ; 19.277 ns ;
+; N/A ; 51.05 MHz ( period = 19.589 ns ) ; execute_stage:exec_st|reg.result[26] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 19.337 ns ;
+; N/A ; 51.05 MHz ( period = 19.589 ns ) ; execute_stage:exec_st|reg.result[26] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 19.337 ns ;
+; N/A ; 51.05 MHz ( period = 19.589 ns ) ; execute_stage:exec_st|reg.result[26] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 19.337 ns ;
+; N/A ; 51.05 MHz ( period = 19.589 ns ) ; execute_stage:exec_st|reg.result[26] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 19.337 ns ;
+; N/A ; 51.05 MHz ( period = 19.589 ns ) ; execute_stage:exec_st|reg.result[26] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 19.337 ns ;
+; N/A ; 51.05 MHz ( period = 19.588 ns ) ; execute_stage:exec_st|reg.res_addr[2] ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 19.395 ns ;
+; N/A ; 51.06 MHz ( period = 19.585 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg0 ; execute_stage:exec_st|reg.result[6] ; sys_clk ; sys_clk ; None ; None ; 18.950 ns ;
+; N/A ; 51.06 MHz ( period = 19.585 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg1 ; execute_stage:exec_st|reg.result[6] ; sys_clk ; sys_clk ; None ; None ; 18.950 ns ;
+; N/A ; 51.06 MHz ( period = 19.585 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg2 ; execute_stage:exec_st|reg.result[6] ; sys_clk ; sys_clk ; None ; None ; 18.950 ns ;
+; N/A ; 51.14 MHz ( period = 19.556 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; execute_stage:exec_st|reg.result[9] ; sys_clk ; sys_clk ; None ; None ; 18.862 ns ;
+; N/A ; 51.14 MHz ( period = 19.556 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; execute_stage:exec_st|reg.result[9] ; sys_clk ; sys_clk ; None ; None ; 18.862 ns ;
+; N/A ; 51.14 MHz ( period = 19.556 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; execute_stage:exec_st|reg.result[9] ; sys_clk ; sys_clk ; None ; None ; 18.862 ns ;
+; N/A ; 51.14 MHz ( period = 19.553 ns ) ; execute_stage:exec_st|reg.alu_jump ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 19.351 ns ;
+; N/A ; 51.14 MHz ( period = 19.553 ns ) ; execute_stage:exec_st|reg.alu_jump ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 19.351 ns ;
+; N/A ; 51.15 MHz ( period = 19.550 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg2 ; execute_stage:exec_st|reg.result[9] ; sys_clk ; sys_clk ; None ; None ; 19.230 ns ;
+; N/A ; 51.25 MHz ( period = 19.514 ns ) ; writeback_stage:writeback_st|wb_reg.dmem_write_en ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 19.312 ns ;
+; N/A ; 51.31 MHz ( period = 19.489 ns ) ; decode_stage:decode_st|dec_op_inst.saddr2[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 19.228 ns ;
+; N/A ; 51.31 MHz ( period = 19.489 ns ) ; decode_stage:decode_st|dec_op_inst.saddr2[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 19.228 ns ;
+; N/A ; 51.31 MHz ( period = 19.489 ns ) ; decode_stage:decode_st|dec_op_inst.saddr2[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 19.228 ns ;
+; N/A ; 51.31 MHz ( period = 19.489 ns ) ; decode_stage:decode_st|dec_op_inst.saddr2[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 19.228 ns ;
+; N/A ; 51.31 MHz ( period = 19.489 ns ) ; decode_stage:decode_st|dec_op_inst.saddr2[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 19.228 ns ;
+; N/A ; 51.32 MHz ( period = 19.484 ns ) ; decode_stage:decode_st|dec_op_inst.saddr1[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 19.232 ns ;
+; N/A ; 51.32 MHz ( period = 19.484 ns ) ; decode_stage:decode_st|dec_op_inst.saddr1[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 19.232 ns ;
+; N/A ; 51.32 MHz ( period = 19.484 ns ) ; decode_stage:decode_st|dec_op_inst.saddr1[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 19.232 ns ;
+; N/A ; 51.32 MHz ( period = 19.484 ns ) ; decode_stage:decode_st|dec_op_inst.saddr1[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 19.232 ns ;
+; N/A ; 51.32 MHz ( period = 19.484 ns ) ; decode_stage:decode_st|dec_op_inst.saddr1[2] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 19.232 ns ;
+; N/A ; 51.36 MHz ( period = 19.471 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; execute_stage:exec_st|reg.result[2] ; sys_clk ; sys_clk ; None ; None ; 18.777 ns ;
+; N/A ; 51.36 MHz ( period = 19.471 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; execute_stage:exec_st|reg.result[2] ; sys_clk ; sys_clk ; None ; None ; 18.777 ns ;
+; N/A ; 51.36 MHz ( period = 19.471 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; execute_stage:exec_st|reg.result[2] ; sys_clk ; sys_clk ; None ; None ; 18.777 ns ;
+; N/A ; 51.37 MHz ( period = 19.465 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg2 ; execute_stage:exec_st|reg.result[2] ; sys_clk ; sys_clk ; None ; None ; 19.145 ns ;
+; N/A ; 51.42 MHz ( period = 19.447 ns ) ; decode_stage:decode_st|rtw_rec.imm_set ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 19.186 ns ;
+; N/A ; 51.45 MHz ( period = 19.436 ns ) ; decode_stage:decode_st|rtw_rec.imm_set ; execute_stage:exec_st|reg.result[20] ; sys_clk ; sys_clk ; None ; None ; 19.175 ns ;
+; N/A ; 51.48 MHz ( period = 19.426 ns ) ; writeback_stage:writeback_st|wb_reg.dmem_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 19.165 ns ;
+; N/A ; 51.51 MHz ( period = 19.415 ns ) ; writeback_stage:writeback_st|wb_reg.dmem_en ; execute_stage:exec_st|reg.result[20] ; sys_clk ; sys_clk ; None ; None ; 19.154 ns ;
+; N/A ; 51.70 MHz ( period = 19.343 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|new_tx_data ; sys_clk ; sys_clk ; None ; None ; 18.649 ns ;
+; N/A ; 51.70 MHz ( period = 19.343 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|new_tx_data ; sys_clk ; sys_clk ; None ; None ; 18.649 ns ;
+; N/A ; 51.70 MHz ( period = 19.343 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|new_tx_data ; sys_clk ; sys_clk ; None ; None ; 18.649 ns ;
+; N/A ; 51.75 MHz ( period = 19.324 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg0 ; execute_stage:exec_st|reg.result[9] ; sys_clk ; sys_clk ; None ; None ; 18.630 ns ;
+; N/A ; 51.75 MHz ( period = 19.324 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg1 ; execute_stage:exec_st|reg.result[9] ; sys_clk ; sys_clk ; None ; None ; 18.630 ns ;
+; N/A ; 51.75 MHz ( period = 19.324 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg2 ; execute_stage:exec_st|reg.result[9] ; sys_clk ; sys_clk ; None ; None ; 18.630 ns ;
+; N/A ; 51.77 MHz ( period = 19.315 ns ) ; decode_stage:decode_st|rtw_rec.imm_set ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 19.113 ns ;
+; N/A ; 51.79 MHz ( period = 19.310 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; writeback_stage:writeback_st|extension_uart:uart|new_tx_data ; sys_clk ; sys_clk ; None ; None ; 18.616 ns ;
+; N/A ; 51.79 MHz ( period = 19.310 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; writeback_stage:writeback_st|extension_uart:uart|new_tx_data ; sys_clk ; sys_clk ; None ; None ; 18.616 ns ;
+; N/A ; 51.79 MHz ( period = 19.310 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; writeback_stage:writeback_st|extension_uart:uart|new_tx_data ; sys_clk ; sys_clk ; None ; None ; 18.616 ns ;
+; N/A ; 51.81 MHz ( period = 19.300 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg0 ; execute_stage:exec_st|reg.result[23] ; sys_clk ; sys_clk ; None ; None ; 18.606 ns ;
+; N/A ; 51.81 MHz ( period = 19.300 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg1 ; execute_stage:exec_st|reg.result[23] ; sys_clk ; sys_clk ; None ; None ; 18.606 ns ;
+; N/A ; 51.81 MHz ( period = 19.300 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg2 ; execute_stage:exec_st|reg.result[23] ; sys_clk ; sys_clk ; None ; None ; 18.606 ns ;
+; N/A ; 51.82 MHz ( period = 19.298 ns ) ; execute_stage:exec_st|reg.res_addr[2] ; execute_stage:exec_st|reg.result[31] ; sys_clk ; sys_clk ; None ; None ; 19.046 ns ;
+; N/A ; 51.83 MHz ( period = 19.294 ns ) ; writeback_stage:writeback_st|wb_reg.dmem_en ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 19.092 ns ;
+; N/A ; 51.92 MHz ( period = 19.261 ns ) ; execute_stage:exec_st|reg.alu_jump ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ; sys_clk ; None ; None ; 19.000 ns ;
+; N/A ; 51.95 MHz ( period = 19.251 ns ) ; execute_stage:exec_st|reg.res_addr[2] ; execute_stage:exec_st|reg.result[9] ; sys_clk ; sys_clk ; None ; None ; 18.999 ns ;
+; N/A ; 51.95 MHz ( period = 19.250 ns ) ; execute_stage:exec_st|reg.alu_jump ; execute_stage:exec_st|reg.result[20] ; sys_clk ; sys_clk ; None ; None ; 18.989 ns ;
+; N/A ; 51.98 MHz ( period = 19.239 ns ) ; execute_stage:exec_st|reg.wr_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 19.037 ns ;
+; N/A ; 51.98 MHz ( period = 19.239 ns ) ; execute_stage:exec_st|reg.wr_en ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 19.037 ns ;
+; N/A ; 52.18 MHz ( period = 19.166 ns ) ; execute_stage:exec_st|reg.res_addr[2] ; execute_stage:exec_st|reg.result[2] ; sys_clk ; sys_clk ; None ; None ; 18.914 ns ;
+; N/A ; 52.21 MHz ( period = 19.155 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg0 ; execute_stage:exec_st|reg.result[31] ; sys_clk ; sys_clk ; None ; None ; 18.461 ns ;
+; N/A ; 52.21 MHz ( period = 19.155 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg1 ; execute_stage:exec_st|reg.result[31] ; sys_clk ; sys_clk ; None ; None ; 18.461 ns ;
+; N/A ; 52.21 MHz ( period = 19.155 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg2 ; execute_stage:exec_st|reg.result[31] ; sys_clk ; sys_clk ; None ; None ; 18.461 ns ;
+; N/A ; 52.28 MHz ( period = 19.129 ns ) ; execute_stage:exec_st|reg.alu_jump ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ; sys_clk ; None ; None ; 18.927 ns ;
+; N/A ; 52.35 MHz ( period = 19.104 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; execute_stage:exec_st|reg.result[6] ; sys_clk ; sys_clk ; None ; None ; 18.469 ns ;
+; N/A ; 52.35 MHz ( period = 19.104 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; execute_stage:exec_st|reg.result[6] ; sys_clk ; sys_clk ; None ; None ; 18.469 ns ;
+; N/A ; 52.35 MHz ( period = 19.104 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; execute_stage:exec_st|reg.result[6] ; sys_clk ; sys_clk ; None ; None ; 18.469 ns ;
+; N/A ; 52.36 MHz ( period = 19.098 ns ) ; decode_stage:decode_st|rtw_rec.rtw_reg2 ; execute_stage:exec_st|reg.result[6] ; sys_clk ; sys_clk ; None ; None ; 18.837 ns ;
+; N/A ; 52.44 MHz ( period = 19.071 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg0 ; execute_stage:exec_st|reg.result[1] ; sys_clk ; sys_clk ; None ; None ; 18.377 ns ;
+; N/A ; 52.44 MHz ( period = 19.071 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg1 ; execute_stage:exec_st|reg.result[1] ; sys_clk ; sys_clk ; None ; None ; 18.377 ns ;
+; N/A ; 52.44 MHz ( period = 19.071 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg2 ; execute_stage:exec_st|reg.result[1] ; sys_clk ; sys_clk ; None ; None ; 18.377 ns ;
+; N/A ; 52.49 MHz ( period = 19.051 ns ) ; execute_stage:exec_st|reg.result[15] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ; sys_clk ; None ; None ; 18.790 ns ;
+; N/A ; 52.49 MHz ( period = 19.051 ns ) ; execute_stage:exec_st|reg.result[15] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ; sys_clk ; None ; None ; 18.790 ns ;
+; N/A ; 52.49 MHz ( period = 19.051 ns ) ; execute_stage:exec_st|reg.result[15] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ; sys_clk ; None ; None ; 18.790 ns ;
+; N/A ; 52.49 MHz ( period = 19.051 ns ) ; execute_stage:exec_st|reg.result[15] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ; sys_clk ; None ; None ; 18.790 ns ;
+; N/A ; 52.49 MHz ( period = 19.051 ns ) ; execute_stage:exec_st|reg.result[15] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ; sys_clk ; None ; None ; 18.790 ns ;
+; N/A ; 52.52 MHz ( period = 19.042 ns ) ; execute_stage:exec_st|reg.result[26] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ; sys_clk ; None ; None ; 18.849 ns ;
+; N/A ; 52.52 MHz ( period = 19.042 ns ) ; execute_stage:exec_st|reg.result[26] ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ; sys_clk ; None ; None ; 18.849 ns ;
+; N/A ; 52.55 MHz ( period = 19.031 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg0 ; execute_stage:exec_st|reg.result[27] ; sys_clk ; sys_clk ; None ; None ; 18.337 ns ;
+; N/A ; 52.55 MHz ( period = 19.031 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg1 ; execute_stage:exec_st|reg.result[27] ; sys_clk ; sys_clk ; None ; None ; 18.337 ns ;
+; N/A ; 52.55 MHz ( period = 19.031 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg2 ; execute_stage:exec_st|reg.result[27] ; sys_clk ; sys_clk ; None ; None ; 18.337 ns ;
+; N/A ; 52.56 MHz ( period = 19.025 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg0 ; execute_stage:exec_st|reg.result[24] ; sys_clk ; sys_clk ; None ; None ; 18.331 ns ;
+; N/A ; 52.56 MHz ( period = 19.025 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg1 ; execute_stage:exec_st|reg.result[24] ; sys_clk ; sys_clk ; None ; None ; 18.331 ns ;
+; N/A ; 52.56 MHz ( period = 19.025 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg2 ; execute_stage:exec_st|reg.result[24] ; sys_clk ; sys_clk ; None ; None ; 18.331 ns ;
+; N/A ; 52.56 MHz ( period = 19.025 ns ) ; decode_stage:decode_st|rtw_rec.imm_set ; execute_stage:exec_st|reg.result[31] ; sys_clk ; sys_clk ; None ; None ; 18.764 ns ;
+; N/A ; 52.62 MHz ( period = 19.004 ns ) ; writeback_stage:writeback_st|wb_reg.dmem_en ; execute_stage:exec_st|reg.result[31] ; sys_clk ; sys_clk ; None ; None ; 18.743 ns ;
+; N/A ; 52.62 MHz ( period = 19.003 ns ) ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg1 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[21] ; sys_clk ; sys_clk ; None ; None ; 18.309 ns ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ; ;
+-----------------------------------------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
++---------------------------------------------------------------------------------------------------------------------------+
+; tsu ;
++-------+--------------+------------+---------+------------------------------------------------------------------+----------+
+; Slack ; Required tsu ; Actual tsu ; From ; To ; To Clock ;
++-------+--------------+------------+---------+------------------------------------------------------------------+----------+
+; N/A ; None ; 16.692 ns ; sys_res ; execute_stage:exec_st|reg.result[2] ; sys_clk ;
+; N/A ; None ; 16.689 ns ; sys_res ; fetch_stage:fetch_st|r_w_ram:instruction_ram|data_out[25] ; sys_clk ;
+; N/A ; None ; 16.688 ns ; sys_res ; fetch_stage:fetch_st|r_w_ram:instruction_ram|data_out[27] ; sys_clk ;
+; N/A ; None ; 16.686 ns ; sys_res ; fetch_stage:fetch_st|r_w_ram:instruction_ram|data_out[15] ; sys_clk ;
+; N/A ; None ; 16.684 ns ; sys_res ; fetch_stage:fetch_st|r_w_ram:instruction_ram|data_out[21] ; sys_clk ;
+; N/A ; None ; 16.683 ns ; sys_res ; fetch_stage:fetch_st|r_w_ram:instruction_ram|data_out[9] ; sys_clk ;
+; N/A ; None ; 16.681 ns ; sys_res ; fetch_stage:fetch_st|r_w_ram:instruction_ram|data_out[26] ; sys_clk ;
+; N/A ; None ; 15.220 ns ; sys_res ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ;
+; N/A ; None ; 15.220 ns ; sys_res ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ;
+; N/A ; None ; 15.220 ns ; sys_res ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ;
+; N/A ; None ; 15.220 ns ; sys_res ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ;
+; N/A ; None ; 15.220 ns ; sys_res ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ;
+; N/A ; None ; 14.759 ns ; sys_res ; execute_stage:exec_st|reg.result[1] ; sys_clk ;
+; N/A ; None ; 14.741 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][19] ; sys_clk ;
+; N/A ; None ; 14.741 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][20] ; sys_clk ;
+; N/A ; None ; 14.741 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][21] ; sys_clk ;
+; N/A ; None ; 14.673 ns ; sys_res ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ;
+; N/A ; None ; 14.673 ns ; sys_res ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ;
+; N/A ; None ; 14.394 ns ; sys_res ; fetch_stage:fetch_st|instr_r_addr[0] ; sys_clk ;
+; N/A ; None ; 14.381 ns ; sys_res ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ;
+; N/A ; None ; 14.248 ns ; sys_res ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ;
+; N/A ; None ; 13.957 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][1] ; sys_clk ;
+; N/A ; None ; 13.957 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][10] ; sys_clk ;
+; N/A ; None ; 13.781 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][18] ; sys_clk ;
+; N/A ; None ; 13.781 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][11] ; sys_clk ;
+; N/A ; None ; 13.781 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][16] ; sys_clk ;
+; N/A ; None ; 13.781 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][17] ; sys_clk ;
+; N/A ; None ; 13.742 ns ; sys_res ; execute_stage:exec_st|reg.result[30] ; sys_clk ;
+; N/A ; None ; 13.717 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][6] ; sys_clk ;
+; N/A ; None ; 13.717 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][2] ; sys_clk ;
+; N/A ; None ; 13.717 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][3] ; sys_clk ;
+; N/A ; None ; 13.717 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][4] ; sys_clk ;
+; N/A ; None ; 13.717 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][5] ; sys_clk ;
+; N/A ; None ; 13.380 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][28] ; sys_clk ;
+; N/A ; None ; 13.380 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][29] ; sys_clk ;
+; N/A ; None ; 13.375 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][7] ; sys_clk ;
+; N/A ; None ; 13.265 ns ; sys_res ; fetch_stage:fetch_st|instr_r_addr[2] ; sys_clk ;
+; N/A ; None ; 13.205 ns ; sys_res ; writeback_stage:writeback_st|extension_uart:uart|new_tx_data ; sys_clk ;
+; N/A ; None ; 13.126 ns ; sys_res ; execute_stage:exec_st|reg.result[3] ; sys_clk ;
+; N/A ; None ; 13.126 ns ; sys_res ; execute_stage:exec_st|reg.result[6] ; sys_clk ;
+; N/A ; None ; 12.974 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][8] ; sys_clk ;
+; N/A ; None ; 12.974 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][9] ; sys_clk ;
+; N/A ; None ; 12.948 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][14] ; sys_clk ;
+; N/A ; None ; 12.948 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][12] ; sys_clk ;
+; N/A ; None ; 12.948 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][13] ; sys_clk ;
+; N/A ; None ; 12.948 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][15] ; sys_clk ;
+; N/A ; None ; 12.942 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][22] ; sys_clk ;
+; N/A ; None ; 12.942 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][23] ; sys_clk ;
+; N/A ; None ; 12.942 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][24] ; sys_clk ;
+; N/A ; None ; 12.942 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][25] ; sys_clk ;
+; N/A ; None ; 12.849 ns ; sys_res ; execute_stage:exec_st|reg.result[25] ; sys_clk ;
+; N/A ; None ; 12.769 ns ; sys_res ; writeback_stage:writeback_st|wb_reg.dmem_write_en ; sys_clk ;
+; N/A ; None ; 12.542 ns ; sys_res ; execute_stage:exec_st|reg.result[7] ; sys_clk ;
+; N/A ; None ; 12.384 ns ; sys_res ; execute_stage:exec_st|reg.result[11] ; sys_clk ;
+; N/A ; None ; 12.380 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][27] ; sys_clk ;
+; N/A ; None ; 12.255 ns ; sys_res ; execute_stage:exec_st|reg.result[9] ; sys_clk ;
+; N/A ; None ; 12.236 ns ; sys_res ; execute_stage:exec_st|reg.result[29] ; sys_clk ;
+; N/A ; None ; 12.158 ns ; sys_res ; execute_stage:exec_st|reg.result[13] ; sys_clk ;
+; N/A ; None ; 12.154 ns ; sys_res ; execute_stage:exec_st|reg.result[15] ; sys_clk ;
+; N/A ; None ; 12.149 ns ; sys_res ; execute_stage:exec_st|reg.result[28] ; sys_clk ;
+; N/A ; None ; 12.123 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][0] ; sys_clk ;
+; N/A ; None ; 12.123 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][26] ; sys_clk ;
+; N/A ; None ; 12.033 ns ; sys_res ; execute_stage:exec_st|reg.result[21] ; sys_clk ;
+; N/A ; None ; 12.027 ns ; sys_res ; execute_stage:exec_st|reg.result[4] ; sys_clk ;
+; N/A ; None ; 11.977 ns ; sys_res ; execute_stage:exec_st|reg.result[16] ; sys_clk ;
+; N/A ; None ; 11.927 ns ; sys_res ; execute_stage:exec_st|reg.result[20] ; sys_clk ;
+; N/A ; None ; 11.914 ns ; sys_res ; execute_stage:exec_st|reg.result[8] ; sys_clk ;
+; N/A ; None ; 11.890 ns ; sys_res ; fetch_stage:fetch_st|instr_r_addr[10] ; sys_clk ;
+; N/A ; None ; 11.889 ns ; sys_res ; fetch_stage:fetch_st|instr_r_addr[8] ; sys_clk ;
+; N/A ; None ; 11.881 ns ; sys_res ; execute_stage:exec_st|reg.result[17] ; sys_clk ;
+; N/A ; None ; 11.764 ns ; sys_res ; fetch_stage:fetch_st|instr_r_addr[5] ; sys_clk ;
+; N/A ; None ; 11.700 ns ; sys_res ; execute_stage:exec_st|reg.result[0] ; sys_clk ;
+; N/A ; None ; 11.660 ns ; sys_res ; execute_stage:exec_st|reg.result[10] ; sys_clk ;
+; N/A ; None ; 11.555 ns ; sys_res ; execute_stage:exec_st|reg.result[23] ; sys_clk ;
+; N/A ; None ; 11.555 ns ; sys_res ; execute_stage:exec_st|reg.result[27] ; sys_clk ;
+; N/A ; None ; 11.537 ns ; sys_res ; writeback_stage:writeback_st|wb_reg.dmem_en ; sys_clk ;
+; N/A ; None ; 11.535 ns ; sys_res ; execute_stage:exec_st|reg.wr_en ; sys_clk ;
+; N/A ; None ; 11.318 ns ; sys_res ; execute_stage:exec_st|reg.result[22] ; sys_clk ;
+; N/A ; None ; 11.315 ns ; sys_res ; execute_stage:exec_st|reg.result[26] ; sys_clk ;
+; N/A ; None ; 11.255 ns ; sys_res ; execute_stage:exec_st|reg.alu_jump ; sys_clk ;
+; N/A ; None ; 11.184 ns ; sys_res ; execute_stage:exec_st|reg.result[12] ; sys_clk ;
+; N/A ; None ; 11.144 ns ; sys_res ; fetch_stage:fetch_st|instr_r_addr[1] ; sys_clk ;
+; N/A ; None ; 11.127 ns ; sys_res ; fetch_stage:fetch_st|instr_r_addr[3] ; sys_clk ;
+; N/A ; None ; 11.007 ns ; sys_res ; fetch_stage:fetch_st|instr_r_addr[7] ; sys_clk ;
+; N/A ; None ; 10.999 ns ; sys_res ; execute_stage:exec_st|reg.result[5] ; sys_clk ;
+; N/A ; None ; 10.955 ns ; sys_res ; fetch_stage:fetch_st|instr_r_addr[9] ; sys_clk ;
+; N/A ; None ; 10.830 ns ; sys_res ; execute_stage:exec_st|reg.result[19] ; sys_clk ;
+; N/A ; None ; 10.734 ns ; sys_res ; execute_stage:exec_st|reg.result[18] ; sys_clk ;
+; N/A ; None ; 10.714 ns ; sys_res ; execute_stage:exec_st|reg.result[14] ; sys_clk ;
+; N/A ; None ; 10.601 ns ; sys_res ; execute_stage:exec_st|reg.result[24] ; sys_clk ;
+; N/A ; None ; 10.573 ns ; sys_res ; fetch_stage:fetch_st|instr_r_addr[6] ; sys_clk ;
+; N/A ; None ; 10.408 ns ; sys_res ; fetch_stage:fetch_st|instr_r_addr[4] ; sys_clk ;
+; N/A ; None ; 10.117 ns ; sys_res ; execute_stage:exec_st|reg.result[31] ; sys_clk ;
+; N/A ; None ; 9.756 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.carry ; sys_clk ;
++-------+--------------+------------+---------+------------------------------------------------------------------+----------+
+
+
+----------------------------------------------------------------------------------------------------------------------------------------------+
; tco ;
+-------+--------------+------------+------------------------------------------------------------------------------------+--------+------------+
; Slack ; Required tco ; Actual tco ; From ; To ; From Clock ;
+-------+--------------+------------+------------------------------------------------------------------------------------+--------+------------+
-; N/A ; None ; 8.846 ns ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|bus_tx_int ; bus_tx ; sys_clk ;
+; N/A ; None ; 8.362 ns ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|bus_tx_int ; bus_tx ; sys_clk ;
+-------+--------------+------------+------------------------------------------------------------------------------------+--------+------------+
++----------------------------------------------------------------------------------------------------------------------------------+
+; th ;
++---------------+-------------+------------+---------+------------------------------------------------------------------+----------+
+; Minimum Slack ; Required th ; Actual th ; From ; To ; To Clock ;
++---------------+-------------+------------+---------+------------------------------------------------------------------+----------+
+; N/A ; None ; -8.416 ns ; sys_res ; writeback_stage:writeback_st|extension_uart:uart|new_tx_data ; sys_clk ;
+; N/A ; None ; -9.704 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.carry ; sys_clk ;
+; N/A ; None ; -10.065 ns ; sys_res ; execute_stage:exec_st|reg.result[31] ; sys_clk ;
+; N/A ; None ; -10.356 ns ; sys_res ; fetch_stage:fetch_st|instr_r_addr[4] ; sys_clk ;
+; N/A ; None ; -10.521 ns ; sys_res ; fetch_stage:fetch_st|instr_r_addr[6] ; sys_clk ;
+; N/A ; None ; -10.549 ns ; sys_res ; execute_stage:exec_st|reg.result[24] ; sys_clk ;
+; N/A ; None ; -10.662 ns ; sys_res ; execute_stage:exec_st|reg.result[14] ; sys_clk ;
+; N/A ; None ; -10.682 ns ; sys_res ; execute_stage:exec_st|reg.result[18] ; sys_clk ;
+; N/A ; None ; -10.778 ns ; sys_res ; execute_stage:exec_st|reg.result[19] ; sys_clk ;
+; N/A ; None ; -10.903 ns ; sys_res ; fetch_stage:fetch_st|instr_r_addr[9] ; sys_clk ;
+; N/A ; None ; -10.947 ns ; sys_res ; execute_stage:exec_st|reg.result[5] ; sys_clk ;
+; N/A ; None ; -10.955 ns ; sys_res ; fetch_stage:fetch_st|instr_r_addr[7] ; sys_clk ;
+; N/A ; None ; -11.075 ns ; sys_res ; fetch_stage:fetch_st|instr_r_addr[3] ; sys_clk ;
+; N/A ; None ; -11.092 ns ; sys_res ; fetch_stage:fetch_st|instr_r_addr[1] ; sys_clk ;
+; N/A ; None ; -11.132 ns ; sys_res ; execute_stage:exec_st|reg.result[12] ; sys_clk ;
+; N/A ; None ; -11.203 ns ; sys_res ; execute_stage:exec_st|reg.alu_jump ; sys_clk ;
+; N/A ; None ; -11.263 ns ; sys_res ; execute_stage:exec_st|reg.result[26] ; sys_clk ;
+; N/A ; None ; -11.266 ns ; sys_res ; execute_stage:exec_st|reg.result[22] ; sys_clk ;
+; N/A ; None ; -11.483 ns ; sys_res ; execute_stage:exec_st|reg.wr_en ; sys_clk ;
+; N/A ; None ; -11.485 ns ; sys_res ; writeback_stage:writeback_st|wb_reg.dmem_en ; sys_clk ;
+; N/A ; None ; -11.503 ns ; sys_res ; execute_stage:exec_st|reg.result[23] ; sys_clk ;
+; N/A ; None ; -11.503 ns ; sys_res ; execute_stage:exec_st|reg.result[27] ; sys_clk ;
+; N/A ; None ; -11.608 ns ; sys_res ; execute_stage:exec_st|reg.result[10] ; sys_clk ;
+; N/A ; None ; -11.648 ns ; sys_res ; execute_stage:exec_st|reg.result[0] ; sys_clk ;
+; N/A ; None ; -11.662 ns ; sys_res ; fetch_stage:fetch_st|r_w_ram:instruction_ram|data_out[26] ; sys_clk ;
+; N/A ; None ; -11.662 ns ; sys_res ; fetch_stage:fetch_st|r_w_ram:instruction_ram|data_out[15] ; sys_clk ;
+; N/A ; None ; -11.663 ns ; sys_res ; fetch_stage:fetch_st|r_w_ram:instruction_ram|data_out[9] ; sys_clk ;
+; N/A ; None ; -11.664 ns ; sys_res ; fetch_stage:fetch_st|r_w_ram:instruction_ram|data_out[27] ; sys_clk ;
+; N/A ; None ; -11.665 ns ; sys_res ; fetch_stage:fetch_st|r_w_ram:instruction_ram|data_out[25] ; sys_clk ;
+; N/A ; None ; -11.712 ns ; sys_res ; fetch_stage:fetch_st|instr_r_addr[5] ; sys_clk ;
+; N/A ; None ; -11.829 ns ; sys_res ; execute_stage:exec_st|reg.result[17] ; sys_clk ;
+; N/A ; None ; -11.837 ns ; sys_res ; fetch_stage:fetch_st|instr_r_addr[8] ; sys_clk ;
+; N/A ; None ; -11.838 ns ; sys_res ; fetch_stage:fetch_st|instr_r_addr[10] ; sys_clk ;
+; N/A ; None ; -11.862 ns ; sys_res ; execute_stage:exec_st|reg.result[8] ; sys_clk ;
+; N/A ; None ; -11.875 ns ; sys_res ; execute_stage:exec_st|reg.result[20] ; sys_clk ;
+; N/A ; None ; -11.925 ns ; sys_res ; execute_stage:exec_st|reg.result[16] ; sys_clk ;
+; N/A ; None ; -11.975 ns ; sys_res ; execute_stage:exec_st|reg.result[4] ; sys_clk ;
+; N/A ; None ; -11.981 ns ; sys_res ; execute_stage:exec_st|reg.result[21] ; sys_clk ;
+; N/A ; None ; -12.071 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][0] ; sys_clk ;
+; N/A ; None ; -12.071 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][26] ; sys_clk ;
+; N/A ; None ; -12.097 ns ; sys_res ; execute_stage:exec_st|reg.result[28] ; sys_clk ;
+; N/A ; None ; -12.102 ns ; sys_res ; execute_stage:exec_st|reg.result[15] ; sys_clk ;
+; N/A ; None ; -12.106 ns ; sys_res ; execute_stage:exec_st|reg.result[13] ; sys_clk ;
+; N/A ; None ; -12.184 ns ; sys_res ; execute_stage:exec_st|reg.result[29] ; sys_clk ;
+; N/A ; None ; -12.203 ns ; sys_res ; execute_stage:exec_st|reg.result[9] ; sys_clk ;
+; N/A ; None ; -12.328 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][27] ; sys_clk ;
+; N/A ; None ; -12.332 ns ; sys_res ; execute_stage:exec_st|reg.result[11] ; sys_clk ;
+; N/A ; None ; -12.490 ns ; sys_res ; execute_stage:exec_st|reg.result[7] ; sys_clk ;
+; N/A ; None ; -12.717 ns ; sys_res ; writeback_stage:writeback_st|wb_reg.dmem_write_en ; sys_clk ;
+; N/A ; None ; -12.797 ns ; sys_res ; execute_stage:exec_st|reg.result[25] ; sys_clk ;
+; N/A ; None ; -12.890 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][22] ; sys_clk ;
+; N/A ; None ; -12.890 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][23] ; sys_clk ;
+; N/A ; None ; -12.890 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][24] ; sys_clk ;
+; N/A ; None ; -12.890 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][25] ; sys_clk ;
+; N/A ; None ; -12.896 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][14] ; sys_clk ;
+; N/A ; None ; -12.896 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][12] ; sys_clk ;
+; N/A ; None ; -12.896 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][13] ; sys_clk ;
+; N/A ; None ; -12.896 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][15] ; sys_clk ;
+; N/A ; None ; -12.922 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][8] ; sys_clk ;
+; N/A ; None ; -12.922 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][9] ; sys_clk ;
+; N/A ; None ; -12.945 ns ; sys_res ; fetch_stage:fetch_st|r_w_ram:instruction_ram|data_out[21] ; sys_clk ;
+; N/A ; None ; -13.074 ns ; sys_res ; execute_stage:exec_st|reg.result[3] ; sys_clk ;
+; N/A ; None ; -13.074 ns ; sys_res ; execute_stage:exec_st|reg.result[6] ; sys_clk ;
+; N/A ; None ; -13.213 ns ; sys_res ; fetch_stage:fetch_st|instr_r_addr[2] ; sys_clk ;
+; N/A ; None ; -13.323 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][7] ; sys_clk ;
+; N/A ; None ; -13.328 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][28] ; sys_clk ;
+; N/A ; None ; -13.328 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][29] ; sys_clk ;
+; N/A ; None ; -13.665 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][6] ; sys_clk ;
+; N/A ; None ; -13.665 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][2] ; sys_clk ;
+; N/A ; None ; -13.665 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][3] ; sys_clk ;
+; N/A ; None ; -13.665 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][4] ; sys_clk ;
+; N/A ; None ; -13.665 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][5] ; sys_clk ;
+; N/A ; None ; -13.690 ns ; sys_res ; execute_stage:exec_st|reg.result[30] ; sys_clk ;
+; N/A ; None ; -13.729 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][18] ; sys_clk ;
+; N/A ; None ; -13.729 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][11] ; sys_clk ;
+; N/A ; None ; -13.729 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][16] ; sys_clk ;
+; N/A ; None ; -13.729 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][17] ; sys_clk ;
+; N/A ; None ; -13.905 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][1] ; sys_clk ;
+; N/A ; None ; -13.905 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][10] ; sys_clk ;
+; N/A ; None ; -14.196 ns ; sys_res ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[0] ; sys_clk ;
+; N/A ; None ; -14.329 ns ; sys_res ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[1] ; sys_clk ;
+; N/A ; None ; -14.342 ns ; sys_res ; fetch_stage:fetch_st|instr_r_addr[0] ; sys_clk ;
+; N/A ; None ; -14.363 ns ; sys_res ; execute_stage:exec_st|reg.result[1] ; sys_clk ;
+; N/A ; None ; -14.621 ns ; sys_res ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[3] ; sys_clk ;
+; N/A ; None ; -14.621 ns ; sys_res ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[0] ; sys_clk ;
+; N/A ; None ; -14.689 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][19] ; sys_clk ;
+; N/A ; None ; -14.689 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][20] ; sys_clk ;
+; N/A ; None ; -14.689 ns ; sys_res ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][21] ; sys_clk ;
+; N/A ; None ; -15.078 ns ; sys_res ; execute_stage:exec_st|reg.result[2] ; sys_clk ;
+; N/A ; None ; -15.168 ns ; sys_res ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7] ; sys_clk ;
+; N/A ; None ; -15.168 ns ; sys_res ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[2] ; sys_clk ;
+; N/A ; None ; -15.168 ns ; sys_res ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[6] ; sys_clk ;
+; N/A ; None ; -15.168 ns ; sys_res ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[5] ; sys_clk ;
+; N/A ; None ; -15.168 ns ; sys_res ; writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[4] ; sys_clk ;
++---------------+-------------+------------+---------+------------------------------------------------------------------+----------+
+
+
+--------------------------+
; Timing Analyzer Messages ;
+--------------------------+
Info: *******************************************************************
Info: Running Quartus II Classic Timing Analyzer
Info: Version 10.0 Build 262 08/18/2010 Service Pack 1 SJ Web Edition
- Info: Processing started: Thu Dec 16 16:55:05 2010
+ Info: Processing started: Fri Dec 17 10:10:41 2010
Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off dt -c dt --timing_analysis_only
Warning: Classic Timing Analyzer will not be available in a future release of the Quartus II software. Use the TimeQuest Timing Analyzer to run timing analysis on your design. Convert all the project settings and the timing constraints to TimeQuest Timing Analyzer equivalents.
Warning: Found pins functioning as undefined clocks and/or memory enables
Info: Assuming node "sys_clk" is an undefined clock
-Info: Clock "sys_clk" has Internal fmax of 49.7 MHz between source memory "decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0" and destination register "writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7]" (period= 20.119 ns)
- Info: + Longest memory to register delay is 19.416 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = M4K_X33_Y16; Fanout = 32; MEM Node = 'decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0'
- Info: 2: + IC(0.000 ns) + CELL(4.317 ns) = 4.317 ns; Loc. = M4K_X33_Y16; Fanout = 1; MEM Node = 'decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a9'
- Info: 3: + IC(1.893 ns) + CELL(0.114 ns) = 6.324 ns; Loc. = LC_X27_Y12_N5; Fanout = 1; COMB Node = 'execute_stage:exec_st|left_operand[9]~23'
- Info: 4: + IC(0.416 ns) + CELL(0.114 ns) = 6.854 ns; Loc. = LC_X27_Y12_N2; Fanout = 6; COMB Node = 'execute_stage:exec_st|left_operand[9]~24'
- Info: 5: + IC(1.990 ns) + CELL(0.564 ns) = 9.408 ns; Loc. = LC_X28_Y13_N3; Fanout = 2; COMB Node = 'execute_stage:exec_st|alu:alu_inst|exec_op:add_inst|Add2~52'
- Info: 6: + IC(0.000 ns) + CELL(0.178 ns) = 9.586 ns; Loc. = LC_X28_Y13_N4; Fanout = 6; COMB Node = 'execute_stage:exec_st|alu:alu_inst|exec_op:add_inst|Add2~57'
- Info: 7: + IC(0.000 ns) + CELL(0.208 ns) = 9.794 ns; Loc. = LC_X28_Y13_N9; Fanout = 6; COMB Node = 'execute_stage:exec_st|alu:alu_inst|exec_op:add_inst|Add2~77'
- Info: 8: + IC(0.000 ns) + CELL(0.679 ns) = 10.473 ns; Loc. = LC_X28_Y12_N2; Fanout = 2; COMB Node = 'execute_stage:exec_st|alu:alu_inst|exec_op:add_inst|Add2~90'
- Info: 9: + IC(1.498 ns) + CELL(0.114 ns) = 12.085 ns; Loc. = LC_X32_Y12_N1; Fanout = 1; COMB Node = 'writeback_stage:writeback_st|Equal0~14'
- Info: 10: + IC(0.428 ns) + CELL(0.590 ns) = 13.103 ns; Loc. = LC_X32_Y12_N2; Fanout = 1; COMB Node = 'writeback_stage:writeback_st|Equal0~17'
- Info: 11: + IC(1.142 ns) + CELL(0.590 ns) = 14.835 ns; Loc. = LC_X29_Y12_N8; Fanout = 5; COMB Node = 'writeback_stage:writeback_st|Equal0~23'
- Info: 12: + IC(1.556 ns) + CELL(0.114 ns) = 16.505 ns; Loc. = LC_X28_Y11_N8; Fanout = 8; COMB Node = 'writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7]~1'
- Info: 13: + IC(2.044 ns) + CELL(0.867 ns) = 19.416 ns; Loc. = LC_X36_Y14_N5; Fanout = 1; REG Node = 'writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7]'
- Info: Total cell delay = 8.449 ns ( 43.52 % )
- Info: Total interconnect delay = 10.967 ns ( 56.48 % )
- Info: - Smallest clock skew is -0.016 ns
- Info: + Shortest clock path from clock "sys_clk" to destination register is 3.178 ns
- Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_152; Fanout = 283; CLK Node = 'sys_clk'
- Info: 2: + IC(0.998 ns) + CELL(0.711 ns) = 3.178 ns; Loc. = LC_X36_Y14_N5; Fanout = 1; REG Node = 'writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7]'
- Info: Total cell delay = 2.180 ns ( 68.60 % )
- Info: Total interconnect delay = 0.998 ns ( 31.40 % )
+Info: Clock "sys_clk" has Internal fmax of 46.92 MHz between source memory "decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg0" and destination register "writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7]" (period= 21.311 ns)
+ Info: + Longest memory to register delay is 20.617 ns
+ Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = M4K_X33_Y18; Fanout = 32; MEM Node = 'decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg0'
+ Info: 2: + IC(0.000 ns) + CELL(4.317 ns) = 4.317 ns; Loc. = M4K_X33_Y18; Fanout = 1; MEM Node = 'decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a1'
+ Info: 3: + IC(1.103 ns) + CELL(0.114 ns) = 5.534 ns; Loc. = LC_X31_Y18_N3; Fanout = 1; COMB Node = 'execute_stage:exec_st|left_operand[1]~3'
+ Info: 4: + IC(0.437 ns) + CELL(0.114 ns) = 6.085 ns; Loc. = LC_X31_Y18_N2; Fanout = 5; COMB Node = 'execute_stage:exec_st|left_operand[1]~4'
+ Info: 5: + IC(1.249 ns) + CELL(0.114 ns) = 7.448 ns; Loc. = LC_X31_Y22_N0; Fanout = 9; COMB Node = 'execute_stage:exec_st|alu:alu_inst|Selector106~0'
+ Info: 6: + IC(0.410 ns) + CELL(0.432 ns) = 8.290 ns; Loc. = LC_X31_Y22_N5; Fanout = 2; COMB Node = 'execute_stage:exec_st|alu:alu_inst|exec_op:add_inst|Add1~152COUT1_192'
+ Info: 7: + IC(0.000 ns) + CELL(0.080 ns) = 8.370 ns; Loc. = LC_X31_Y22_N6; Fanout = 2; COMB Node = 'execute_stage:exec_st|alu:alu_inst|exec_op:add_inst|Add1~147COUT1_194'
+ Info: 8: + IC(0.000 ns) + CELL(0.608 ns) = 8.978 ns; Loc. = LC_X31_Y22_N7; Fanout = 3; COMB Node = 'execute_stage:exec_st|alu:alu_inst|exec_op:add_inst|Add1~0'
+ Info: 9: + IC(0.728 ns) + CELL(0.575 ns) = 10.281 ns; Loc. = LC_X30_Y22_N7; Fanout = 2; COMB Node = 'execute_stage:exec_st|alu:alu_inst|exec_op:add_inst|alu_result.result[3]~2COUT1_191'
+ Info: 10: + IC(0.000 ns) + CELL(0.608 ns) = 10.889 ns; Loc. = LC_X30_Y22_N8; Fanout = 2; COMB Node = 'execute_stage:exec_st|alu:alu_inst|exec_op:add_inst|alu_result.result[4]~10'
+ Info: 11: + IC(1.603 ns) + CELL(0.114 ns) = 12.606 ns; Loc. = LC_X32_Y21_N2; Fanout = 1; COMB Node = 'execute_stage:exec_st|alu:alu_inst|Selector70~0'
+ Info: 12: + IC(1.282 ns) + CELL(0.292 ns) = 14.180 ns; Loc. = LC_X31_Y17_N0; Fanout = 1; COMB Node = 'execute_stage:exec_st|alu:alu_inst|Selector70~1'
+ Info: 13: + IC(0.418 ns) + CELL(0.114 ns) = 14.712 ns; Loc. = LC_X31_Y17_N5; Fanout = 1; COMB Node = 'writeback_stage:writeback_st|Equal0~0'
+ Info: 14: + IC(0.727 ns) + CELL(0.292 ns) = 15.731 ns; Loc. = LC_X30_Y17_N6; Fanout = 7; COMB Node = 'writeback_stage:writeback_st|Equal0~5'
+ Info: 15: + IC(1.590 ns) + CELL(0.292 ns) = 17.613 ns; Loc. = LC_X27_Y19_N2; Fanout = 1; COMB Node = 'writeback_stage:writeback_st|Equal0~8'
+ Info: 16: + IC(0.182 ns) + CELL(0.114 ns) = 17.909 ns; Loc. = LC_X27_Y19_N3; Fanout = 5; COMB Node = 'writeback_stage:writeback_st|Equal0~12'
+ Info: 17: + IC(0.431 ns) + CELL(0.114 ns) = 18.454 ns; Loc. = LC_X27_Y19_N6; Fanout = 8; COMB Node = 'writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7]~0'
+ Info: 18: + IC(1.296 ns) + CELL(0.867 ns) = 20.617 ns; Loc. = LC_X28_Y21_N7; Fanout = 1; REG Node = 'writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7]'
+ Info: Total cell delay = 9.161 ns ( 44.43 % )
+ Info: Total interconnect delay = 11.456 ns ( 55.57 % )
+ Info: - Smallest clock skew is -0.007 ns
+ Info: + Shortest clock path from clock "sys_clk" to destination register is 3.187 ns
+ Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_152; Fanout = 357; CLK Node = 'sys_clk'
+ Info: 2: + IC(1.007 ns) + CELL(0.711 ns) = 3.187 ns; Loc. = LC_X28_Y21_N7; Fanout = 1; REG Node = 'writeback_stage:writeback_st|extension_uart:uart|w3_uart_send[7]'
+ Info: Total cell delay = 2.180 ns ( 68.40 % )
+ Info: Total interconnect delay = 1.007 ns ( 31.60 % )
Info: - Longest clock path from clock "sys_clk" to source memory is 3.194 ns
- Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_152; Fanout = 283; CLK Node = 'sys_clk'
- Info: 2: + IC(1.007 ns) + CELL(0.718 ns) = 3.194 ns; Loc. = M4K_X33_Y16; Fanout = 32; MEM Node = 'decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0'
+ Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_152; Fanout = 357; CLK Node = 'sys_clk'
+ Info: 2: + IC(1.007 ns) + CELL(0.718 ns) = 3.194 ns; Loc. = M4K_X33_Y18; Fanout = 32; MEM Node = 'decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_0|altsyncram_emk1:auto_generated|ram_block1a0~portb_address_reg0'
Info: Total cell delay = 2.187 ns ( 68.47 % )
Info: Total interconnect delay = 1.007 ns ( 31.53 % )
Info: + Micro clock to output delay of source is 0.650 ns
Info: + Micro setup delay of destination is 0.037 ns
-Info: tco from clock "sys_clk" to destination pin "bus_tx" through register "writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|bus_tx_int" is 8.846 ns
- Info: + Longest clock path from clock "sys_clk" to source register is 3.178 ns
- Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_152; Fanout = 283; CLK Node = 'sys_clk'
- Info: 2: + IC(0.998 ns) + CELL(0.711 ns) = 3.178 ns; Loc. = LC_X36_Y14_N2; Fanout = 1; REG Node = 'writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|bus_tx_int'
- Info: Total cell delay = 2.180 ns ( 68.60 % )
- Info: Total interconnect delay = 0.998 ns ( 31.40 % )
+Info: tsu for register "execute_stage:exec_st|reg.result[2]" (data pin = "sys_res", clock pin = "sys_clk") is 16.692 ns
+ Info: + Longest pin to register delay is 19.842 ns
+ Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_42; Fanout = 205; PIN Node = 'sys_res'
+ Info: 2: + IC(9.460 ns) + CELL(0.292 ns) = 11.221 ns; Loc. = LC_X37_Y17_N4; Fanout = 7; COMB Node = 'execute_stage:exec_st|alu:alu_inst|\calc:cond_met~0'
+ Info: 3: + IC(0.771 ns) + CELL(0.114 ns) = 12.106 ns; Loc. = LC_X36_Y17_N6; Fanout = 32; COMB Node = 'execute_stage:exec_st|alu:alu_inst|calc~0'
+ Info: 4: + IC(2.560 ns) + CELL(0.114 ns) = 14.780 ns; Loc. = LC_X27_Y16_N7; Fanout = 3; COMB Node = 'execute_stage:exec_st|reg.result[1]~19'
+ Info: 5: + IC(2.407 ns) + CELL(0.442 ns) = 17.629 ns; Loc. = LC_X27_Y22_N4; Fanout = 1; COMB Node = 'execute_stage:exec_st|alu:alu_inst|alu_result.result[2]~8'
+ Info: 6: + IC(1.606 ns) + CELL(0.607 ns) = 19.842 ns; Loc. = LC_X32_Y22_N2; Fanout = 2; REG Node = 'execute_stage:exec_st|reg.result[2]'
+ Info: Total cell delay = 3.038 ns ( 15.31 % )
+ Info: Total interconnect delay = 16.804 ns ( 84.69 % )
+ Info: + Micro setup delay of destination is 0.037 ns
+ Info: - Shortest clock path from clock "sys_clk" to destination register is 3.187 ns
+ Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_152; Fanout = 357; CLK Node = 'sys_clk'
+ Info: 2: + IC(1.007 ns) + CELL(0.711 ns) = 3.187 ns; Loc. = LC_X32_Y22_N2; Fanout = 2; REG Node = 'execute_stage:exec_st|reg.result[2]'
+ Info: Total cell delay = 2.180 ns ( 68.40 % )
+ Info: Total interconnect delay = 1.007 ns ( 31.60 % )
+Info: tco from clock "sys_clk" to destination pin "bus_tx" through register "writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|bus_tx_int" is 8.362 ns
+ Info: + Longest clock path from clock "sys_clk" to source register is 3.187 ns
+ Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_152; Fanout = 357; CLK Node = 'sys_clk'
+ Info: 2: + IC(1.007 ns) + CELL(0.711 ns) = 3.187 ns; Loc. = LC_X40_Y20_N8; Fanout = 1; REG Node = 'writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|bus_tx_int'
+ Info: Total cell delay = 2.180 ns ( 68.40 % )
+ Info: Total interconnect delay = 1.007 ns ( 31.60 % )
Info: + Micro clock to output delay of source is 0.224 ns
- Info: + Longest register to pin delay is 5.444 ns
- Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X36_Y14_N2; Fanout = 1; REG Node = 'writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|bus_tx_int'
- Info: 2: + IC(3.320 ns) + CELL(2.124 ns) = 5.444 ns; Loc. = PIN_166; Fanout = 0; PIN Node = 'bus_tx'
- Info: Total cell delay = 2.124 ns ( 39.02 % )
- Info: Total interconnect delay = 3.320 ns ( 60.98 % )
+ Info: + Longest register to pin delay is 4.951 ns
+ Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X40_Y20_N8; Fanout = 1; REG Node = 'writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|bus_tx_int'
+ Info: 2: + IC(2.827 ns) + CELL(2.124 ns) = 4.951 ns; Loc. = PIN_166; Fanout = 0; PIN Node = 'bus_tx'
+ Info: Total cell delay = 2.124 ns ( 42.90 % )
+ Info: Total interconnect delay = 2.827 ns ( 57.10 % )
+Info: th for register "writeback_stage:writeback_st|extension_uart:uart|new_tx_data" (data pin = "sys_res", clock pin = "sys_clk") is -8.416 ns
+ Info: + Longest clock path from clock "sys_clk" to destination register is 3.187 ns
+ Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_152; Fanout = 357; CLK Node = 'sys_clk'
+ Info: 2: + IC(1.007 ns) + CELL(0.711 ns) = 3.187 ns; Loc. = LC_X27_Y19_N6; Fanout = 1; REG Node = 'writeback_stage:writeback_st|extension_uart:uart|new_tx_data'
+ Info: Total cell delay = 2.180 ns ( 68.40 % )
+ Info: Total interconnect delay = 1.007 ns ( 31.60 % )
+ Info: + Micro hold delay of destination is 0.015 ns
+ Info: - Shortest pin to register delay is 11.618 ns
+ Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_42; Fanout = 205; PIN Node = 'sys_res'
+ Info: 2: + IC(9.282 ns) + CELL(0.867 ns) = 11.618 ns; Loc. = LC_X27_Y19_N6; Fanout = 1; REG Node = 'writeback_stage:writeback_st|extension_uart:uart|new_tx_data'
+ Info: Total cell delay = 2.336 ns ( 20.11 % )
+ Info: Total interconnect delay = 9.282 ns ( 79.89 % )
Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 2 warnings
- Info: Peak virtual memory: 187 megabytes
- Info: Processing ended: Thu Dec 16 16:55:06 2010
+ Info: Peak virtual memory: 189 megabytes
+ Info: Processing ended: Fri Dec 17 10:10:42 2010
Info: Elapsed time: 00:00:01
Info: Total CPU time (on all processors): 00:00:01