uart und extension anbindung

[calu.git] / dt / dt.map.summary

diff --git a/dt/dt.map.summary b/dt/dt.map.summary
index f5309a23a33af5fe8d7f0813cc45dcd07feabfc6..bbe1d3e37fca6cdb3f84b11372cc55dfc91eb028 100644 (file)
--- a/dt/dt.map.summary
+++ b/dt/dt.map.summary
@@ -1,10 +1,10 @@
-Analysis & Synthesis Status : Successful - Fri Dec 17 12:26:49 2010
+Analysis & Synthesis Status : Successful - Sun Dec 19 20:36:26 2010
 Quartus II Version : 10.0 Build 262 08/18/2010 SP 1 SJ Web Edition
 Revision Name : dt
 Top-level Entity Name : core_top
 Family : Cyclone
-Total logic elements : 1,143
-Total pins : 3
+Total logic elements : 1,879
+Total pins : 32
 Total virtual pins : 0
-Total memory bits : 512
+Total memory bits : 66,560
 Total PLLs : 0