spartan3e: BRAM gehaxe. lesbarer und wird auch richtig(er) instanziert

[calu.git] / cpu / src / writeback_stage_b.vhd

diff --git a/cpu/src/writeback_stage_b.vhd b/cpu/src/writeback_stage_b.vhd
index fd26a297b8e5727e9f5c2d975c600cb9b35115fd..a031207123e2836ec47551455ac1df7391623ae4 100755 (executable)
--- a/cpu/src/writeback_stage_b.vhd
+++ b/cpu/src/writeback_stage_b.vhd
@@ -42,6 +42,7 @@ begin
                port map (
                        clk,
                        data_addr(DATA_ADDR_WIDTH+1 downto 2),
+                       data_addr(DATA_ADDR_WIDTH+1 downto 2),
                        wb_reg_nxt.byte_en,
                        dmem_we,
                        wb_reg_nxt.data, --ram_data,