2nd forward unit - 58MHz with 31bit shift...

[calu.git] / cpu / src / r2_w_ram_b.vhd

diff --git a/cpu/src/r2_w_ram_b.vhd b/cpu/src/r2_w_ram_b.vhd
index 9f227364370ad7fa3fcd2658f26553fb1527f73b..c20c8b14ef5ed12e87e6f2b625f993b8ec3e3996 100644 (file)
--- a/cpu/src/r2_w_ram_b.vhd
+++ b/cpu/src/r2_w_ram_b.vhd
@@ -13,7 +13,7 @@ architecture behaviour of r2_w_ram is
        signal ram : RAM_TYPE := (
                                0 => x"00000000",
                                1 => x"00000001",
-                               2 => x"FFFFFFFF",
+                               2 => x"0000000A",
                                3 => x"00000003",
                                others=> (others => '0'));