timer: added as extension modul

[calu.git] / cpu / src / pipeline_tb.vhd

diff --git a/cpu/src/pipeline_tb.vhd b/cpu/src/pipeline_tb.vhd
index eda81023058f86351b0850bded6ddccc83fd102a..8193ab49c19674c1fce65fbd0be0fe296509de61 100644 (file)
--- a/cpu/src/pipeline_tb.vhd
+++ b/cpu/src/pipeline_tb.vhd
@@ -92,7 +92,7 @@ begin
                --System inputs
                        clk => sys_clk_pin, --: in std_logic;
                        reset => sys_res_n_pin, --: in std_logic;
-                       s_reset => '0',
+                       s_reset => '1',
                --Data inputs
                        jump_result => jump_result_pin, --: in instruction_addr_t;
                        prediction_result => prediction_result_pin, --: in instruction_addr_t;