ram: reducing instr- and dataram
[calu.git] / cpu / src / fetch_stage_b.vhd
index f01bad8f68c4b3b9f3fc2b1700f6e56c0c7812d4..7e2032dde0c270bd01a0057de2d81dc28cbb1ac0 100644 (file)
@@ -68,11 +68,6 @@ variable instr_pc  : instruction_addr_t;
 begin
        rom_ram_nxt <= rom_ram;
        
-       if (s_reset = RESET_VALUE) then
-               rom_ram_nxt <= RAM_USE;
-               instr_r_addr_nxt <= (others => '0');
-       end if;
-       
        case rom_ram is
                when ROM_USE =>
                        instruction <= instr_rd_data_rom;
@@ -86,8 +81,7 @@ begin
 
        if (instr_pc = x"0000007f" and rom_ram = ROM_USE) then
                rom_ram_nxt <= RAM_USE;
-               -- TODO: wenn genau auf adresse 0 im RAM ein br steht kracht es... :/
-               instr_r_addr_nxt <= x"00000000";
+               instr_r_addr_nxt <= (others => '0');
        end if;
 
        if (reset = RESET_VALUE) then
@@ -115,16 +109,21 @@ begin
                when others => null;
        end case;
 
+       if (s_reset = RESET_VALUE) then
+               rom_ram_nxt <= RAM_USE;
+               instr_r_addr_nxt <= (others => '0');
+       end if; 
+
 end process;
 
 out_logic : process (instr_r_addr, alu_jump_bit, int_req, jump_result)
 
 begin
-       prog_cnt(10 downto 0) <= std_logic_vector(unsigned(instr_r_addr(PHYS_INSTR_ADDR_WIDTH-1 downto 0)));
-       prog_cnt(31 downto 11) <= (others => '0');
+       prog_cnt(PHYS_INSTR_ADDR_WIDTH-1 downto 0) <= std_logic_vector(unsigned(instr_r_addr(PHYS_INSTR_ADDR_WIDTH-1 downto 0)));
+       prog_cnt(INSTR_ADDR_WIDTH-1 downto PHYS_INSTR_ADDR_WIDTH) <= (others => '0');
 
        if (int_req /= IDLE and alu_jump_bit = LOGIC_ACT ) then
-               prog_cnt(10 downto 0) <= jump_result(10 downto 0);
+               prog_cnt(PHYS_INSTR_ADDR_WIDTH-1 downto 0) <= jump_result(PHYS_INSTR_ADDR_WIDTH-1 downto 0);
        end if;
 
 end process;