ram: reducing instr- and dataram

[calu.git] / cpu / src / fetch_stage_b.vhd

diff --git a/cpu/src/fetch_stage_b.vhd b/cpu/src/fetch_stage_b.vhd
index 1836f3a34b6c202fe2c6b40b7d9ba14e34be3f08..7e2032dde0c270bd01a0057de2d81dc28cbb1ac0 100644 (file)
--- a/cpu/src/fetch_stage_b.vhd
+++ b/cpu/src/fetch_stage_b.vhd
@@ -52,20 +52,22 @@ begin
 
        if (reset = RESET_VALUE) then
                instr_r_addr <= (others => '0');
-               rom_ram <= ROM_USE;     
+               rom_ram <= ROM_USE;
+               led2 <= '0';
        elsif rising_edge(clk) then
                instr_r_addr <= instr_r_addr_nxt;               
                rom_ram <= rom_ram_nxt;
+               led2 <= rom_ram; --rom_ram_nxt;
        end if;
        
 end process; 
 
 
-asyn: process(reset, instr_r_addr, jump_result, prediction_result, branch_prediction_bit, alu_jump_bit, instr_rd_data, rom_ram, instr_rd_data_rom, int_req)
-
+asyn: process(reset, s_reset, instr_r_addr, jump_result, prediction_result, branch_prediction_bit, alu_jump_bit, instr_rd_data, rom_ram, instr_rd_data_rom, int_req)
+variable instr_pc  : instruction_addr_t;
 begin
        rom_ram_nxt <= rom_ram;
-
+       
        case rom_ram is
                when ROM_USE =>
                        instruction <= instr_rd_data_rom;
@@ -74,13 +76,14 @@ begin
                when others => 
                        instruction <= x"F0000000";
        end case;
-       instr_r_addr_nxt <= std_logic_vector(unsigned(instr_r_addr) + 1);
+       instr_pc := std_logic_vector(unsigned(instr_r_addr) + 1);
+       instr_r_addr_nxt <= instr_pc;
 
-       if (instr_r_addr(ROM_INSTR_ADDR_WIDTH) = '1' and rom_ram = ROM_USE) then
+       if (instr_pc = x"0000007f" and rom_ram = ROM_USE) then
                rom_ram_nxt <= RAM_USE;
                instr_r_addr_nxt <= (others => '0');
        end if;
-       
+
        if (reset = RESET_VALUE) then
                instr_r_addr_nxt <= (others => '0');
        end if;
@@ -106,16 +109,21 @@ begin
                when others => null;
        end case;
 
+       if (s_reset = RESET_VALUE) then
+               rom_ram_nxt <= RAM_USE;
+               instr_r_addr_nxt <= (others => '0');
+       end if; 
+
 end process;
 
 out_logic : process (instr_r_addr, alu_jump_bit, int_req, jump_result)
 
 begin
-       prog_cnt(10 downto 0) <= std_logic_vector(unsigned(instr_r_addr(PHYS_INSTR_ADDR_WIDTH-1 downto 0)));
-       prog_cnt(31 downto 11) <= (others => '0');
+       prog_cnt(PHYS_INSTR_ADDR_WIDTH-1 downto 0) <= std_logic_vector(unsigned(instr_r_addr(PHYS_INSTR_ADDR_WIDTH-1 downto 0)));
+       prog_cnt(INSTR_ADDR_WIDTH-1 downto PHYS_INSTR_ADDR_WIDTH) <= (others => '0');
 
        if (int_req /= IDLE and alu_jump_bit = LOGIC_ACT ) then
-               prog_cnt(10 downto 0) <= jump_result(10 downto 0);
+               prog_cnt(PHYS_INSTR_ADDR_WIDTH-1 downto 0) <= jump_result(PHYS_INSTR_ADDR_WIDTH-1 downto 0);
        end if;
 
 end process;