static branch incl prediction rc1

[calu.git] / cpu / src / fetch_stage_b.vhd

diff --git a/cpu/src/fetch_stage_b.vhd b/cpu/src/fetch_stage_b.vhd
index a73ab053ef292431a01330316b6f92998cdc41e8..7409e426989e699a755b92f03fd4ae3774919bae 100644 (file)
--- a/cpu/src/fetch_stage_b.vhd
+++ b/cpu/src/fetch_stage_b.vhd
@@ -57,14 +57,16 @@ begin
        end if;
 
        if (alu_jump_bit = LOGIC_ACT) then
-               instr_r_addr_nxt <= jump_result;        
+               instr_r_addr_nxt <= jump_result;
+               instruction(31 downto 28) <= "1111";    
        elsif (branch_prediction_bit = LOGIC_ACT) then
                instr_r_addr_nxt <= prediction_result;
        end if; 
 
 end process;
 
-prog_cnt <= std_logic_vector(unsigned(instr_r_addr_nxt(PHYS_INSTR_ADDR_WIDTH-1 downto 0)) + 1;
+prog_cnt(10 downto 0) <= std_logic_vector(unsigned(instr_r_addr(PHYS_INSTR_ADDR_WIDTH-1 downto 0)));
+prog_cnt(31 downto 11) <= (others => '0');
 
 end behav;