2nd forward unit - 58MHz with 31bit shift...

[calu.git] / cpu / src / execute_stage.vhd

diff --git a/cpu/src/execute_stage.vhd b/cpu/src/execute_stage.vhd
index c5d6817aa9c957c84bba51182291a0cc2fc9944d..afcf986d20fb60bb5c898edef34d1139309936e7 100644 (file)
--- a/cpu/src/execute_stage.vhd
+++ b/cpu/src/execute_stage.vhd
@@ -20,7 +20,9 @@ entity execute_stage is
                        clk : in std_logic;
                        reset : in std_logic;
                         dec_instr : in dec_op;
-
+                       regfile_val : in gp_register_t;
+                       reg_we : in std_logic;
+                       reg_addr : in gp_addr_t;
                 --System output
                         result : out gp_register_t;--reg
                         result_addr : out gp_addr_t;--reg