pipe2

[calu.git] / cpu / src / exec_op / and_op_b.vhd

diff --git a/cpu/src/exec_op/and_op_b.vhd b/cpu/src/exec_op/and_op_b.vhd
index 05c8f3eb9463ed285a09480b1501a8f1aa99f3e0..6cacc784c8ca477a5d28710086765219ba0ea39d 100755 (executable)
--- a/cpu/src/exec_op/and_op_b.vhd
+++ b/cpu/src/exec_op/and_op_b.vhd
@@ -1,22 +1,22 @@
-library IEEE;\r
-use IEEE.std_logic_1164.all;\r
-use IEEE.numeric_std.all;\r
-\r
-use work.common_pkg.all;\r
-use work.alu_pkg.all;\r
-\r
-architecture and_op of exec_op is\r
-begin\r
-\r
-calc: process(left_operand, right_operand, alu_state)\r
-       variable alu_result_v : alu_result_rec;\r
-       \r
-begin\r
-               alu_result_v := alu_state;\r
-               \r
-               alu_result_v.result := left_operand and right_operand;\r
-               \r
-               alu_result <= alu_result_v;\r
-end process; \r
-\r
-end architecture and_op;\r
+library IEEE;
+use IEEE.std_logic_1164.all;
+use IEEE.numeric_std.all;
+
+use work.common_pkg.all;
+use work.alu_pkg.all;
+
+architecture and_op of exec_op is
+begin
+
+calc: process(left_operand, right_operand, alu_state)
+       variable alu_result_v : alu_result_rec;
+       
+begin
+               alu_result_v := alu_state;
+               
+               alu_result_v.result := left_operand and right_operand;
+               
+               alu_result <= alu_result_v;
+end process; 
+
+end architecture and_op;