rtw_rec.immediate <= (others => '0');
rtw_rec.imm_set <= '0';
- dec_op_inst.condition <= (others => '0');
+ dec_op_inst.condition <= (others => '1');
dec_op_inst.op_detail <= (others => '0');
+ dec_op_inst.op_group <= ADDSUB_OP;
dec_op_inst.brpr <= '0'; --branch_prediction_bit;
dec_op_inst.src1 <= (others => '0');
dec_op_inst.src2 <= (others => '0');
dec_op_inst_nxt.saddr1 <= instr_spl.reg_src1_addr;
dec_op_inst_nxt.saddr2 <= instr_spl.reg_src2_addr;
dec_op_inst_nxt.daddr <= (others => '0');
+ dec_op_inst_nxt.op_group <= instr_spl.op_group;
end process;