exec_st : execute_stage
generic map('0')
- port map(sys_clk, sys_res,to_next_stage, result_pin, result_addr_pin,addr_pin,
+ port map(sys_clk, sys_res,to_next_stage, reg_wr_data_pin, reg_we_pin, reg_w_addr_pin, result_pin, result_addr_pin,addr_pin,
data_pin, alu_jump_pin,brpr_pin, wr_en_pin, dmem_pin,dmem_wr_en_pin,hword_pin,byte_s_pin);
writeback_st : writeback_stage