\r
end record alu_result_rec;\r
\r
- constant SHIFT_WIDTH : integer := 1;--log2c(gp_register_t'length);\r
+ constant SHIFT_WIDTH : integer := log2c(gp_register_t'length);\r
\r
constant COND_ZERO : condition_t := "0001";\r
constant COND_NZERO : condition_t := "0000";\r
-- function xor_op(left_operand, right_operand : gp_register_t; alu_result : alu_result_rec) return alu_result_rec;\r
\r
-- function shift_op(left_operand, right_operand : gp_register_t; arith,sleft,carry : std_logic ;alu_result : alu_result_rec) return alu_result_rec;\r
-
- component alu is
+ \r
+ component alu is\r
--some modules won't need all inputs\r
port(\r
--System inputs\r
right_operand : in gp_register_t;\r
op_detail : in op_opt_t;\r
alu_state : in alu_result_rec;\r
- alu_result : out alu_result_rec;
- addr : out gp_register_t;
+ alu_result : out alu_result_rec;\r
+ addr : out gp_register_t;\r
data : out gp_register_t\r
- );
+ );\r
end component alu;\r
\r
end package alu_pkg;\r