cpu: ext_reg switch bug FIX by markus

[calu.git] / cpu / src / alu_b.vhd

diff --git a/cpu/src/alu_b.vhd b/cpu/src/alu_b.vhd
index a7374face2fa6497cad465f36a972af0acf01fcf..60a14bf867acc3aae5c85484d14c8f3b79581a9e 100755 (executable)
--- a/cpu/src/alu_b.vhd
+++ b/cpu/src/alu_b.vhd
@@ -75,7 +75,11 @@ begin
        paddr <= (others =>'0');
        
        result_v.result := add_result.result;
-       prog_cnt_nxt := std_logic_vector(unsigned(prog_cnt)+1);
+       if (op_detail(DIRECT_JUMP_OPT) = '0') then
+               prog_cnt_nxt := std_logic_vector(unsigned(prog_cnt)+1);
+       else
+               prog_cnt_nxt := prog_cnt;
+       end if;
        case cond is
        when COND_NZERO =>
                cond_met := not(alu_state.status.zero);
@@ -146,7 +150,6 @@ begin
 
                         res_prod := '1';
                         mem_op := '0';
-                                                               addr(DATA_ADDR_WIDTH + 2) <= '0';
                 end if;
                 if op_detail(ST_OPT) = '1' then
                         mem_en := '1';
@@ -179,15 +182,15 @@ begin
                end if;
        when STACK_OP =>
                mem_op := '1';
-               pwr_en_v := '1';
+               pwr_en_v := op_detail(PWREN_OPT);
                if op_detail(PUSH_OPT) = '1' then
                        mem_en := '1';
                        pinc_v := '1';
                        res_prod := '0';
-                       addr <= pval_nxt;
-                       data <= left_o;
+                       addr <= pval;
+                       data <= left_operand;
                else
-                       addr <= std_logic_vector(unsigned(pval_nxt)-4);
+                       addr <= pval_nxt;
                end if;
                
        end case;