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sim: brr fix, interrupt
[calu.git]
/
3b_sim
/
ccpu.hpp
diff --git
a/3b_sim/ccpu.hpp
b/3b_sim/ccpu.hpp
index fb9447db2c6fb1aee57abcc70f2d4785b95c6b0a..17f90b18d6abadf65092469b230a38fd6213f101 100644
(file)
--- a/
3b_sim/ccpu.hpp
+++ b/
3b_sim/ccpu.hpp
@@
-18,7
+18,7
@@
class Iext;
class CCpu {
private:
class CCpu {
private:
- bool m_Z, m_S, m_C, m_O;
+ bool m_Z, m_S, m_C, m_O
, m_breakNext
;
CDat m_pc, m_pc_next, m_perf;
CMem<CDat> m_reg, m_ram;
CDat m_pc, m_pc_next, m_perf;
CMem<CDat> m_reg, m_ram;
@@
-35,6
+35,9
@@
class CCpu {
void applyToExtensions(const vector<string>& in);
void tick();
void applyToExtensions(const vector<string>& in);
void tick();
+ void breakNext();
+ bool shouldBreak();
+
CDat getRegister(const int) const;
void setRegister(const int, CDat);
CDat getRegister(const int) const;
void setRegister(const int, CDat);