sim: brr fix, interrupt

diff --git a/3b_sim/ccpu.cpp b/3b_sim/ccpu.cpp
index 3c0049bc9ca1a4684816f7d85be5cd0b221abf8b..06461d603fd498b733eb6d015df83ca447701754 100644 (file)
--- a/3b_sim/ccpu.cpp
+++ b/3b_sim/ccpu.cpp
@@ -40,6 +40,16 @@ void CCpu::applyToExtensions(const vector<string>& in)
        }
 }
 
+void CCpu::breakNext()
+{
+       m_breakNext = true;
+}
+
+bool CCpu::shouldBreak()
+{
+       return m_breakNext;
+}
+
 void CCpu::tick()
 {
        // signal extensions
@@ -273,7 +283,7 @@ void CCpu::incPerfBy(short inc)
 }
 
 
-CCpu::CCpu(int regs, int ram, int prog) : m_Z(false), m_S(false), m_C(false), m_O(false), m_pc(0), m_pc_next(0), m_perf(0), m_reg(regs), m_ram(ram), m_prog(prog), m_exts(0), m_stack(0)
+CCpu::CCpu(int regs, int ram, int prog) : m_Z(false), m_S(false), m_C(false), m_O(false), m_breakNext(0), m_pc(0), m_pc_next(0), m_perf(0), m_reg(regs), m_ram(ram), m_prog(prog), m_exts(0), m_stack(0)
 {
 }
 

diff --git a/3b_sim/ccpu.hpp b/3b_sim/ccpu.hpp
index fb9447db2c6fb1aee57abcc70f2d4785b95c6b0a..17f90b18d6abadf65092469b230a38fd6213f101 100644 (file)
--- a/3b_sim/ccpu.hpp
+++ b/3b_sim/ccpu.hpp
@@ -18,7 +18,7 @@ class Iext;
 class CCpu {
        private:
 
-               bool m_Z, m_S, m_C, m_O;
+               bool m_Z, m_S, m_C, m_O, m_breakNext;
 
                CDat m_pc, m_pc_next, m_perf;
                CMem<CDat> m_reg, m_ram;
@@ -35,6 +35,9 @@ class CCpu {
                void applyToExtensions(const vector<string>& in);
                void tick();
 
+               void breakNext();
+               bool shouldBreak();
+
                CDat getRegister(const int) const;
                void setRegister(const int, CDat);
 

diff --git a/3b_sim/sim.cpp b/3b_sim/sim.cpp
index 09808a0d25ba085233574376b3971ee181c4854f..d93e11e44be4c717c9f4a809dcf15907a0465535 100644 (file)
--- a/3b_sim/sim.cpp
+++ b/3b_sim/sim.cpp
@@ -21,6 +21,8 @@
 #include "extensions/cprog.hpp"
 #include "extensions/cuart.hpp"
 
+#include <signal.h>
+
 #include "SReadline/SReadline.h"
 using namespace swift;
 
@@ -90,6 +92,11 @@ bool ignoreBreak = false;
 
 bool exitProg = false;
 
+void signalCpuBreak(int)
+{
+       global_cpu->breakNext();
+}
+
 void doExit(const vector<string>&)
 {
        exitProg = true;
@@ -142,7 +149,7 @@ void execRun(const vector<string>&)
        while(1) {
                try {
                        auto breakp = find(breakpoints.begin(), breakpoints.end(), global_cpu->getNextPC());
-                       if(breakp == breakpoints.end() || ignoreBreak) {
+                       if((breakp == breakpoints.end() || ignoreBreak) && !global_cpu->shouldBreak() ) {
                                global_cpu->tick();
                                ignoreBreak = false;
                        }
@@ -547,6 +554,7 @@ int main(int argc, char* argv[])
 
        global_cpu = &cpu;
 
+       signal(SIGINT, signalCpuBreak);
        Iinstr::setCPU(&cpu);
        Iext::setCPU(&cpu);
 

diff --git a/3c_disasm/instr/branchreg.cpp b/3c_disasm/instr/branchreg.cpp
index 2bd92358c821357573c2c55072945da3b74f0c25..1fbedbf4685272f4bc0eb071a817fd395e7436ee 100644 (file)
--- a/3c_disasm/instr/branchreg.cpp
+++ b/3c_disasm/instr/branchreg.cpp
@@ -71,6 +71,7 @@ void Cbranchreg::execInstr()
 {
        //cout << "should exec " << this->toString() << endl;
        CDat pc = this->m_cpu->getRegister(this->m_rd);
+       pc *= 4; //komisch fix?
 
        if(this->m_typ == 1) {
                CDat sp = this->m_cpu->getStack();