sim: brr fix, interrupt

[calu.git] / 3b_sim / ccpu.cpp

diff --git a/3b_sim/ccpu.cpp b/3b_sim/ccpu.cpp
index 3c0049bc9ca1a4684816f7d85be5cd0b221abf8b..06461d603fd498b733eb6d015df83ca447701754 100644 (file)
--- a/3b_sim/ccpu.cpp
+++ b/3b_sim/ccpu.cpp
@@ -40,6 +40,16 @@ void CCpu::applyToExtensions(const vector<string>& in)
        }
 }
 
+void CCpu::breakNext()
+{
+       m_breakNext = true;
+}
+
+bool CCpu::shouldBreak()
+{
+       return m_breakNext;
+}
+
 void CCpu::tick()
 {
        // signal extensions
@@ -273,7 +283,7 @@ void CCpu::incPerfBy(short inc)
 }
 
 
-CCpu::CCpu(int regs, int ram, int prog) : m_Z(false), m_S(false), m_C(false), m_O(false), m_pc(0), m_pc_next(0), m_perf(0), m_reg(regs), m_ram(ram), m_prog(prog), m_exts(0), m_stack(0)
+CCpu::CCpu(int regs, int ram, int prog) : m_Z(false), m_S(false), m_C(false), m_O(false), m_breakNext(0), m_pc(0), m_pc_next(0), m_perf(0), m_reg(regs), m_ram(ram), m_prog(prog), m_exts(0), m_stack(0)
 {
 }