isa: changes for submit

[calu.git] / 2_isa / misc.ptex

diff --git a/2_isa/misc.ptex b/2_isa/misc.ptex
index cc3af7e568825a6c8a49939f6fa332da994d58d8..636c59166c75f979d696c8897e767c20965448ce 100644 (file)
--- a/2_isa/misc.ptex
+++ b/2_isa/misc.ptex
@@ -1,4 +1,5 @@
-ins ('32', 'branch', 'Branch; jump to pc+imm', '4 | 5 | 16 | 3 | 2 | 1 | 1', 'Conditions | OpCode | Immediate | - | Branch/Call/Ret(i) | +/- | S');
+ins ('32', 'branch', 'Branch; jump to pc+imm', '4 | 5 | 16 | 3 | 2 | 1 | 1', 'Conditions | OpCode | Immediate | - | Type | +/- | S',
+'This instruction should be used with it\'s aliases branch, call, ret and reti. No flags will be affected by this instructions.');
 
 #ins ('32', 'call', 'Call; save pc+4 in stack, jump to pc+imm', '4 | 5 | 16 | 5 | 1 | 1', 'Conditions | OpCode | Immediate | - | +/- | S');
 
@@ -10,6 +11,11 @@ ins ('32', 'branch', 'Branch; jump to pc+imm', '4 | 5 | 16 | 3 | 2 | 1 | 1', 'Co
 
 #ins ('32', 'reti', 'reti', '4 | 5 | 23 ', 'Conditions | OpCode | -');
 
-ins ('32', 'cmp', 'compare (rS1 - rS2)', '4 | 5 | 4 | 4 | 15', 'Conditions | OpCode | Register A (Source1) | Register B (Source2) | -');
+ins ('32', 'cmp', 'compare (rS1 - rS2)', '4 | 5 | 4 | 4 | 15', 'Conditions | OpCode | Register A (Source1) | Register B (Source2) | -',
+'This instructions compares the two source registers by subtraction of register B from register A and setting the flags accordingly',
+'is set to the MSB of the result|is set if the subtraction has a carry out|is set if an overflow occurred|is set if the result is zero');
+
+ins ('32', 'cmpi', 'compare (rS1 - imm)', '4 | 5 |  4 | 16 | 3', 'Conditions | OpCode | Register A (Source1) | Immediate | -',
+'This instructions compares the the source register with the immediate be subtracting the immediate from register A and setting the flags accordingly',
+'is set to the MSB of the result|is set if the subtraction has a carry out|is set if an overflow occurred|is set if the result is zero');
 
-ins ('32', 'cmpi', 'compare (rS1 - imm)', '4 | 5 |  4 | 16 | 3', 'Conditions | OpCode | Register A (Source1) | Immediate | -');