1 #define PROGINSTR stw r0, PDATA(r13)
28 ;assuming that no more than 42 instr are used
39 .ifill ldis r8, 0;0xed400004
40 .ifill mov r0, r7;0xe1038000
41 .ifill andx r0, 1;0xe2800008
42 .ifill adddnz r8, r8, r6;0x00443001
43 .ifill subinz r7, r7, 1;0x01bb8008
44 .ifill addizs r7, r7, 0;0x113b8000
46 .ifill adddnz r8, r8, r6;0x00443001
47 .ifill adddnz r8, r8, r6;0x00443001
48 .ifill subi r7, r7, 2;0xe1bb8010
49 .fill 0x0b7ffe83;brnz+ loop
53 .fill 0xed300004;ldis r6, CONST
59 .ifill add r7, r7, r6;0xe03bb000
65 .ifill sub r7, r7, r6;0xe0bbb000
71 .ifill cmp r7, r6;0xec3b0000
81 .ifill cmpi r6,0;0xecb00000
83 .fill 1, 0x1b000103;breq- vm_next
84 .fill 1, 0xeb000003;br+ CONST
87 .fill 1, 0xed400000;ldil r6, CONST
88 .fill 1, 0xed400002;ldih r6, CONST
102 .ifill not r6;0xe4b7fffa
106 .define UART_BASE, 0x2000
107 .define UART_STATUS, 0x0
108 .define UART_RECV, 0xc
109 .define UART_TRANS, 0x8
111 .define UART_TRANS_EMPTY, 0x1
112 .define UART_RECV_NEW, 0x2
114 .define PBASE, 0x2030
126 ldi r10, UART_BASE@lo
127 ldih r10, UART_BASE@hi
130 ldw r3, UART_STATUS(r10)
131 andx r3, UART_RECV_NEW
132 brzs+ u_recv_byte; branch if zero
134 ldw r0, UART_RECV(r10)
138 ldw r9, UART_STATUS(r10)
139 andx r9, UART_TRANS_EMPTY
140 brnz+ u_test ; branch if not zero
141 stb r0, UART_TRANS(r10)
144 ;set address of input
145 ldis r1, inputdata@lo
146 ldih r1, inputdata@hi
149 ;set address of program start
150 ldis r2, (prog_start/4)@lo
151 ldih r2, (prog_start/4)@hi
153 ;set address to instruction table
154 ldis r3, instrtable@lo
155 ldih r3, instrtable@hi
157 ;set address to defer table
158 ldis r9, defertable@lo
159 ldih r9, defertable@hi
165 ;set programmer address
171 ;set address to stack
175 ;make r15 a 0-register
177 ;make r14 a 8-bit -1-register
185 ldi r10, UART_BASE@lo
186 ldih r10, UART_BASE@hi
189 ldw r9, UART_STATUS(r10)
190 andx r9, UART_TRANS_EMPTY
191 brnz+ u_send_by1 ; branch if not zero
193 stb r0, UART_TRANS(r10)
196 ldw r9, UART_STATUS(r10)
197 andx r9, UART_TRANS_EMPTY
198 brnz+ u_send_byte ; branch if not zero
200 stb r0, UART_TRANS(r10)
206 ;first version only supports backward jumps
208 ;r1 ... address to input, every byte is a new input
209 ; includes pc implicitly
210 ;r2 ... address to program start
211 ;r3 ... address of instruction table
212 ;r4 ... gets loaded with instr. prog. addr.
214 ;r9 ... address to actual entry in defer table
215 ;r10... address to defer table
216 ;r13 .. programmer address
218 ;load address of program
219 ldil r14, prog_mul@lo
220 ldih r14, prog_mul@hi
222 ldil r15, prog_consts@lo
223 ldih r15, prog_consts@hi
225 ;backup defer table address
227 ;decrement address to input by 1
232 ;increment input address
235 ;store address of next instruction in table
237 ;increment instr. table
242 ;we need to multiply input by 4 to get correct address offset
244 ;calc position in jumptable
245 ldw r0, jumptable(r0)
250 ;load address of program
253 ;program instruction (2)
260 ;now it is time to clear up the defer table
264 ;load branch template
267 ;if actual and base are equal, no entry
273 ;load pointer to where to jump to
275 ;load where to jump to
277 ;load where to save from defer table
283 ;set the upper 16 bit 0
285 ;shift to the position of imm in br
300 ;program instruction (14)
336 ;load address of program
340 ;program instruction (5)
358 ;load address of program
362 ;program instruction (5)
377 ;case 0 1 2 3 4 5 6 7 8 9
380 ;program instruction (3)
382 ;the first instr. loads r6 with the number
383 ;thus we shall emulate this
387 ;shift 3 bits left, as the immediate in ldi has
390 ;now 'add' this to the ldi
393 ;store this 'dynamic' instruction
406 ;load address of program
407 ldil r4, prog_lessthan@lo
408 ldih r4, prog_lessthan@hi
410 ;program instruction (6)
433 ;program instruction (3)
447 ;the following instructions calculate the immediate
469 ;now we will generate ldih/l which will store this
470 ;immediate into a register
472 ;load address of program
493 ;now we program the instructions that will save the
494 ;immediate onto the stack and increment the later
510 ;gespeicherte instrs sollten input indepentent sein
512 ;fuer forward jumps muss deferrer table gemacht werden *puke*
514 ;load address of program
518 ;program instruction (2)
533 ;we add the offset to this instruction
537 ;we know calculate the jump destination
538 ;set r6 to 0 (to clear upper bytes)
542 ;compare input with neg. max of 8 bit
548 ;generate negativ offset
550 ;r6 is now the 'real' negativ number
552 ;todo: testing showed (at least once) we are off by 2 instr.
554 ;multiply by to get the offset
556 ;generate address in table
558 ;r0 now has the target address
563 ;we shift 2 bits out, because rel. br takes instr.
564 ;count and not address amount ...
566 ;set the upper 16 bit 0
568 ;shift to the position of imm in br
582 ;we know save the address in the instrtable where the addr to jump to stands
583 ;the value doesn't exists at the moment, but it will at evaluation
585 ;save position to save the instr into defer table
588 ;we need one instruction to have the correct offset (?)
591 ;todo: check if -1 is needed
593 ;multiply with 2 to get offset right
597 ;save the address to defer table
599 ;increment defer table address
608 ;load address of program
612 ;program instruction (1)
624 ;load address of program
628 ;program instruction (4)
646 ;load address of program
650 ;program instruction (3)
669 .fill 41, vm_default/4
675 .fill 1, vm_default/4
679 .fill 2, vm_default/4
681 .fill 10, vm_consts/4
683 .fill 2, vm_default/4
685 .fill 1, vm_lessthan/4
687 .fill 7, vm_default/4
691 .fill 4, vm_default/4
697 .fill 5, vm_default/4
701 .fill 7, vm_default/4
705 .fill 37, vm_default/4
709 .fill 129, vm_default/4
711 ;we assume not more than 3 entries