1 #define PROGINSTR stw r0, PDATA(r13)
28 ;assuming that no more than 42 instr are used
39 .ifill ldis r8, 0;0xed400004
40 .ifill mov r0, r7;0xe1038000
41 .ifill andx r0, 1;0xe2800008
42 .ifill adddnz r8, r8, r6;0x00443001
43 .ifill subinz r7, r7, 1;0x01bb8008
44 .ifill addizs r7, r7, 0;0x113b8000
46 .ifill adddnz r8, r8, r6;0x00443001
47 .ifill adddnz r8, r8, r6;0x00443001
48 .ifill subi r7, r7, 2;0xe1bb8010
49 .fill 0x0b7ffe83;brnz+ loop
53 .fill 0xed300004;ldis r6, CONST
59 .ifill add r7, r7, r6;0xe03bb000
65 .ifill sub r7, r7, r6;0xe0bbb000
71 .ifill cmp r7, r6;0xec3b0000
82 .ifill cmpi r6,0;0xecb00000
84 .fill 1, 0x1b000103;breq- vm_next
85 .fill 1, 0xeb000003;br+ CONST
88 .fill 1, 0xed400000;ldil r6, CONST
89 .fill 1, 0xed400002;ldih r6, CONST
103 .ifill not r6;0xe4b7fffa
107 .define UART_BASE, 0x2000
108 .define UART_STATUS, 0x0
109 .define UART_RECV, 0xc
110 .define UART_TRANS, 0x8
112 .define UART_TRANS_EMPTY, 0x1
113 .define UART_RECV_NEW, 0x2
115 .define PBASE, 0x2030
127 ldi r10, UART_BASE@lo
128 ldih r10, UART_BASE@hi
131 ldw r3, UART_STATUS(r10)
132 andx r3, UART_RECV_NEW
133 brzs+ u_recv_byte; branch if zero
135 ldw r0, UART_RECV(r10)
139 ldw r9, UART_STATUS(r10)
140 andx r9, UART_TRANS_EMPTY
141 brnz+ u_test ; branch if not zero
142 stb r0, UART_TRANS(r10)
145 ;set address of input
146 ldis r1, inputdata@lo
147 ldih r1, inputdata@hi
150 ;set address of program start
151 ldis r2, (prog_start/4)@lo
152 ldih r2, (prog_start/4)@hi
154 ;set address to instruction table
155 ldis r3, instrtable@lo
156 ldih r3, instrtable@hi
158 ;set address to defer table
159 ldis r9, defertable@lo
160 ldih r9, defertable@hi
166 ;set programmer address
172 ;set address to stack
176 ;make r15 a 0-register
178 ;make r14 a 8-bit -1-register
186 ldi r10, UART_BASE@lo
187 ldih r10, UART_BASE@hi
190 ldw r9, UART_STATUS(r10)
191 andx r9, UART_TRANS_EMPTY
192 brnz+ u_send_by1 ; branch if not zero
194 stb r0, UART_TRANS(r10)
197 ldw r9, UART_STATUS(r10)
198 andx r9, UART_TRANS_EMPTY
199 brnz+ u_send_byte ; branch if not zero
201 stb r0, UART_TRANS(r10)
207 ;first version only supports backward jumps
209 ;r1 ... address to input, every byte is a new input
210 ; includes pc implicitly
211 ;r2 ... address to program start
212 ;r3 ... address of instruction table
213 ;r4 ... gets loaded with instr. prog. addr.
215 ;r9 ... address to actual entry in defer table
216 ;r10... address to defer table
217 ;r13 .. programmer address
219 ;load address of program
220 ldil r14, prog_mul@lo
221 ldih r14, prog_mul@hi
223 ldil r15, prog_consts@lo
224 ldih r15, prog_consts@hi
226 ;backup defer table address
228 ;decrement address to input by 1
233 ;increment input address
236 ;store address of next instruction in table
238 ;increment instr. table
243 ;we need to multiply input by 4 to get correct address offset
245 ;calc position in jumptable
246 ldw r0, jumptable(r0)
251 ;load address of program
254 ;program instruction (2)
261 ;now it is time to clear up the defer table
265 ;load branch template
268 ;if actual and base are equal, no entry
274 ;load pointer to where to jump to
276 ;load where to jump to
278 ;load where to save from defer table
284 ;set the upper 16 bit 0
286 ;shift to the position of imm in br
301 ;program instruction (14)
337 ;load address of program
341 ;program instruction (5)
359 ;load address of program
363 ;program instruction (5)
378 ;case 0 1 2 3 4 5 6 7 8 9
381 ;program instruction (3)
383 ;the first instr. loads r6 with the number
384 ;thus we shall emulate this
388 ;shift 3 bits left, as the immediate in ldi has
391 ;now 'add' this to the ldi
394 ;store this 'dynamic' instruction
407 ;load address of program
408 ldil r4, prog_lessthan@lo
409 ldih r4, prog_lessthan@hi
411 ;program instruction (6)
434 ;program instruction (3)
450 ;the following instructions calculate the immediate
472 ;now we will generate ldih/l which will store this
473 ;immediate into a register
475 ;load address of program
496 ;now we program the instructions that will save the
497 ;immediate onto the stack and increment the later
513 ;gespeicherte instrs sollten input indepentent sein
515 ;fuer forward jumps muss deferrer table gemacht werden *puke*
517 ;load address of program
521 ;program instruction (2)
536 ;we add the offset to this instruction
540 ;we know calculate the jump destination
541 ;set r6 to 0 (to clear upper bytes)
545 ;compare input with neg. max of 8 bit
551 ;generate negativ offset
553 ;r6 is now the 'real' negativ number
555 ;todo: testing showed (at least once) we are off by 2 instr.
557 ;multiply by to get the offset
559 ;generate address in table
561 ;r0 now has the target address
566 ;we shift 2 bits out, because rel. br takes instr.
567 ;count and not address amount ...
569 ;set the upper 16 bit 0
571 ;shift to the position of imm in br
585 ;we know save the address in the instrtable where the addr to jump to stands
586 ;the value doesn't exists at the moment, but it will at evaluation
588 ;save position to save the instr into defer table
591 ;we need one instruction to have the correct offset (?)
594 ;todo: check if -1 is needed
596 ;multiply with 2 to get offset right
600 ;save the address to defer table
602 ;increment defer table address
611 ;load address of program
615 ;program instruction (1)
627 ;load address of program
631 ;program instruction (4)
649 ;load address of program
653 ;program instruction (3)
672 .fill 41, vm_default/4
678 .fill 1, vm_default/4
682 .fill 2, vm_default/4
684 .fill 10, vm_consts/4
686 .fill 2, vm_default/4
688 .fill 1, vm_lessthan/4
690 .fill 7, vm_default/4
694 .fill 4, vm_default/4
700 .fill 5, vm_default/4
704 .fill 7, vm_default/4
708 .fill 37, vm_default/4
712 .fill 129, vm_default/4
714 ;we assume not more than 3 entries