1 #define PROGINSTR stw r0, PDATA(r13)
28 ;assuming that no more than 42 instr are used
39 .ifill ldis r8, 0;0xed400004
40 .ifill mov r0, r7;0xe1038000
41 .ifill andx r0, 1;0xe2800008
42 .ifill adddnz r8, r8, r6;0x00443001
43 .ifill subinz r7, r7, 1;0x01bb8008
44 .ifill addizs r7, r7, 0;0x113b8000
46 .ifill adddnz r8, r8, r6;0x00443001
47 .ifill adddnz r8, r8, r6;0x00443001
48 .ifill subi r7, r7, 2;0xe1bb8010
49 .fill 0x0b7ffe83;brnz+ loop
53 .fill 0xed300004;ldis r6, CONST
59 .ifill add r7, r7, r6;0xe03bb000
65 .ifill sub r7, r7, r6;0xe0bbb000
71 .ifill cmp r7, r6;0xec3b0000
81 .ifill cmpi r6,0;0xecb00000
83 .fill 1, 0x1b000103;breq- vm_next
84 .fill 1, 0xeb000003;br+ CONST
87 .fill 1, 0xed400000;ldil r6, CONST
88 .fill 1, 0xed400002;ldih r6, CONST
102 .ifill not r6;0xe4b7fffa
106 .define UART_BASE, 0x2000
107 .define UART_STATUS, 0x0
108 .define UART_RECV, 0xc
109 .define UART_TRANS, 0x8
111 .define UART_TRANS_EMPTY, 0x1
112 .define UART_RECV_NEW, 0x2
114 .define PBASE, 0x2030
121 ldi r10, UART_BASE@lo
122 ldih r10, UART_BASE@hi
125 ldw r3, UART_STATUS(r10)
126 andx r3, UART_RECV_NEW
127 brzs+ u_recv_byte; branch if zero
129 ldw r0, UART_RECV(r10)
133 ldw r9, UART_STATUS(r10)
134 andx r9, UART_TRANS_EMPTY
135 brnz+ u_test ; branch if not zero
136 stb r0, UART_TRANS(r10)
138 ;set address of input
139 ldil r1, inputdata@lo
140 ldih r1, inputdata@hi
142 ;set address of program start
143 ldil r2, prog_start@lo
144 ldih r2, prog_start@hi
146 ;set address to instruction table
147 ldil r3, instrtable@lo
148 ldih r3, instrtable@hi
150 ;set address to defer table
151 ldil r9, defertable@lo
152 ldih r9, defertable@hi
157 ;set programmer address
163 ldi r10, UART_BASE@lo
164 ldih r10, UART_BASE@hi
167 ldw r9, UART_STATUS(r10)
168 andx r9, UART_TRANS_EMPTY
169 brnz+ u_panic ; branch if not zero
170 stb r0, UART_TRANS(r10)
174 ;set address to stack
178 ;make r15 a 0-register
180 ;make r14 a 8-bit -1-register
188 ldi r10, UART_BASE@lo
189 ldih r10, UART_BASE@hi
190 ldw r9, UART_STATUS(r10)
191 andx r9, UART_TRANS_EMPTY
192 brnz+ u_send_byte ; branch if not zero
193 stb r0, UART_TRANS(r10)
199 ;first version only supports backward jumps
201 ;r1 ... address to input, every byte is a new input
202 ; includes pc implicitly
203 ;r2 ... address to program start
204 ;r3 ... address of instruction table
205 ;r4 ... gets loaded with instr. prog. addr.
207 ;r9 ... address to actual entry in defer table
208 ;r10... address to defer table
209 ;r13 .. programmer address
211 ;load address of program
212 ldil r14, prog_mul@lo
213 ldih r14, prog_mul@hi
215 ldil r15, prog_consts@lo
216 ldih r15, prog_consts@hi
218 ;backup defer table address
220 ;decrement address to input by 1
225 ;increment input address
228 ;store address of next instruction in table
230 ;increment instr. table
235 ;we need to multiply input by 4 to get correct address offset
237 ;calc position in jumptable
238 ldw r0, jumptable(r0)
243 ;load address of program
246 ;program instruction (2)
253 ;now it is time to clear up the defer table
257 ;load branch template
260 ;if actual and base are equal, no entry
266 ;load pointer to where to jump to
268 ;load where to jump to
270 ;load where to save from defer table
276 ;set the upper 16 bit 0
278 ;shift to the position of imm in br
293 ;program instruction (14)
329 ;load address of program
333 ;program instruction (5)
351 ;load address of program
355 ;program instruction (5)
370 ;case 0 1 2 3 4 5 6 7 8 9
373 ;program instruction (3)
375 ;the first instr. loads r6 with the number
376 ;thus we shall emulate this
380 ;shift 3 bits left, as the immediate in ldi has
383 ;now 'add' this to the ldi
386 ;store this 'dynamic' instruction
399 ;load address of program
400 ldil r4, prog_lessthan@lo
401 ldih r4, prog_lessthan@hi
403 ;program instruction (6)
426 ;program instruction (3)
440 ;the following instructions calculate the immediate
462 ;now we will generate ldih/l which will store this
463 ;immediate into a register
465 ;load address of program
486 ;now we program the instructions that will save the
487 ;immediate onto the stack and increment the later
503 ;gespeicherte instrs sollten input indepentent sein
505 ;fuer forward jumps muss deferrer table gemacht werden *puke*
507 ;load address of program
511 ;program instruction (2)
526 ;we add the offset to this instruction
530 ;we know calculate the jump destination
531 ;set r6 to 0 (to clear upper bytes)
535 ;compare input with neg. max of 8 bit
541 ;generate negativ offset
543 ;r6 is now the 'real' negativ number
545 ;todo: testing showed (at least once) we are off by 2 instr.
547 ;multiply by to get the offset
549 ;generate address in table
551 ;r0 now has the target address
556 ;we shift 2 bits out, because rel. br takes instr.
557 ;count and not address amount ...
559 ;set the upper 16 bit 0
561 ;shift to the position of imm in br
575 ;we know save the address in the instrtable where the addr to jump to stands
576 ;the value doesn't exists at the moment, but it will at evaluation
578 ;save position to save the instr into defer table
581 ;we need one instruction to have the correct offset (?)
584 ;todo: check if -1 is needed
586 ;multiply with 2 to get offset right
590 ;save the address to defer table
592 ;increment defer table address
601 ;load address of program
605 ;program instruction (1)
617 ;load address of program
621 ;program instruction (4)
639 ;load address of program
643 ;program instruction (3)
702 .fill 129, vm_default
704 ;we assume not more than 3 entries