1 TimeQuest Timing Analyzer report for dt
2 Mon Dec 20 17:38:57 2010
3 Quartus II Version 10.0 Build 262 08/18/2010 Service Pack 1 SJ Web Edition
10 2. TimeQuest Timing Analyzer Summary
11 3. Parallel Compilation
18 10. Minimum Pulse Width Summary
21 13. Minimum Pulse Width: 'sys_clk'
24 16. Clock to Output Times
25 17. Minimum Clock to Output Times
30 22. Unconstrained Paths
31 23. TimeQuest Timing Analyzer Messages
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54 +--------------------------------------------------------------------------------------+
55 ; TimeQuest Timing Analyzer Summary ;
56 +--------------------+-----------------------------------------------------------------+
57 ; Quartus II Version ; Version 10.0 Build 262 08/18/2010 Service Pack 1 SJ Web Edition ;
58 ; Revision Name ; dt ;
59 ; Device Family ; Cyclone ;
60 ; Device Name ; EP1C12Q240C8 ;
61 ; Timing Models ; Final ;
62 ; Delay Model ; Slow Model ;
63 ; Rise/Fall Delays ; Unavailable ;
64 +--------------------+-----------------------------------------------------------------+
67 Parallel compilation was disabled, but you have multiple processors available. Enable parallel compilation to reduce compilation time.
68 +-------------------------------------+
69 ; Parallel Compilation ;
70 +----------------------------+--------+
71 ; Processors ; Number ;
72 +----------------------------+--------+
73 ; Number detected on machine ; 2 ;
74 ; Maximum allowed ; 1 ;
75 +----------------------------+--------+
78 +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
80 +------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+-------------+
81 ; Clock Name ; Type ; Period ; Frequency ; Rise ; Fall ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master ; Source ; Targets ;
82 +------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+-------------+
83 ; sys_clk ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { sys_clk } ;
84 +------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+-------------+
87 +-------------------------------------------------+
89 +-----------+-----------------+------------+------+
90 ; Fmax ; Restricted Fmax ; Clock Name ; Note ;
91 +-----------+-----------------+------------+------+
92 ; 47.07 MHz ; 47.07 MHz ; sys_clk ; ;
93 +-----------+-----------------+------------+------+
94 This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods. FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock. Paths of different clocks, including generated clocks, are ignored. For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.
97 +-----------------------------------+
99 +---------+---------+---------------+
100 ; Clock ; Slack ; End Point TNS ;
101 +---------+---------+---------------+
102 ; sys_clk ; -20.245 ; -16040.760 ;
103 +---------+---------+---------------+
106 +---------------------------------+
108 +---------+-------+---------------+
109 ; Clock ; Slack ; End Point TNS ;
110 +---------+-------+---------------+
111 ; sys_clk ; 0.822 ; 0.000 ;
112 +---------+-------+---------------+
127 +----------------------------------+
128 ; Minimum Pulse Width Summary ;
129 +---------+--------+---------------+
130 ; Clock ; Slack ; End Point TNS ;
131 +---------+--------+---------------+
132 ; sys_clk ; -2.003 ; -4074.623 ;
133 +---------+--------+---------------+
136 +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
138 +---------+-------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
139 ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
140 +---------+-------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
141 ; -20.245 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a28~portb_address_reg0 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 21.142 ;
142 ; -20.245 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a28~portb_address_reg1 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 21.142 ;
143 ; -20.245 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a28~portb_address_reg2 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 21.142 ;
144 ; -20.245 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a28~portb_address_reg3 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 21.142 ;
145 ; -20.245 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a28~portb_address_reg4 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 21.142 ;
146 ; -20.245 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a28~portb_address_reg5 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 21.142 ;
147 ; -20.245 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a28~portb_address_reg6 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 21.142 ;
148 ; -20.245 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a28~portb_address_reg7 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 21.142 ;
149 ; -20.245 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a28~portb_address_reg8 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 21.142 ;
150 ; -20.245 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a28~portb_address_reg9 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 21.142 ;
151 ; -20.245 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a28~portb_address_reg10 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 21.142 ;
152 ; -20.150 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a20~portb_address_reg0 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.106 ;
153 ; -20.150 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a20~portb_address_reg1 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.106 ;
154 ; -20.150 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a20~portb_address_reg2 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.106 ;
155 ; -20.150 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a20~portb_address_reg3 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.106 ;
156 ; -20.150 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a20~portb_address_reg4 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.106 ;
157 ; -20.150 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a20~portb_address_reg5 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.106 ;
158 ; -20.150 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a20~portb_address_reg6 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.106 ;
159 ; -20.150 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a20~portb_address_reg7 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.106 ;
160 ; -20.150 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a20~portb_address_reg8 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.106 ;
161 ; -20.150 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a20~portb_address_reg9 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.106 ;
162 ; -20.150 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a20~portb_address_reg10 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.106 ;
163 ; -20.138 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a18~portb_address_reg0 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.094 ;
164 ; -20.138 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a18~portb_address_reg1 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.094 ;
165 ; -20.138 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a18~portb_address_reg2 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.094 ;
166 ; -20.138 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a18~portb_address_reg3 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.094 ;
167 ; -20.138 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a18~portb_address_reg4 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.094 ;
168 ; -20.138 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a18~portb_address_reg5 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.094 ;
169 ; -20.138 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a18~portb_address_reg6 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.094 ;
170 ; -20.138 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a18~portb_address_reg7 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.094 ;
171 ; -20.138 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a18~portb_address_reg8 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.094 ;
172 ; -20.138 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a18~portb_address_reg9 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.094 ;
173 ; -20.138 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a18~portb_address_reg10 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.094 ;
174 ; -20.096 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a21~portb_address_reg0 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.052 ;
175 ; -20.096 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a21~portb_address_reg1 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.052 ;
176 ; -20.096 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a21~portb_address_reg2 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.052 ;
177 ; -20.096 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a21~portb_address_reg3 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.052 ;
178 ; -20.096 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a21~portb_address_reg4 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.052 ;
179 ; -20.096 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a21~portb_address_reg5 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.052 ;
180 ; -20.096 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a21~portb_address_reg6 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.052 ;
181 ; -20.096 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a21~portb_address_reg7 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.052 ;
182 ; -20.096 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a21~portb_address_reg8 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.052 ;
183 ; -20.096 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a21~portb_address_reg9 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.052 ;
184 ; -20.096 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a21~portb_address_reg10 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.007 ; 21.052 ;
185 ; -20.047 ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_2|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg0 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.142 ; 20.868 ;
186 ; -20.047 ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_2|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg1 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.142 ; 20.868 ;
187 ; -20.047 ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_2|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg2 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.142 ; 20.868 ;
188 ; -20.047 ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_2|altsyncram_emk1:auto_generated|ram_block1a2~portb_address_reg3 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.142 ; 20.868 ;
189 ; -20.032 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a24~portb_address_reg0 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.107 ; 20.888 ;
190 ; -20.032 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a24~portb_address_reg1 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.107 ; 20.888 ;
191 ; -20.032 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a24~portb_address_reg2 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.107 ; 20.888 ;
192 ; -20.032 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a24~portb_address_reg3 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.107 ; 20.888 ;
193 ; -20.032 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a24~portb_address_reg4 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.107 ; 20.888 ;
194 ; -20.032 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a24~portb_address_reg5 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.107 ; 20.888 ;
195 ; -20.032 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a24~portb_address_reg6 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.107 ; 20.888 ;
196 ; -20.032 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a24~portb_address_reg7 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.107 ; 20.888 ;
197 ; -20.032 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a24~portb_address_reg8 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.107 ; 20.888 ;
198 ; -20.032 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a24~portb_address_reg9 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.107 ; 20.888 ;
199 ; -20.032 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a24~portb_address_reg10 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.107 ; 20.888 ;
200 ; -19.972 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a25~portb_address_reg0 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.869 ;
201 ; -19.972 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a25~portb_address_reg1 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.869 ;
202 ; -19.972 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a25~portb_address_reg2 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.869 ;
203 ; -19.972 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a25~portb_address_reg3 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.869 ;
204 ; -19.972 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a25~portb_address_reg4 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.869 ;
205 ; -19.972 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a25~portb_address_reg5 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.869 ;
206 ; -19.972 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a25~portb_address_reg6 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.869 ;
207 ; -19.972 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a25~portb_address_reg7 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.869 ;
208 ; -19.972 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a25~portb_address_reg8 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.869 ;
209 ; -19.972 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a25~portb_address_reg9 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.869 ;
210 ; -19.972 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a25~portb_address_reg10 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.869 ;
211 ; -19.934 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a16~portb_address_reg0 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.074 ; 20.823 ;
212 ; -19.934 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a16~portb_address_reg1 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.074 ; 20.823 ;
213 ; -19.934 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a16~portb_address_reg2 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.074 ; 20.823 ;
214 ; -19.934 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a16~portb_address_reg3 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.074 ; 20.823 ;
215 ; -19.934 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a16~portb_address_reg4 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.074 ; 20.823 ;
216 ; -19.934 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a16~portb_address_reg5 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.074 ; 20.823 ;
217 ; -19.934 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a16~portb_address_reg6 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.074 ; 20.823 ;
218 ; -19.934 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a16~portb_address_reg7 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.074 ; 20.823 ;
219 ; -19.934 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a16~portb_address_reg8 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.074 ; 20.823 ;
220 ; -19.934 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a16~portb_address_reg9 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.074 ; 20.823 ;
221 ; -19.934 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a16~portb_address_reg10 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.074 ; 20.823 ;
222 ; -19.897 ; writeback_stage:writeback_st|wb_reg.address[24] ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.059 ; 20.801 ;
223 ; -19.896 ; writeback_stage:writeback_st|wb_reg.address[8] ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.059 ; 20.800 ;
224 ; -19.888 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a17~portb_address_reg0 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.785 ;
225 ; -19.888 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a17~portb_address_reg1 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.785 ;
226 ; -19.888 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a17~portb_address_reg2 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.785 ;
227 ; -19.888 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a17~portb_address_reg3 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.785 ;
228 ; -19.888 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a17~portb_address_reg4 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.785 ;
229 ; -19.888 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a17~portb_address_reg5 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.785 ;
230 ; -19.888 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a17~portb_address_reg6 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.785 ;
231 ; -19.888 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a17~portb_address_reg7 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.785 ;
232 ; -19.888 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a17~portb_address_reg8 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.785 ;
233 ; -19.888 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a17~portb_address_reg9 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.785 ;
234 ; -19.888 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a17~portb_address_reg10 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.785 ;
235 ; -19.857 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a29~portb_address_reg0 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.754 ;
236 ; -19.857 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a29~portb_address_reg1 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.754 ;
237 ; -19.857 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a29~portb_address_reg2 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.754 ;
238 ; -19.857 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a29~portb_address_reg3 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.754 ;
239 ; -19.857 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a29~portb_address_reg4 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.754 ;
240 ; -19.857 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_3|altsyncram_grk1:auto_generated|ram_block1a29~portb_address_reg5 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.zero ; sys_clk ; sys_clk ; 1.000 ; -0.066 ; 20.754 ;
241 +---------+-------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
244 +---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
246 +-------+--------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
247 ; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
248 +-------+--------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
249 ; 0.822 ; execute_stage:exec_st|reg.alu_jump ; execute_stage:exec_st|reg.alu_jump ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 0.837 ;
250 ; 0.864 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|rx_data_res_int[5] ; writeback_stage:writeback_st|extension_uart:uart|w4_uart_receive[5] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 0.879 ;
251 ; 1.031 ; writeback_stage:writeback_st|wb_reg.data[20] ; writeback_stage:writeback_st|extension_uart:uart|w1_st_co[20] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.046 ;
252 ; 1.032 ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|state ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|state ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.047 ;
253 ; 1.032 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|rx_data_int[7] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|rx_data_int[7] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.047 ;
254 ; 1.039 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|rx_data_int[2] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|rx_data_int[2] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.054 ;
255 ; 1.039 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|rx_data_int[4] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|rx_data_int[4] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.054 ;
256 ; 1.050 ; writeback_stage:writeback_st|wb_reg.data[11] ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[11] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.065 ;
257 ; 1.057 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|state.READ_STOP ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|state.READ_STOP ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.072 ;
258 ; 1.074 ; execute_stage:exec_st|reg.brpr ; execute_stage:exec_st|reg.brpr ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.089 ;
259 ; 1.074 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[31] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[31] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.089 ;
260 ; 1.142 ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|cnt[2] ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|idle_sig ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.157 ;
261 ; 1.224 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|rx_data_int[3] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|rx_data_int[3] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.239 ;
262 ; 1.225 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|rx_data_int[6] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|rx_data_int[6] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.240 ;
263 ; 1.234 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.oflo ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.oflo ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.249 ;
264 ; 1.238 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][0] ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][0] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.253 ;
265 ; 1.239 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|state.READ_BIT ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|state.READ_BIT ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.254 ;
266 ; 1.248 ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|cnt[0] ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|cnt[0] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.263 ;
267 ; 1.250 ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|cnt[0] ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|cnt[1] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.265 ;
268 ; 1.256 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|state.READ_START ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|state.READ_START ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.271 ;
269 ; 1.271 ; writeback_stage:writeback_st|wb_reg.address[3] ; writeback_stage:writeback_st|extension_uart:uart|new_tx_data ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.286 ;
270 ; 1.277 ; writeback_stage:writeback_st|wb_reg.data[3] ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[3] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.292 ;
271 ; 1.285 ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|cnt[3] ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|idle_sig ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.300 ;
272 ; 1.290 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[15] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit3[6] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.305 ;
273 ; 1.291 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[2] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit0[5] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.306 ;
274 ; 1.292 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[2] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit0[0] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.307 ;
275 ; 1.293 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[15] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit3[3] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.308 ;
276 ; 1.294 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[2] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit0[3] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.309 ;
277 ; 1.295 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[15] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit3[4] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.310 ;
278 ; 1.296 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[2] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit0[6] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.311 ;
279 ; 1.297 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[15] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit3[1] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.312 ;
280 ; 1.298 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[2] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit0[1] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.313 ;
281 ; 1.299 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[2] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit0[4] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.314 ;
282 ; 1.299 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[2] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit0[2] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.314 ;
283 ; 1.299 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[15] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit3[2] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.314 ;
284 ; 1.300 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[15] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit3[0] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.315 ;
285 ; 1.301 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[15] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit3[5] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.316 ;
286 ; 1.312 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[1] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[1] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.327 ;
287 ; 1.312 ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|baud_cnt[0] ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|baud_cnt[0] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.327 ;
288 ; 1.326 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[6] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[6] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.341 ;
289 ; 1.326 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[11] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[11] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.341 ;
290 ; 1.326 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[16] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[16] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.341 ;
291 ; 1.326 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[21] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[21] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.341 ;
292 ; 1.327 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[20] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[20] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.342 ;
293 ; 1.328 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[10] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[10] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.343 ;
294 ; 1.328 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[14] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[14] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.343 ;
295 ; 1.328 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[24] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[24] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.343 ;
296 ; 1.329 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[9] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[9] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.344 ;
297 ; 1.329 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[19] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[19] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.344 ;
298 ; 1.338 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[10] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit2[1] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.353 ;
299 ; 1.339 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[26] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[26] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.354 ;
300 ; 1.339 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[7] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit1[3] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.354 ;
301 ; 1.339 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[7] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit1[1] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.354 ;
302 ; 1.340 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[10] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit2[3] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.355 ;
303 ; 1.341 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[7] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit1[2] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.356 ;
304 ; 1.344 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[30] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[30] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.359 ;
305 ; 1.344 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[10] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit2[4] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.359 ;
306 ; 1.346 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[7] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit1[0] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.361 ;
307 ; 1.346 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[10] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit2[6] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.361 ;
308 ; 1.348 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[7] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit1[4] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.363 ;
309 ; 1.348 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[10] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit2[0] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.363 ;
310 ; 1.349 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[0] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[0] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.364 ;
311 ; 1.349 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[7] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit1[5] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.364 ;
312 ; 1.350 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[7] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit1[6] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.365 ;
313 ; 1.351 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[10] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit2[5] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.366 ;
314 ; 1.351 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[10] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit2[2] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.366 ;
315 ; 1.355 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[29] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[29] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.370 ;
316 ; 1.356 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[4] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[4] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.371 ;
317 ; 1.359 ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|cnt[1] ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|cnt[1] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.374 ;
318 ; 1.360 ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|cnt[1] ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|cnt[0] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.375 ;
319 ; 1.362 ; execute_stage:exec_st|reg.brpr ; fetch_stage:fetch_st|instr_r_addr[10] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.377 ;
320 ; 1.392 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[5] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit1[6] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.407 ;
321 ; 1.393 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[9] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit2[1] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.408 ;
322 ; 1.395 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[5] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit1[5] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.410 ;
323 ; 1.397 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[5] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit1[4] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.412 ;
324 ; 1.398 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[9] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit2[3] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.413 ;
325 ; 1.400 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[5] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit1[0] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.415 ;
326 ; 1.401 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[9] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit2[4] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.416 ;
327 ; 1.403 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[5] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit1[2] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.418 ;
328 ; 1.403 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[9] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit2[6] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.418 ;
329 ; 1.404 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[9] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit2[0] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.419 ;
330 ; 1.405 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[5] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit1[3] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.420 ;
331 ; 1.406 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[5] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit1[1] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.421 ;
332 ; 1.406 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[9] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit2[5] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.421 ;
333 ; 1.407 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.data[9] ; writeback_stage:writeback_st|extension_7seg:sseg|s_state.digit2[2] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.422 ;
334 ; 1.419 ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|cnt[2] ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|cnt[2] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.434 ;
335 ; 1.423 ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|cnt[2] ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|cnt[3] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.438 ;
336 ; 1.470 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|rx_data_int[0] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|rx_data_int[0] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.485 ;
337 ; 1.473 ; writeback_stage:writeback_st|extension_uart:uart|new_tx_data ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|state ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.488 ;
338 ; 1.474 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[2] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[2] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.489 ;
339 ; 1.476 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[7] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[7] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.491 ;
340 ; 1.476 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[12] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[12] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.491 ;
341 ; 1.476 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[17] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[17] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.491 ;
342 ; 1.476 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[22] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[22] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.491 ;
343 ; 1.476 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|rx_data_int[5] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|rx_data_int[5] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.491 ;
344 ; 1.480 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[8] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[8] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.495 ;
345 ; 1.480 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[18] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[18] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.495 ;
346 ; 1.481 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[13] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[13] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.496 ;
347 ; 1.481 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[23] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[23] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.496 ;
348 ; 1.482 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[15] ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|cnt[15] ; sys_clk ; sys_clk ; 0.000 ; 0.000 ; 1.497 ;
349 +-------+--------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
352 +----------------------------------------------------------------------------------------------------------------------------------------------+
353 ; Minimum Pulse Width: 'sys_clk' ;
354 +--------+--------------+----------------+------------------+---------+------------+-----------------------------------------------------------+
355 ; Slack ; Actual Width ; Required Width ; Type ; Clock ; Clock Edge ; Target ;
356 +--------+--------------+----------------+------------------+---------+------------+-----------------------------------------------------------+
357 ; -2.003 ; 1.000 ; 3.003 ; Port Rate ; sys_clk ; Rise ; sys_clk ;
358 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.brpr ;
359 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.brpr ;
360 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.condition[0] ;
361 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.condition[0] ;
362 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.condition[1] ;
363 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.condition[1] ;
364 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.condition[2] ;
365 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.condition[2] ;
366 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.condition[3] ;
367 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.condition[3] ;
368 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.daddr[0] ;
369 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.daddr[0] ;
370 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.daddr[1] ;
371 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.daddr[1] ;
372 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.daddr[2] ;
373 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.daddr[2] ;
374 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.daddr[3] ;
375 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.daddr[3] ;
376 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[0] ;
377 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[0] ;
378 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[10] ;
379 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[10] ;
380 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[11] ;
381 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[11] ;
382 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[12] ;
383 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[12] ;
384 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[13] ;
385 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[13] ;
386 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[1] ;
387 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[1] ;
388 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[2] ;
389 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[2] ;
390 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[31] ;
391 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[31] ;
392 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[3] ;
393 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[3] ;
394 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[4] ;
395 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[4] ;
396 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[5] ;
397 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[5] ;
398 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[6] ;
399 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[6] ;
400 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[7] ;
401 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[7] ;
402 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[8] ;
403 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[8] ;
404 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[9] ;
405 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.displacement[9] ;
406 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_detail[1] ;
407 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_detail[1] ;
408 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_detail[2] ;
409 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_detail[2] ;
410 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_detail[3] ;
411 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_detail[3] ;
412 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_detail[3]_RTM067 ;
413 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_detail[3]_RTM067 ;
414 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_detail[3]_RTM072 ;
415 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_detail[3]_RTM072 ;
416 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_detail[4] ;
417 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_detail[4] ;
418 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_detail[5] ;
419 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_detail[5] ;
420 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_group.ADDSUB_OP ;
421 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_group.ADDSUB_OP ;
422 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_group.AND_OP ;
423 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_group.AND_OP ;
424 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_group.JMP_OP ;
425 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_group.JMP_OP ;
426 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_group.JMP_OP_RTM069 ;
427 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_group.JMP_OP_RTM069 ;
428 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_group.JMP_OP_RTM070 ;
429 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_group.JMP_OP_RTM070 ;
430 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_group.JMP_OP_RTM071 ;
431 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_group.JMP_OP_RTM071 ;
432 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_group.JMP_ST_OP ;
433 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_group.JMP_ST_OP ;
434 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_group.LDST_OP ;
435 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_group.LDST_OP ;
436 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_group.OR_OP ;
437 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_group.OR_OP ;
438 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_group.SHIFT_OP ;
439 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_group.SHIFT_OP ;
440 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_group.STACK_OP ;
441 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_group.STACK_OP ;
442 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_group.XOR_OP ;
443 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.op_group.XOR_OP ;
444 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.prog_cnt[0] ;
445 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.prog_cnt[0] ;
446 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.prog_cnt[10] ;
447 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.prog_cnt[10] ;
448 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.prog_cnt[1] ;
449 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.prog_cnt[1] ;
450 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.prog_cnt[2] ;
451 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.prog_cnt[2] ;
452 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.prog_cnt[3] ;
453 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.prog_cnt[3] ;
454 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.prog_cnt[4] ;
455 ; -1.318 ; 0.500 ; 1.818 ; Low Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.prog_cnt[4] ;
456 ; -1.318 ; 0.500 ; 1.818 ; High Pulse Width ; sys_clk ; Rise ; decode_stage:decode_st|dec_op_inst.prog_cnt[5] ;
457 +--------+--------------+----------------+------------------+---------+------------+-----------------------------------------------------------+
460 +-------------------------------------------------------------------------+
462 +-----------+------------+--------+--------+------------+-----------------+
463 ; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;
464 +-----------+------------+--------+--------+------------+-----------------+
465 ; bus_rx ; sys_clk ; 4.012 ; 4.012 ; Rise ; sys_clk ;
466 ; sys_res ; sys_clk ; 19.693 ; 19.693 ; Rise ; sys_clk ;
467 +-----------+------------+--------+--------+------------+-----------------+
470 +-------------------------------------------------------------------------+
472 +-----------+------------+--------+--------+------------+-----------------+
473 ; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;
474 +-----------+------------+--------+--------+------------+-----------------+
475 ; bus_rx ; sys_clk ; -3.960 ; -3.960 ; Rise ; sys_clk ;
476 ; sys_res ; sys_clk ; -5.597 ; -5.597 ; Rise ; sys_clk ;
477 +-----------+------------+--------+--------+------------+-----------------+
480 +-----------------------------------------------------------------------+
481 ; Clock to Output Times ;
482 +-----------+------------+-------+-------+------------+-----------------+
483 ; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;
484 +-----------+------------+-------+-------+------------+-----------------+
485 ; bus_tx ; sys_clk ; 7.760 ; 7.760 ; Rise ; sys_clk ;
486 ; sseg0[*] ; sys_clk ; 8.450 ; 8.450 ; Rise ; sys_clk ;
487 ; sseg0[0] ; sys_clk ; 8.448 ; 8.448 ; Rise ; sys_clk ;
488 ; sseg0[1] ; sys_clk ; 8.210 ; 8.210 ; Rise ; sys_clk ;
489 ; sseg0[2] ; sys_clk ; 7.782 ; 7.782 ; Rise ; sys_clk ;
490 ; sseg0[3] ; sys_clk ; 7.783 ; 7.783 ; Rise ; sys_clk ;
491 ; sseg0[4] ; sys_clk ; 8.096 ; 8.096 ; Rise ; sys_clk ;
492 ; sseg0[5] ; sys_clk ; 8.450 ; 8.450 ; Rise ; sys_clk ;
493 ; sseg0[6] ; sys_clk ; 8.201 ; 8.201 ; Rise ; sys_clk ;
494 ; sseg1[*] ; sys_clk ; 8.471 ; 8.471 ; Rise ; sys_clk ;
495 ; sseg1[0] ; sys_clk ; 8.053 ; 8.053 ; Rise ; sys_clk ;
496 ; sseg1[1] ; sys_clk ; 8.227 ; 8.227 ; Rise ; sys_clk ;
497 ; sseg1[2] ; sys_clk ; 8.127 ; 8.127 ; Rise ; sys_clk ;
498 ; sseg1[3] ; sys_clk ; 8.078 ; 8.078 ; Rise ; sys_clk ;
499 ; sseg1[4] ; sys_clk ; 7.809 ; 7.809 ; Rise ; sys_clk ;
500 ; sseg1[5] ; sys_clk ; 8.471 ; 8.471 ; Rise ; sys_clk ;
501 ; sseg1[6] ; sys_clk ; 8.043 ; 8.043 ; Rise ; sys_clk ;
502 ; sseg2[*] ; sys_clk ; 8.554 ; 8.554 ; Rise ; sys_clk ;
503 ; sseg2[0] ; sys_clk ; 8.155 ; 8.155 ; Rise ; sys_clk ;
504 ; sseg2[1] ; sys_clk ; 7.784 ; 7.784 ; Rise ; sys_clk ;
505 ; sseg2[2] ; sys_clk ; 7.778 ; 7.778 ; Rise ; sys_clk ;
506 ; sseg2[3] ; sys_clk ; 8.554 ; 8.554 ; Rise ; sys_clk ;
507 ; sseg2[4] ; sys_clk ; 8.452 ; 8.452 ; Rise ; sys_clk ;
508 ; sseg2[5] ; sys_clk ; 7.780 ; 7.780 ; Rise ; sys_clk ;
509 ; sseg2[6] ; sys_clk ; 8.264 ; 8.264 ; Rise ; sys_clk ;
510 ; sseg3[*] ; sys_clk ; 7.876 ; 7.876 ; Rise ; sys_clk ;
511 ; sseg3[0] ; sys_clk ; 7.689 ; 7.689 ; Rise ; sys_clk ;
512 ; sseg3[1] ; sys_clk ; 7.275 ; 7.275 ; Rise ; sys_clk ;
513 ; sseg3[2] ; sys_clk ; 7.274 ; 7.274 ; Rise ; sys_clk ;
514 ; sseg3[3] ; sys_clk ; 7.276 ; 7.276 ; Rise ; sys_clk ;
515 ; sseg3[4] ; sys_clk ; 7.720 ; 7.720 ; Rise ; sys_clk ;
516 ; sseg3[5] ; sys_clk ; 7.272 ; 7.272 ; Rise ; sys_clk ;
517 ; sseg3[6] ; sys_clk ; 7.876 ; 7.876 ; Rise ; sys_clk ;
518 +-----------+------------+-------+-------+------------+-----------------+
521 +-----------------------------------------------------------------------+
522 ; Minimum Clock to Output Times ;
523 +-----------+------------+-------+-------+------------+-----------------+
524 ; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;
525 +-----------+------------+-------+-------+------------+-----------------+
526 ; bus_tx ; sys_clk ; 7.760 ; 7.760 ; Rise ; sys_clk ;
527 ; sseg0[*] ; sys_clk ; 7.782 ; 7.782 ; Rise ; sys_clk ;
528 ; sseg0[0] ; sys_clk ; 8.448 ; 8.448 ; Rise ; sys_clk ;
529 ; sseg0[1] ; sys_clk ; 8.210 ; 8.210 ; Rise ; sys_clk ;
530 ; sseg0[2] ; sys_clk ; 7.782 ; 7.782 ; Rise ; sys_clk ;
531 ; sseg0[3] ; sys_clk ; 7.783 ; 7.783 ; Rise ; sys_clk ;
532 ; sseg0[4] ; sys_clk ; 8.096 ; 8.096 ; Rise ; sys_clk ;
533 ; sseg0[5] ; sys_clk ; 8.450 ; 8.450 ; Rise ; sys_clk ;
534 ; sseg0[6] ; sys_clk ; 8.201 ; 8.201 ; Rise ; sys_clk ;
535 ; sseg1[*] ; sys_clk ; 7.809 ; 7.809 ; Rise ; sys_clk ;
536 ; sseg1[0] ; sys_clk ; 8.053 ; 8.053 ; Rise ; sys_clk ;
537 ; sseg1[1] ; sys_clk ; 8.227 ; 8.227 ; Rise ; sys_clk ;
538 ; sseg1[2] ; sys_clk ; 8.127 ; 8.127 ; Rise ; sys_clk ;
539 ; sseg1[3] ; sys_clk ; 8.078 ; 8.078 ; Rise ; sys_clk ;
540 ; sseg1[4] ; sys_clk ; 7.809 ; 7.809 ; Rise ; sys_clk ;
541 ; sseg1[5] ; sys_clk ; 8.471 ; 8.471 ; Rise ; sys_clk ;
542 ; sseg1[6] ; sys_clk ; 8.043 ; 8.043 ; Rise ; sys_clk ;
543 ; sseg2[*] ; sys_clk ; 7.778 ; 7.778 ; Rise ; sys_clk ;
544 ; sseg2[0] ; sys_clk ; 8.155 ; 8.155 ; Rise ; sys_clk ;
545 ; sseg2[1] ; sys_clk ; 7.784 ; 7.784 ; Rise ; sys_clk ;
546 ; sseg2[2] ; sys_clk ; 7.778 ; 7.778 ; Rise ; sys_clk ;
547 ; sseg2[3] ; sys_clk ; 8.554 ; 8.554 ; Rise ; sys_clk ;
548 ; sseg2[4] ; sys_clk ; 8.452 ; 8.452 ; Rise ; sys_clk ;
549 ; sseg2[5] ; sys_clk ; 7.780 ; 7.780 ; Rise ; sys_clk ;
550 ; sseg2[6] ; sys_clk ; 8.264 ; 8.264 ; Rise ; sys_clk ;
551 ; sseg3[*] ; sys_clk ; 7.272 ; 7.272 ; Rise ; sys_clk ;
552 ; sseg3[0] ; sys_clk ; 7.689 ; 7.689 ; Rise ; sys_clk ;
553 ; sseg3[1] ; sys_clk ; 7.275 ; 7.275 ; Rise ; sys_clk ;
554 ; sseg3[2] ; sys_clk ; 7.274 ; 7.274 ; Rise ; sys_clk ;
555 ; sseg3[3] ; sys_clk ; 7.276 ; 7.276 ; Rise ; sys_clk ;
556 ; sseg3[4] ; sys_clk ; 7.720 ; 7.720 ; Rise ; sys_clk ;
557 ; sseg3[5] ; sys_clk ; 7.272 ; 7.272 ; Rise ; sys_clk ;
558 ; sseg3[6] ; sys_clk ; 7.876 ; 7.876 ; Rise ; sys_clk ;
559 +-----------+------------+-------+-------+------------+-----------------+
562 +-------------------------------------------------------------------+
564 +------------+----------+----------+----------+----------+----------+
565 ; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
566 +------------+----------+----------+----------+----------+----------+
567 ; sys_clk ; sys_clk ; 20970939 ; 0 ; 0 ; 0 ;
568 +------------+----------+----------+----------+----------+----------+
569 Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.
572 +-------------------------------------------------------------------+
574 +------------+----------+----------+----------+----------+----------+
575 ; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
576 +------------+----------+----------+----------+----------+----------+
577 ; sys_clk ; sys_clk ; 20970939 ; 0 ; 0 ; 0 ;
578 +------------+----------+----------+----------+----------+----------+
579 Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.
585 No dedicated SERDES Transmitter circuitry present in device or used in design
591 No dedicated SERDES Receiver circuitry present in device or used in design
594 +------------------------------------------------+
595 ; Unconstrained Paths ;
596 +---------------------------------+-------+------+
597 ; Property ; Setup ; Hold ;
598 +---------------------------------+-------+------+
599 ; Illegal Clocks ; 0 ; 0 ;
600 ; Unconstrained Clocks ; 0 ; 0 ;
601 ; Unconstrained Input Ports ; 2 ; 2 ;
602 ; Unconstrained Input Port Paths ; 728 ; 728 ;
603 ; Unconstrained Output Ports ; 29 ; 29 ;
604 ; Unconstrained Output Port Paths ; 29 ; 29 ;
605 +---------------------------------+-------+------+
608 +------------------------------------+
609 ; TimeQuest Timing Analyzer Messages ;
610 +------------------------------------+
611 Info: *******************************************************************
612 Info: Running Quartus II TimeQuest Timing Analyzer
613 Info: Version 10.0 Build 262 08/18/2010 Service Pack 1 SJ Web Edition
614 Info: Processing started: Mon Dec 20 17:38:55 2010
615 Info: Command: quartus_sta dt -c dt
616 Info: qsta_default_script.tcl version: #1
617 Critical Warning: Synopsys Design Constraints File file not found: 'dt.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design.
618 Info: No user constrained base clocks found in the design. Calling "derive_clocks -period 1.0"
619 Info: Deriving Clocks
620 Info: create_clock -period 1.000 -name sys_clk sys_clk
621 Critical Warning: Timing requirements not met
622 Info: Worst-case setup slack is -20.245
623 Info: Slack End Point TNS Clock
624 Info: ========= ============= =====================
625 Info: -20.245 -16040.760 sys_clk
626 Info: Worst-case hold slack is 0.822
627 Info: Slack End Point TNS Clock
628 Info: ========= ============= =====================
629 Info: 0.822 0.000 sys_clk
630 Info: No Recovery paths to report
631 Info: No Removal paths to report
632 Info: Worst-case minimum pulse width slack is -2.003
633 Info: Slack End Point TNS Clock
634 Info: ========= ============= =====================
635 Info: -2.003 -4074.623 sys_clk
636 Info: The selected device family is not supported by the report_metastability command.
637 Info: Design is not fully constrained for setup requirements
638 Info: Design is not fully constrained for hold requirements
639 Info: Quartus II TimeQuest Timing Analyzer was successful. 0 errors, 2 warnings
640 Info: Peak virtual memory: 203 megabytes
641 Info: Processing ended: Mon Dec 20 17:38:57 2010
642 Info: Elapsed time: 00:00:02
643 Info: Total CPU time (on all processors): 00:00:02
projects / calu.git / blob