1 Analysis & Synthesis report for dt
2 Sun Dec 19 20:36:26 2010
3 Quartus II Version 10.0 Build 262 08/18/2010 Service Pack 1 SJ Web Edition
10 2. Analysis & Synthesis Summary
11 3. Analysis & Synthesis Settings
12 4. Parallel Compilation
13 5. Analysis & Synthesis Source Files Read
14 6. Analysis & Synthesis Resource Usage Summary
15 7. Analysis & Synthesis Resource Utilization by Entity
16 8. Analysis & Synthesis RAM Summary
17 9. State Machine - |core_top|writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|state
18 10. State Machine - |core_top|decode_stage:decode_st|dec_op_inst.op_group
19 11. Registers Removed During Synthesis
20 12. Removed Registers Triggering Further Register Optimizations
21 13. General Register Statistics
22 14. Inverted Register Statistics
23 15. Registers Packed Into Inferred Megafunctions
24 16. Multiplexer Restructuring Statistics (Restructuring Performed)
25 17. Source assignments for writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_0|altsyncram_grk1:auto_generated
26 18. Source assignments for decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated
27 19. Source assignments for decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_2|altsyncram_emk1:auto_generated
28 20. Parameter Settings for User Entity Instance: fetch_stage:fetch_st
29 21. Parameter Settings for User Entity Instance: fetch_stage:fetch_st|rom:instruction_ram
30 22. Parameter Settings for User Entity Instance: decode_stage:decode_st
31 23. Parameter Settings for User Entity Instance: decode_stage:decode_st|r2_w_ram:register_ram
32 24. Parameter Settings for User Entity Instance: execute_stage:exec_st
33 25. Parameter Settings for User Entity Instance: execute_stage:exec_st|extension_gpm:gpmp_inst
34 26. Parameter Settings for User Entity Instance: writeback_stage:writeback_st
35 27. Parameter Settings for User Entity Instance: writeback_stage:writeback_st|r_w_ram:data_ram
36 28. Parameter Settings for User Entity Instance: writeback_stage:writeback_st|extension_uart:uart
37 29. Parameter Settings for User Entity Instance: writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst
38 30. Parameter Settings for User Entity Instance: writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst
39 31. Parameter Settings for User Entity Instance: writeback_stage:writeback_st|extension_7seg:sseg
40 32. Parameter Settings for Inferred Entity Instance: writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_0
41 33. Parameter Settings for Inferred Entity Instance: decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1
42 34. Parameter Settings for Inferred Entity Instance: decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_2
43 35. altsyncram Parameter Settings by Entity Instance
44 36. Port Connectivity Checks: "execute_stage:exec_st|alu:alu_inst|exec_op:shift_inst"
45 37. Port Connectivity Checks: "execute_stage:exec_st|alu:alu_inst|exec_op:xor_inst"
46 38. Port Connectivity Checks: "execute_stage:exec_st|alu:alu_inst|exec_op:or_inst"
47 39. Port Connectivity Checks: "execute_stage:exec_st|alu:alu_inst|exec_op:and_inst"
48 40. Port Connectivity Checks: "execute_stage:exec_st|alu:alu_inst|exec_op:add_inst"
49 41. Port Connectivity Checks: "execute_stage:exec_st|alu:alu_inst"
50 42. Port Connectivity Checks: "execute_stage:exec_st"
51 43. Port Connectivity Checks: "decode_stage:decode_st|decoder:decoder_inst"
52 44. Analysis & Synthesis Messages
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75 +-----------------------------------------------------------------------------+
76 ; Analysis & Synthesis Summary ;
77 +-----------------------------+-----------------------------------------------+
78 ; Analysis & Synthesis Status ; Successful - Sun Dec 19 20:36:26 2010 ;
79 ; Quartus II Version ; 10.0 Build 262 08/18/2010 SP 1 SJ Web Edition ;
80 ; Revision Name ; dt ;
81 ; Top-level Entity Name ; core_top ;
83 ; Total logic elements ; 1,879 ;
85 ; Total virtual pins ; 0 ;
86 ; Total memory bits ; 66,560 ;
88 +-----------------------------+-----------------------------------------------+
91 +----------------------------------------------------------------------------------------------------------------------+
92 ; Analysis & Synthesis Settings ;
93 +----------------------------------------------------------------------------+--------------------+--------------------+
94 ; Option ; Setting ; Default Value ;
95 +----------------------------------------------------------------------------+--------------------+--------------------+
96 ; Device ; EP1C12Q240C8 ; ;
97 ; Top-level entity name ; core_top ; dt ;
98 ; Family name ; Cyclone ; Stratix II ;
99 ; Use smart compilation ; Off ; Off ;
100 ; Enable parallel Assembler and TimeQuest Timing Analyzer during compilation ; On ; On ;
101 ; Enable compact report table ; Off ; Off ;
102 ; Restructure Multiplexers ; Auto ; Auto ;
103 ; Create Debugging Nodes for IP Cores ; Off ; Off ;
104 ; Preserve fewer node names ; On ; On ;
105 ; Disable OpenCore Plus hardware evaluation ; Off ; Off ;
106 ; Verilog Version ; Verilog_2001 ; Verilog_2001 ;
107 ; VHDL Version ; VHDL_1993 ; VHDL_1993 ;
108 ; State Machine Processing ; Auto ; Auto ;
109 ; Safe State Machine ; Off ; Off ;
110 ; Extract Verilog State Machines ; On ; On ;
111 ; Extract VHDL State Machines ; On ; On ;
112 ; Ignore Verilog initial constructs ; Off ; Off ;
113 ; Iteration limit for constant Verilog loops ; 5000 ; 5000 ;
114 ; Iteration limit for non-constant Verilog loops ; 250 ; 250 ;
115 ; Add Pass-Through Logic to Inferred RAMs ; On ; On ;
116 ; Parallel Synthesis ; On ; On ;
117 ; NOT Gate Push-Back ; On ; On ;
118 ; Power-Up Don't Care ; On ; On ;
119 ; Remove Redundant Logic Cells ; Off ; Off ;
120 ; Remove Duplicate Registers ; On ; On ;
121 ; Ignore CARRY Buffers ; Off ; Off ;
122 ; Ignore CASCADE Buffers ; Off ; Off ;
123 ; Ignore GLOBAL Buffers ; Off ; Off ;
124 ; Ignore ROW GLOBAL Buffers ; Off ; Off ;
125 ; Ignore LCELL Buffers ; Off ; Off ;
126 ; Ignore SOFT Buffers ; On ; On ;
127 ; Limit AHDL Integers to 32 Bits ; Off ; Off ;
128 ; Optimization Technique ; Balanced ; Balanced ;
129 ; Carry Chain Length ; 70 ; 70 ;
130 ; Auto Carry Chains ; On ; On ;
131 ; Auto Open-Drain Pins ; On ; On ;
132 ; Perform WYSIWYG Primitive Resynthesis ; Off ; Off ;
133 ; Auto ROM Replacement ; On ; On ;
134 ; Auto RAM Replacement ; On ; On ;
135 ; Auto Shift Register Replacement ; Auto ; Auto ;
136 ; Auto Clock Enable Replacement ; On ; On ;
137 ; Strict RAM Replacement ; Off ; Off ;
138 ; Allow Synchronous Control Signals ; On ; On ;
139 ; Force Use of Synchronous Clear Signals ; Off ; Off ;
140 ; Auto RAM Block Balancing ; On ; On ;
141 ; Auto RAM to Logic Cell Conversion ; Off ; Off ;
142 ; Auto Resource Sharing ; Off ; Off ;
143 ; Allow Any RAM Size For Recognition ; Off ; Off ;
144 ; Allow Any ROM Size For Recognition ; Off ; Off ;
145 ; Allow Any Shift Register Size For Recognition ; Off ; Off ;
146 ; Use LogicLock Constraints during Resource Balancing ; On ; On ;
147 ; Ignore translate_off and synthesis_off directives ; Off ; Off ;
148 ; Report Parameter Settings ; On ; On ;
149 ; Report Source Assignments ; On ; On ;
150 ; Report Connectivity Checks ; On ; On ;
151 ; Ignore Maximum Fan-Out Assignments ; Off ; Off ;
152 ; Synchronization Register Chain Length ; 2 ; 2 ;
153 ; PowerPlay Power Optimization ; Normal compilation ; Normal compilation ;
154 ; HDL message level ; Level2 ; Level2 ;
155 ; Suppress Register Optimization Related Messages ; Off ; Off ;
156 ; Number of Removed Registers Reported in Synthesis Report ; 5000 ; 5000 ;
157 ; Number of Inverted Registers Reported in Synthesis Report ; 100 ; 100 ;
158 ; Clock MUX Protection ; On ; On ;
159 ; Block Design Naming ; Auto ; Auto ;
160 ; Synthesis Effort ; Auto ; Auto ;
161 ; Shift Register Replacement - Allow Asynchronous Clear Signal ; On ; On ;
162 ; Analysis & Synthesis Message Level ; Medium ; Medium ;
163 ; Disable Register Merging Across Hierarchies ; Auto ; Auto ;
164 ; Resource Aware Inference For Block RAM ; On ; On ;
165 ; Synthesis Seed ; 1 ; 1 ;
166 +----------------------------------------------------------------------------+--------------------+--------------------+
169 Parallel compilation was disabled, but you have multiple processors available. Enable parallel compilation to reduce compilation time.
170 +-------------------------------------+
171 ; Parallel Compilation ;
172 +----------------------------+--------+
173 ; Processors ; Number ;
174 +----------------------------+--------+
175 ; Number detected on machine ; 2 ;
176 ; Maximum allowed ; 1 ;
177 +----------------------------+--------+
180 +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
181 ; Analysis & Synthesis Source Files Read ;
182 +--------------------------------------+-----------------+-------------------------------------------------------+---------------------------------------------------------------------+
183 ; File Name with User-Entered Path ; Used in Netlist ; File Type ; File Name with Absolute Path ;
184 +--------------------------------------+-----------------+-------------------------------------------------------+---------------------------------------------------------------------+
185 ; ../cpu/src/rom.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/rom.vhd ;
186 ; ../cpu/src/rom_b.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/rom_b.vhd ;
187 ; ../cpu/src/extension_7seg_pkg.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/extension_7seg_pkg.vhd ;
188 ; ../cpu/src/extension_7seg_b.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/extension_7seg_b.vhd ;
189 ; ../cpu/src/extension_7seg.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/extension_7seg.vhd ;
190 ; ../cpu/src/rs232_rx_arc.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/rs232_rx_arc.vhd ;
191 ; ../cpu/src/rs232_rx.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/rs232_rx.vhd ;
192 ; ../cpu/src/writeback_stage_b.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/writeback_stage_b.vhd ;
193 ; ../cpu/src/writeback_stage.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/writeback_stage.vhd ;
194 ; ../cpu/src/rs232_tx_arc.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/rs232_tx_arc.vhd ;
195 ; ../cpu/src/rs232_tx.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/rs232_tx.vhd ;
196 ; ../cpu/src/r_w_ram_b.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/r_w_ram_b.vhd ;
197 ; ../cpu/src/r_w_ram.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/r_w_ram.vhd ;
198 ; ../cpu/src/r2_w_ram_b.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/r2_w_ram_b.vhd ;
199 ; ../cpu/src/r2_w_ram.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/r2_w_ram.vhd ;
200 ; ../cpu/src/mem_pkg.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/mem_pkg.vhd ;
201 ; ../cpu/src/fetch_stage_b.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/fetch_stage_b.vhd ;
202 ; ../cpu/src/fetch_stage.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/fetch_stage.vhd ;
203 ; ../cpu/src/extension_uart_pkg.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/extension_uart_pkg.vhd ;
204 ; ../cpu/src/extension_uart_b.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/extension_uart_b.vhd ;
205 ; ../cpu/src/extension_uart.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/extension_uart.vhd ;
206 ; ../cpu/src/extension_pkg.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/extension_pkg.vhd ;
207 ; ../cpu/src/extension_b.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/extension_b.vhd ;
208 ; ../cpu/src/extension.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/extension.vhd ;
209 ; ../cpu/src/execute_stage_b.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/execute_stage_b.vhd ;
210 ; ../cpu/src/execute_stage.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/execute_stage.vhd ;
211 ; ../cpu/src/exec_op.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/exec_op.vhd ;
212 ; ../cpu/src/decoder_b.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/decoder_b.vhd ;
213 ; ../cpu/src/decoder.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/decoder.vhd ;
214 ; ../cpu/src/decode_stage_b.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/decode_stage_b.vhd ;
215 ; ../cpu/src/decode_stage.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/decode_stage.vhd ;
216 ; ../cpu/src/core_top.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/core_top.vhd ;
217 ; ../cpu/src/core_pkg.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/core_pkg.vhd ;
218 ; ../cpu/src/common_pkg.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/common_pkg.vhd ;
219 ; ../cpu/src/alu_pkg.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/alu_pkg.vhd ;
220 ; ../cpu/src/alu_b.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/alu_b.vhd ;
221 ; ../cpu/src/alu.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/alu.vhd ;
222 ; ../cpu/src/exec_op/xor_op_b.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/exec_op/xor_op_b.vhd ;
223 ; ../cpu/src/exec_op/shift_op_b.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/exec_op/shift_op_b.vhd ;
224 ; ../cpu/src/exec_op/or_op_b.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/exec_op/or_op_b.vhd ;
225 ; ../cpu/src/exec_op/and_op_b.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/exec_op/and_op_b.vhd ;
226 ; ../cpu/src/exec_op/add_op_b.vhd ; yes ; User VHDL File ; /home/stefan/processor/calu/cpu/src/exec_op/add_op_b.vhd ;
227 ; altsyncram.tdf ; yes ; Megafunction ; /opt/altera/10.0sp1/quartus/libraries/megafunctions/altsyncram.tdf ;
228 ; db/altsyncram_grk1.tdf ; yes ; Auto-Generated Megafunction ; /home/stefan/processor/calu/dt/db/altsyncram_grk1.tdf ;
229 ; db/dt.ram0_r_w_ram_1e9198d1.hdl.mif ; yes ; Auto-Generated Auto-Found Memory Initialization File ; /home/stefan/processor/calu/dt/db/dt.ram0_r_w_ram_1e9198d1.hdl.mif ;
230 ; db/altsyncram_emk1.tdf ; yes ; Auto-Generated Megafunction ; /home/stefan/processor/calu/dt/db/altsyncram_emk1.tdf ;
231 ; db/dt.ram0_r2_w_ram_8e30dd1c.hdl.mif ; yes ; Auto-Generated Auto-Found Memory Initialization File ; /home/stefan/processor/calu/dt/db/dt.ram0_r2_w_ram_8e30dd1c.hdl.mif ;
232 +--------------------------------------+-----------------+-------------------------------------------------------+---------------------------------------------------------------------+
235 +-------------------------------------------------------+
236 ; Analysis & Synthesis Resource Usage Summary ;
237 +---------------------------------------------+---------+
239 +---------------------------------------------+---------+
240 ; Total logic elements ; 1879 ;
241 ; -- Combinational with no register ; 1359 ;
242 ; -- Register only ; 259 ;
243 ; -- Combinational with a register ; 261 ;
245 ; Logic element usage by number of LUT inputs ; ;
246 ; -- 4 input functions ; 827 ;
247 ; -- 3 input functions ; 474 ;
248 ; -- 2 input functions ; 292 ;
249 ; -- 1 input functions ; 27 ;
250 ; -- 0 input functions ; 0 ;
252 ; Logic elements by mode ; ;
253 ; -- normal mode ; 1703 ;
254 ; -- arithmetic mode ; 176 ;
256 ; -- register cascade mode ; 0 ;
257 ; -- synchronous clear/load mode ; 57 ;
258 ; -- asynchronous clear/load mode ; 492 ;
260 ; Total registers ; 520 ;
261 ; Total logic cells in carry chains ; 184 ;
263 ; Total memory bits ; 66560 ;
264 ; Maximum fan-out node ; sys_clk ;
265 ; Maximum fan-out ; 616 ;
266 ; Total fan-out ; 8075 ;
267 ; Average fan-out ; 4.02 ;
268 +---------------------------------------------+---------+
271 +---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
272 ; Analysis & Synthesis Resource Utilization by Entity ;
273 +----------------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+-------------------------------------------------------------------------------------------------------------+--------------+
274 ; Compilation Hierarchy Node ; Logic Cells ; LC Registers ; Memory Bits ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Carry Chain LCs ; Packed LCs ; Full Hierarchy Name ; Library Name ;
275 +----------------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+-------------------------------------------------------------------------------------------------------------+--------------+
276 ; |core_top ; 1879 (0) ; 520 ; 66560 ; 32 ; 0 ; 1359 (0) ; 259 (0) ; 261 (0) ; 184 (0) ; 0 (0) ; |core_top ; ;
277 ; |decode_stage:decode_st| ; 220 (153) ; 106 ; 1024 ; 0 ; 0 ; 114 (47) ; 54 (54) ; 52 (52) ; 11 (11) ; 0 (0) ; |core_top|decode_stage:decode_st ; ;
278 ; |decoder:decoder_inst| ; 67 (67) ; 0 ; 0 ; 0 ; 0 ; 67 (67) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |core_top|decode_stage:decode_st|decoder:decoder_inst ; ;
279 ; |r2_w_ram:register_ram| ; 0 (0) ; 0 ; 1024 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |core_top|decode_stage:decode_st|r2_w_ram:register_ram ; ;
280 ; |altsyncram:ram_rtl_1| ; 0 (0) ; 0 ; 512 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |core_top|decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1 ; ;
281 ; |altsyncram_emk1:auto_generated| ; 0 (0) ; 0 ; 512 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |core_top|decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated ; ;
282 ; |altsyncram:ram_rtl_2| ; 0 (0) ; 0 ; 512 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |core_top|decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_2 ; ;
283 ; |altsyncram_emk1:auto_generated| ; 0 (0) ; 0 ; 512 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |core_top|decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_2|altsyncram_emk1:auto_generated ; ;
284 ; |execute_stage:exec_st| ; 940 (175) ; 71 ; 0 ; 0 ; 0 ; 869 (136) ; 23 (4) ; 48 (35) ; 108 (0) ; 0 (0) ; |core_top|execute_stage:exec_st ; ;
285 ; |alu:alu_inst| ; 703 (387) ; 0 ; 0 ; 0 ; 0 ; 703 (387) ; 0 (0) ; 0 (0) ; 78 (44) ; 0 (0) ; |core_top|execute_stage:exec_st|alu:alu_inst ; ;
286 ; |exec_op:add_inst| ; 67 (67) ; 0 ; 0 ; 0 ; 0 ; 67 (67) ; 0 (0) ; 0 (0) ; 34 (34) ; 0 (0) ; |core_top|execute_stage:exec_st|alu:alu_inst|exec_op:add_inst ; ;
287 ; |exec_op:shift_inst| ; 249 (249) ; 0 ; 0 ; 0 ; 0 ; 249 (249) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |core_top|execute_stage:exec_st|alu:alu_inst|exec_op:shift_inst ; ;
288 ; |extension_gpm:gpmp_inst| ; 62 (62) ; 32 ; 0 ; 0 ; 0 ; 30 (30) ; 19 (19) ; 13 (13) ; 30 (30) ; 0 (0) ; |core_top|execute_stage:exec_st|extension_gpm:gpmp_inst ; ;
289 ; |fetch_stage:fetch_st| ; 55 (34) ; 29 ; 0 ; 0 ; 0 ; 26 (23) ; 11 (11) ; 18 (0) ; 0 (0) ; 0 (0) ; |core_top|fetch_stage:fetch_st ; ;
290 ; |rom:instruction_ram| ; 21 (21) ; 18 ; 0 ; 0 ; 0 ; 3 (3) ; 0 (0) ; 18 (18) ; 0 (0) ; 0 (0) ; |core_top|fetch_stage:fetch_st|rom:instruction_ram ; ;
291 ; |writeback_stage:writeback_st| ; 664 (247) ; 314 ; 65536 ; 0 ; 0 ; 350 (183) ; 171 (45) ; 143 (19) ; 65 (0) ; 0 (0) ; |core_top|writeback_stage:writeback_st ; ;
292 ; |extension_7seg:sseg| ; 48 (48) ; 47 ; 0 ; 0 ; 0 ; 1 (1) ; 18 (18) ; 29 (29) ; 0 (0) ; 0 (0) ; |core_top|writeback_stage:writeback_st|extension_7seg:sseg ; ;
293 ; |extension_uart:uart| ; 369 (145) ; 203 ; 0 ; 0 ; 0 ; 166 (39) ; 108 (98) ; 95 (8) ; 65 (0) ; 0 (0) ; |core_top|writeback_stage:writeback_st|extension_uart:uart ; ;
294 ; |rs232_rx:rs232_rx_inst| ; 160 (160) ; 73 ; 0 ; 0 ; 0 ; 87 (87) ; 10 (10) ; 63 (63) ; 48 (48) ; 0 (0) ; |core_top|writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst ; ;
295 ; |rs232_tx:rs232_tx_inst| ; 64 (64) ; 24 ; 0 ; 0 ; 0 ; 40 (40) ; 0 (0) ; 24 (24) ; 17 (17) ; 0 (0) ; |core_top|writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst ; ;
296 ; |r_w_ram:data_ram| ; 0 (0) ; 0 ; 65536 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |core_top|writeback_stage:writeback_st|r_w_ram:data_ram ; ;
297 ; |altsyncram:ram_rtl_0| ; 0 (0) ; 0 ; 65536 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |core_top|writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_0 ; ;
298 ; |altsyncram_grk1:auto_generated| ; 0 (0) ; 0 ; 65536 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |core_top|writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_0|altsyncram_grk1:auto_generated ; ;
299 +----------------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+-------------------------------------------------------------------------------------------------------------+--------------+
300 Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
303 +---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
304 ; Analysis & Synthesis RAM Summary ;
305 +--------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+-------+--------------------------------------+
306 ; Name ; Type ; Mode ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Size ; MIF ;
307 +--------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+-------+--------------------------------------+
308 ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; 16 ; 32 ; 16 ; 32 ; 512 ; db/dt.ram0_r2_w_ram_8e30dd1c.hdl.mif ;
309 ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_2|altsyncram_emk1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; 16 ; 32 ; 16 ; 32 ; 512 ; db/dt.ram0_r2_w_ram_8e30dd1c.hdl.mif ;
310 ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_0|altsyncram_grk1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; 2048 ; 32 ; 2048 ; 32 ; 65536 ; db/dt.ram0_r_w_ram_1e9198d1.hdl.mif ;
311 +--------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+-------+--------------------------------------+
314 Encoding Type: One-Hot
315 +---------------------------------------------------------------------------------------------------------+
316 ; State Machine - |core_top|writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|state ;
317 +------------------+-----------------+-----------------+----------------+------------------+--------------+
318 ; Name ; state.POST_STOP ; state.READ_STOP ; state.READ_BIT ; state.READ_START ; state.IDLE ;
319 +------------------+-----------------+-----------------+----------------+------------------+--------------+
320 ; state.IDLE ; 0 ; 0 ; 0 ; 0 ; 0 ;
321 ; state.READ_START ; 0 ; 0 ; 0 ; 1 ; 1 ;
322 ; state.READ_BIT ; 0 ; 0 ; 1 ; 0 ; 1 ;
323 ; state.READ_STOP ; 0 ; 1 ; 0 ; 0 ; 1 ;
324 ; state.POST_STOP ; 1 ; 0 ; 0 ; 0 ; 1 ;
325 +------------------+-----------------+-----------------+----------------+------------------+--------------+
328 Encoding Type: One-Hot
329 +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
330 ; State Machine - |core_top|decode_stage:decode_st|dec_op_inst.op_group ;
331 +--------------------------------+--------------------------------+-----------------------------+------------------------------+-------------------------------+-----------------------------+----------------------------+-----------------------------+--------------------------------+
332 ; Name ; dec_op_inst.op_group.JMP_ST_OP ; dec_op_inst.op_group.JMP_OP ; dec_op_inst.op_group.LDST_OP ; dec_op_inst.op_group.SHIFT_OP ; dec_op_inst.op_group.XOR_OP ; dec_op_inst.op_group.OR_OP ; dec_op_inst.op_group.AND_OP ; dec_op_inst.op_group.ADDSUB_OP ;
333 +--------------------------------+--------------------------------+-----------------------------+------------------------------+-------------------------------+-----------------------------+----------------------------+-----------------------------+--------------------------------+
334 ; dec_op_inst.op_group.ADDSUB_OP ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
335 ; dec_op_inst.op_group.AND_OP ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 1 ;
336 ; dec_op_inst.op_group.OR_OP ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 1 ;
337 ; dec_op_inst.op_group.XOR_OP ; 0 ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 1 ;
338 ; dec_op_inst.op_group.SHIFT_OP ; 0 ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 1 ;
339 ; dec_op_inst.op_group.LDST_OP ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 1 ;
340 ; dec_op_inst.op_group.JMP_OP ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
341 ; dec_op_inst.op_group.JMP_ST_OP ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 ;
342 +--------------------------------+--------------------------------+-----------------------------+------------------------------+-------------------------------+-----------------------------+----------------------------+-----------------------------+--------------------------------+
345 +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
346 ; Registers Removed During Synthesis ;
347 +------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------+
348 ; Register name ; Reason for Removal ;
349 +------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------+
350 ; decode_stage:decode_st|dec_op_inst.prog_cnt[11..31] ; Stuck at GND due to stuck port data_in ;
351 ; fetch_stage:fetch_st|rom:instruction_ram|data_out[2,8] ; Stuck at GND due to stuck port data_in ;
352 ; writeback_stage:writeback_st|wb_reg.hword ; Stuck at GND due to stuck port data_in ;
353 ; writeback_stage:writeback_st|wb_reg.byte_s ; Stuck at GND due to stuck port data_in ;
354 ; writeback_stage:writeback_st|wb_reg.address[0..1] ; Lost fanout ;
355 ; decode_stage:decode_st|dec_op_inst.displacement[2,8] ; Stuck at GND due to stuck port data_in ;
356 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][29] ; Lost fanout ;
357 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][28] ; Lost fanout ;
358 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][27] ; Lost fanout ;
359 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][26] ; Lost fanout ;
360 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][25] ; Lost fanout ;
361 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][24] ; Lost fanout ;
362 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][23] ; Lost fanout ;
363 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][22] ; Lost fanout ;
364 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][21] ; Lost fanout ;
365 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][20] ; Lost fanout ;
366 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][19] ; Lost fanout ;
367 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][18] ; Lost fanout ;
368 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][17] ; Lost fanout ;
369 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][16] ; Lost fanout ;
370 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][15] ; Lost fanout ;
371 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][14] ; Lost fanout ;
372 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][13] ; Lost fanout ;
373 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][12] ; Lost fanout ;
374 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][11] ; Lost fanout ;
375 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][10] ; Lost fanout ;
376 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][9] ; Lost fanout ;
377 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][8] ; Lost fanout ;
378 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][7] ; Lost fanout ;
379 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][6] ; Lost fanout ;
380 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][5] ; Lost fanout ;
381 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][4] ; Lost fanout ;
382 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][3] ; Lost fanout ;
383 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][2] ; Lost fanout ;
384 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][1] ; Lost fanout ;
385 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][0] ; Lost fanout ;
386 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][29] ; Lost fanout ;
387 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][28] ; Lost fanout ;
388 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][27] ; Lost fanout ;
389 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][26] ; Lost fanout ;
390 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][25] ; Lost fanout ;
391 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][24] ; Lost fanout ;
392 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][23] ; Lost fanout ;
393 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][22] ; Lost fanout ;
394 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][21] ; Lost fanout ;
395 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][20] ; Lost fanout ;
396 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][19] ; Lost fanout ;
397 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][18] ; Lost fanout ;
398 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][17] ; Lost fanout ;
399 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][16] ; Lost fanout ;
400 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][15] ; Lost fanout ;
401 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][14] ; Lost fanout ;
402 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][13] ; Lost fanout ;
403 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][12] ; Lost fanout ;
404 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][11] ; Lost fanout ;
405 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][10] ; Lost fanout ;
406 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][9] ; Lost fanout ;
407 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][8] ; Lost fanout ;
408 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][7] ; Lost fanout ;
409 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][6] ; Lost fanout ;
410 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][5] ; Lost fanout ;
411 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][4] ; Lost fanout ;
412 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][3] ; Lost fanout ;
413 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][2] ; Lost fanout ;
414 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][1] ; Lost fanout ;
415 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][0] ; Lost fanout ;
416 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][29] ; Lost fanout ;
417 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][28] ; Lost fanout ;
418 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][27] ; Lost fanout ;
419 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][26] ; Lost fanout ;
420 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][25] ; Lost fanout ;
421 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][24] ; Lost fanout ;
422 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][23] ; Lost fanout ;
423 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][22] ; Lost fanout ;
424 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][21] ; Lost fanout ;
425 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][20] ; Lost fanout ;
426 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][19] ; Lost fanout ;
427 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][18] ; Lost fanout ;
428 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][17] ; Lost fanout ;
429 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][16] ; Lost fanout ;
430 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][15] ; Lost fanout ;
431 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][14] ; Lost fanout ;
432 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][13] ; Lost fanout ;
433 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][12] ; Lost fanout ;
434 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][11] ; Lost fanout ;
435 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][10] ; Lost fanout ;
436 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][9] ; Lost fanout ;
437 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][8] ; Lost fanout ;
438 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][7] ; Lost fanout ;
439 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][6] ; Lost fanout ;
440 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][5] ; Lost fanout ;
441 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][4] ; Lost fanout ;
442 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][3] ; Lost fanout ;
443 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][2] ; Lost fanout ;
444 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][1] ; Lost fanout ;
445 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][0] ; Lost fanout ;
446 ; writeback_stage:writeback_st|wb_reg.byte_en[0..3] ; Merged with writeback_stage:writeback_st|wb_reg.dmem_en ;
447 ; writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.byte_en[0] ; Merged with writeback_stage:writeback_st|extension_7seg:sseg|ext_reg_r.byte_en[1] ;
448 ; writeback_stage:writeback_st|extension_uart:uart|w4_uart_receive[8..30] ; Merged with writeback_stage:writeback_st|extension_uart:uart|w4_uart_receive[31] ;
449 ; decode_stage:decode_st|dec_op_inst.op_detail[0] ; Merged with decode_stage:decode_st|rtw_rec.imm_set ;
450 ; fetch_stage:fetch_st|rom:instruction_ram|data_out[9,28..30] ; Merged with fetch_stage:fetch_st|rom:instruction_ram|data_out[31] ;
451 ; fetch_stage:fetch_st|rom:instruction_ram|data_out[0,10..14,18] ; Merged with fetch_stage:fetch_st|rom:instruction_ram|data_out[22] ;
452 ; fetch_stage:fetch_st|rom:instruction_ram|data_out[3] ; Merged with fetch_stage:fetch_st|rom:instruction_ram|data_out[4] ;
453 ; decode_stage:decode_st|rtw_rec.immediate[23..27] ; Merged with decode_stage:decode_st|rtw_rec.immediate[31] ;
454 ; decode_stage:decode_st|rtw_rec.immediate[16] ; Merged with decode_stage:decode_st|rtw_rec.immediate[17] ;
455 ; decode_stage:decode_st|rtw_rec.immediate[7] ; Merged with decode_stage:decode_st|rtw_rec.immediate[11] ;
456 ; decode_stage:decode_st|dec_op_inst.condition[1..2] ; Merged with decode_stage:decode_st|dec_op_inst.condition[3] ;
457 ; decode_stage:decode_st|dec_op_inst.displacement[15..30] ; Merged with decode_stage:decode_st|dec_op_inst.displacement[31] ;
458 ; decode_stage:decode_st|dec_op_inst.displacement[0,10..13] ; Merged with decode_stage:decode_st|dec_op_inst.displacement[14] ;
459 ; decode_stage:decode_st|dec_op_inst.displacement[3] ; Merged with decode_stage:decode_st|dec_op_inst.displacement[4] ;
460 ; writeback_stage:writeback_st|extension_uart:uart|w4_uart_receive[31] ; Stuck at GND due to stuck port data_in ;
461 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.oflo ; Lost fanout ;
462 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.sign ; Lost fanout ;
463 ; decode_stage:decode_st|dec_op_inst.displacement[14] ; Merged with decode_stage:decode_st|dec_op_inst.displacement[31] ;
464 ; fetch_stage:fetch_st|instr_r_addr[11..31] ; Lost fanout ;
465 ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|baud_cnt[17..31] ; Lost fanout ;
466 ; Total Number of Removed Registers = 231 ; ;
467 +------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------+
470 +------------------------------------------------------------------------------------------------------------------------------------------------------------+
471 ; Removed Registers Triggering Further Register Optimizations ;
472 +---------------------------------------------------------------+---------------------------+----------------------------------------------------------------+
473 ; Register name ; Reason for Removal ; Registers Removed due to This Register ;
474 +---------------------------------------------------------------+---------------------------+----------------------------------------------------------------+
475 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][29] ; Lost Fanouts ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.oflo, ;
476 ; ; ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.sign ;
477 ; fetch_stage:fetch_st|rom:instruction_ram|data_out[8] ; Stuck at GND ; decode_stage:decode_st|dec_op_inst.displacement[8] ;
478 ; ; due to stuck port data_in ; ;
479 ; fetch_stage:fetch_st|rom:instruction_ram|data_out[2] ; Stuck at GND ; decode_stage:decode_st|dec_op_inst.displacement[2] ;
480 ; ; due to stuck port data_in ; ;
481 +---------------------------------------------------------------+---------------------------+----------------------------------------------------------------+
484 +------------------------------------------------------+
485 ; General Register Statistics ;
486 +----------------------------------------------+-------+
487 ; Statistic ; Value ;
488 +----------------------------------------------+-------+
489 ; Total registers ; 520 ;
490 ; Number of registers using Synchronous Clear ; 25 ;
491 ; Number of registers using Synchronous Load ; 40 ;
492 ; Number of registers using Asynchronous Clear ; 487 ;
493 ; Number of registers using Asynchronous Load ; 5 ;
494 ; Number of registers using Clock Enable ; 177 ;
495 ; Number of registers using Preset ; 0 ;
496 +----------------------------------------------+-------+
499 +-----------------------------------------------------------------------------------------------+
500 ; Inverted Register Statistics ;
501 +-------------------------------------------------------------------------------------+---------+
502 ; Inverted Register ; Fan out ;
503 +-------------------------------------------------------------------------------------+---------+
504 ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|bus_tx_int ; 1 ;
505 ; writeback_stage:writeback_st|extension_uart:uart|w2_uart_config[1] ; 4 ;
506 ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|baud_cnt[1] ; 2 ;
507 ; writeback_stage:writeback_st|extension_uart:uart|w2_uart_config[4] ; 4 ;
508 ; writeback_stage:writeback_st|extension_uart:uart|w2_uart_config[5] ; 4 ;
509 ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|baud_cnt[5] ; 2 ;
510 ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|baud_cnt[4] ; 2 ;
511 ; writeback_stage:writeback_st|extension_uart:uart|w2_uart_config[7] ; 4 ;
512 ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|baud_cnt[7] ; 2 ;
513 ; writeback_stage:writeback_st|extension_uart:uart|w2_uart_config[8] ; 4 ;
514 ; writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|baud_cnt[8] ; 2 ;
515 ; decode_stage:decode_st|dec_op_inst.condition[0] ; 1 ;
516 ; decode_stage:decode_st|dec_op_inst.condition[3] ; 1 ;
517 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][1] ; 2 ;
518 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][10] ; 2 ;
519 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][9] ; 2 ;
520 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][8] ; 2 ;
521 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][7] ; 2 ;
522 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][6] ; 2 ;
523 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][5] ; 2 ;
524 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][4] ; 2 ;
525 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][3] ; 2 ;
526 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][2] ; 2 ;
527 ; execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[0][0] ; 4 ;
528 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|sync[2] ; 13 ;
529 ; writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|sync[1] ; 1 ;
530 ; Total number of inverted registers = 26 ; ;
531 +-------------------------------------------------------------------------------------+---------+
534 +--------------------------------------------------------------------------------------------------------------------------+
535 ; Registers Packed Into Inferred Megafunctions ;
536 +------------------------------------------------------------+------------------------------------------------------+------+
537 ; Register Name ; Megafunction ; Type ;
538 +------------------------------------------------------------+------------------------------------------------------+------+
539 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[0] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
540 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[1] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
541 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[2] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
542 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[3] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
543 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[4] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
544 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[5] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
545 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[6] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
546 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[7] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
547 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[8] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
548 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[9] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
549 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[10] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
550 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[11] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
551 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[12] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
552 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[13] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
553 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[14] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
554 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[15] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
555 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[16] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
556 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[17] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
557 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[18] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
558 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[19] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
559 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[20] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
560 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[21] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
561 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[22] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
562 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[23] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
563 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[24] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
564 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[25] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
565 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[26] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
566 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[27] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
567 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[28] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
568 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[29] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
569 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[30] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
570 ; writeback_stage:writeback_st|r_w_ram:data_ram|data_out[31] ; writeback_stage:writeback_st|r_w_ram:data_ram|ram~44 ; RAM ;
571 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[0] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
572 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[1] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
573 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[2] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
574 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[3] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
575 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[4] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
576 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[5] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
577 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[6] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
578 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[7] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
579 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[8] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
580 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[9] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
581 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[10] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
582 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[11] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
583 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[12] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
584 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[13] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
585 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[14] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
586 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[15] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
587 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[16] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
588 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[17] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
589 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[18] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
590 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[19] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
591 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[20] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
592 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[21] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
593 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[22] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
594 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[23] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
595 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[24] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
596 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[25] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
597 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[26] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
598 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[27] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
599 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[28] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
600 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[29] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
601 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[30] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
602 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out1[31] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~37 ; RAM ;
603 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[0] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
604 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[1] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
605 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[2] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
606 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[3] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
607 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[4] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
608 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[5] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
609 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[6] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
610 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[7] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
611 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[8] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
612 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[9] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
613 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[10] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
614 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[11] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
615 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[12] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
616 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[13] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
617 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[14] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
618 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[15] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
619 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[16] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
620 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[17] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
621 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[18] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
622 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[19] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
623 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[20] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
624 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[21] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
625 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[22] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
626 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[23] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
627 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[24] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
628 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[25] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
629 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[26] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
630 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[27] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
631 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[28] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
632 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[29] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
633 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[30] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
634 ; decode_stage:decode_st|r2_w_ram:register_ram|data_out2[31] ; decode_stage:decode_st|r2_w_ram:register_ram|ram~38 ; RAM ;
635 +------------------------------------------------------------+------------------------------------------------------+------+
638 +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
639 ; Multiplexer Restructuring Statistics (Restructuring Performed) ;
640 +--------------------+-----------+---------------+----------------------+------------------------+------------+------------------------------------------------------------------------------------------------+
641 ; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output ;
642 +--------------------+-----------+---------------+----------------------+------------------------+------------+------------------------------------------------------------------------------------------------+
643 ; 3:1 ; 27 bits ; 54 LEs ; 27 LEs ; 27 LEs ; Yes ; |core_top|writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|baud_cnt[17] ;
644 ; 3:1 ; 6 bits ; 12 LEs ; 6 LEs ; 6 LEs ; Yes ; |core_top|decode_stage:decode_st|dec_op_inst.displacement[7] ;
645 ; 4:1 ; 18 bits ; 36 LEs ; 36 LEs ; 0 LEs ; Yes ; |core_top|writeback_stage:writeback_st|wb_reg.address[19] ;
646 ; 5:1 ; 21 bits ; 63 LEs ; 42 LEs ; 21 LEs ; Yes ; |core_top|fetch_stage:fetch_st|instr_r_addr[30] ;
647 ; 18:1 ; 3 bits ; 36 LEs ; 3 LEs ; 33 LEs ; Yes ; |core_top|writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|cnt[1] ;
648 ; 5:1 ; 16 bits ; 48 LEs ; 16 LEs ; 32 LEs ; Yes ; |core_top|writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst|baud_cnt[4] ;
649 ; 3:1 ; 5 bits ; 10 LEs ; 10 LEs ; 0 LEs ; Yes ; |core_top|writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|baud_cnt[4] ;
650 ; 3:1 ; 2 bits ; 4 LEs ; 2 LEs ; 2 LEs ; No ; |core_top|execute_stage:exec_st|condition[0] ;
651 ; 3:1 ; 3 bits ; 6 LEs ; 6 LEs ; 0 LEs ; No ; |core_top|decode_stage:decode_st|decoder:decoder_inst|instr_spl.reg_src2_addr[1] ;
652 ; 3:1 ; 2 bits ; 4 LEs ; 2 LEs ; 2 LEs ; No ; |core_top|decode_stage:decode_st|decoder:decoder_inst|\split_instr:instr_s.op_group.JMP_ST_OP ;
653 ; 4:1 ; 4 bits ; 8 LEs ; 8 LEs ; 0 LEs ; No ; |core_top|decode_stage:decode_st|decoder:decoder_inst|instr_spl.immediate[8] ;
654 ; 3:1 ; 32 bits ; 64 LEs ; 64 LEs ; 0 LEs ; No ; |core_top|execute_stage:exec_st|left_operand[19] ;
655 ; 4:1 ; 32 bits ; 64 LEs ; 64 LEs ; 0 LEs ; No ; |core_top|execute_stage:exec_st|right_operand[5] ;
656 ; 4:1 ; 12 bits ; 24 LEs ; 24 LEs ; 0 LEs ; No ; |core_top|execute_stage:exec_st|alu:alu_inst|Selector63 ;
657 ; 5:1 ; 11 bits ; 33 LEs ; 22 LEs ; 11 LEs ; No ; |core_top|fetch_stage:fetch_st|instr_r_addr_nxt[0] ;
658 ; 4:1 ; 11 bits ; 22 LEs ; 11 LEs ; 11 LEs ; No ; |core_top|execute_stage:exec_st|alu:alu_inst|Selector98 ;
659 ; 32:1 ; 3 bits ; 63 LEs ; 6 LEs ; 57 LEs ; No ; |core_top|decode_stage:decode_st|decoder:decoder_inst|instr_spl.reg_src1_addr[0] ;
660 ; 6:1 ; 9 bits ; 36 LEs ; 27 LEs ; 9 LEs ; No ; |core_top|decode_stage:decode_st|decoder:decoder_inst|instr_s ;
661 ; 7:1 ; 3 bits ; 12 LEs ; 6 LEs ; 6 LEs ; No ; |core_top|decode_stage:decode_st|decoder:decoder_inst|instr_spl.immediate[12] ;
662 ; 10:1 ; 24 bits ; 144 LEs ; 96 LEs ; 48 LEs ; No ; |core_top|writeback_stage:writeback_st|regfile_val[24] ;
663 ; 8:1 ; 2 bits ; 10 LEs ; 4 LEs ; 6 LEs ; No ; |core_top|decode_stage:decode_st|decoder:decoder_inst|instr_spl.immediate[3] ;
664 ; 11:1 ; 8 bits ; 56 LEs ; 48 LEs ; 8 LEs ; No ; |core_top|writeback_stage:writeback_st|regfile_val[0] ;
665 ; 10:1 ; 18 bits ; 108 LEs ; 108 LEs ; 0 LEs ; No ; |core_top|execute_stage:exec_st|alu:alu_inst|Selector16 ;
666 ; 11:1 ; 4 bits ; 28 LEs ; 24 LEs ; 4 LEs ; No ; |core_top|execute_stage:exec_st|alu:alu_inst|Selector3 ;
667 ; 11:1 ; 4 bits ; 28 LEs ; 24 LEs ; 4 LEs ; No ; |core_top|execute_stage:exec_st|alu:alu_inst|Selector28 ;
668 ; 12:1 ; 2 bits ; 16 LEs ; 14 LEs ; 2 LEs ; No ; |core_top|execute_stage:exec_st|alu:alu_inst|Selector1 ;
669 ; 12:1 ; 2 bits ; 16 LEs ; 14 LEs ; 2 LEs ; No ; |core_top|execute_stage:exec_st|alu:alu_inst|Selector29 ;
670 ; 14:1 ; 3 bits ; 27 LEs ; 21 LEs ; 6 LEs ; No ; |core_top|decode_stage:decode_st|decoder:decoder_inst|instr_s ;
671 +--------------------+-----------+---------------+----------------------+------------------------+------------+------------------------------------------------------------------------------------------------+
674 +--------------------------------------------------------------------------------------------------------------------------+
675 ; Source assignments for writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_0|altsyncram_grk1:auto_generated ;
676 +---------------------------------+--------------------+------+------------------------------------------------------------+
677 ; Assignment ; Value ; From ; To ;
678 +---------------------------------+--------------------+------+------------------------------------------------------------+
679 ; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
680 +---------------------------------+--------------------+------+------------------------------------------------------------+
683 +-------------------------------------------------------------------------------------------------------------------------+
684 ; Source assignments for decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1|altsyncram_emk1:auto_generated ;
685 +---------------------------------+--------------------+------+-----------------------------------------------------------+
686 ; Assignment ; Value ; From ; To ;
687 +---------------------------------+--------------------+------+-----------------------------------------------------------+
688 ; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
689 +---------------------------------+--------------------+------+-----------------------------------------------------------+
692 +-------------------------------------------------------------------------------------------------------------------------+
693 ; Source assignments for decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_2|altsyncram_emk1:auto_generated ;
694 +---------------------------------+--------------------+------+-----------------------------------------------------------+
695 ; Assignment ; Value ; From ; To ;
696 +---------------------------------+--------------------+------+-----------------------------------------------------------+
697 ; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
698 +---------------------------------+--------------------+------+-----------------------------------------------------------+
701 +-------------------------------------------------------------------+
702 ; Parameter Settings for User Entity Instance: fetch_stage:fetch_st ;
703 +----------------+-------+------------------------------------------+
704 ; Parameter Name ; Value ; Type ;
705 +----------------+-------+------------------------------------------+
706 ; reset_value ; '0' ; Enumerated ;
707 ; logic_act ; '1' ; Enumerated ;
708 +----------------+-------+------------------------------------------+
709 Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
712 +---------------------------------------------------------------------------------------+
713 ; Parameter Settings for User Entity Instance: fetch_stage:fetch_st|rom:instruction_ram ;
714 +----------------+-------+--------------------------------------------------------------+
715 ; Parameter Name ; Value ; Type ;
716 +----------------+-------+--------------------------------------------------------------+
717 ; addr_width ; 11 ; Signed Integer ;
718 ; data_width ; 32 ; Signed Integer ;
719 +----------------+-------+--------------------------------------------------------------+
720 Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
723 +---------------------------------------------------------------------+
724 ; Parameter Settings for User Entity Instance: decode_stage:decode_st ;
725 +----------------+-------+--------------------------------------------+
726 ; Parameter Name ; Value ; Type ;
727 +----------------+-------+--------------------------------------------+
728 ; reset_value ; '0' ; Enumerated ;
729 ; logic_act ; '1' ; Enumerated ;
730 +----------------+-------+--------------------------------------------+
731 Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
734 +-------------------------------------------------------------------------------------------+
735 ; Parameter Settings for User Entity Instance: decode_stage:decode_st|r2_w_ram:register_ram ;
736 +----------------+-------+------------------------------------------------------------------+
737 ; Parameter Name ; Value ; Type ;
738 +----------------+-------+------------------------------------------------------------------+
739 ; addr_width ; 4 ; Signed Integer ;
740 ; data_width ; 32 ; Signed Integer ;
741 +----------------+-------+------------------------------------------------------------------+
742 Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
745 +--------------------------------------------------------------------+
746 ; Parameter Settings for User Entity Instance: execute_stage:exec_st ;
747 +----------------+-------+-------------------------------------------+
748 ; Parameter Name ; Value ; Type ;
749 +----------------+-------+-------------------------------------------+
750 ; reset_value ; '0' ; Enumerated ;
751 +----------------+-------+-------------------------------------------+
752 Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
755 +--------------------------------------------------------------------------------------------+
756 ; Parameter Settings for User Entity Instance: execute_stage:exec_st|extension_gpm:gpmp_inst ;
757 +----------------+-------+-------------------------------------------------------------------+
758 ; Parameter Name ; Value ; Type ;
759 +----------------+-------+-------------------------------------------------------------------+
760 ; reset_value ; '0' ; Enumerated ;
761 +----------------+-------+-------------------------------------------------------------------+
762 Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
765 +---------------------------------------------------------------------------+
766 ; Parameter Settings for User Entity Instance: writeback_stage:writeback_st ;
767 +----------------+-------+--------------------------------------------------+
768 ; Parameter Name ; Value ; Type ;
769 +----------------+-------+--------------------------------------------------+
770 ; reset_value ; '0' ; Enumerated ;
771 ; logic_act ; '1' ; Enumerated ;
772 +----------------+-------+--------------------------------------------------+
773 Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
776 +--------------------------------------------------------------------------------------------+
777 ; Parameter Settings for User Entity Instance: writeback_stage:writeback_st|r_w_ram:data_ram ;
778 +----------------+-------+-------------------------------------------------------------------+
779 ; Parameter Name ; Value ; Type ;
780 +----------------+-------+-------------------------------------------------------------------+
781 ; addr_width ; 11 ; Signed Integer ;
782 ; data_width ; 32 ; Signed Integer ;
783 +----------------+-------+-------------------------------------------------------------------+
784 Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
787 +-----------------------------------------------------------------------------------------------+
788 ; Parameter Settings for User Entity Instance: writeback_stage:writeback_st|extension_uart:uart ;
789 +----------------+-------+----------------------------------------------------------------------+
790 ; Parameter Name ; Value ; Type ;
791 +----------------+-------+----------------------------------------------------------------------+
792 ; reset_value ; '0' ; Enumerated ;
793 +----------------+-------+----------------------------------------------------------------------+
794 Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
797 +----------------------------------------------------------------------------------------------------------------------+
798 ; Parameter Settings for User Entity Instance: writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst ;
799 +----------------+-------+---------------------------------------------------------------------------------------------+
800 ; Parameter Name ; Value ; Type ;
801 +----------------+-------+---------------------------------------------------------------------------------------------+
802 ; reset_value ; '0' ; Enumerated ;
803 +----------------+-------+---------------------------------------------------------------------------------------------+
804 Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
807 +----------------------------------------------------------------------------------------------------------------------+
808 ; Parameter Settings for User Entity Instance: writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst ;
809 +----------------+-------+---------------------------------------------------------------------------------------------+
810 ; Parameter Name ; Value ; Type ;
811 +----------------+-------+---------------------------------------------------------------------------------------------+
812 ; reset_value ; '0' ; Enumerated ;
813 ; sync_stages ; 2 ; Signed Integer ;
814 +----------------+-------+---------------------------------------------------------------------------------------------+
815 Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
818 +-----------------------------------------------------------------------------------------------+
819 ; Parameter Settings for User Entity Instance: writeback_stage:writeback_st|extension_7seg:sseg ;
820 +----------------+-------+----------------------------------------------------------------------+
821 ; Parameter Name ; Value ; Type ;
822 +----------------+-------+----------------------------------------------------------------------+
823 ; reset_value ; '0' ; Enumerated ;
824 +----------------+-------+----------------------------------------------------------------------+
825 Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
828 +---------------------------------------------------------------------------------------------------------------------+
829 ; Parameter Settings for Inferred Entity Instance: writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_0 ;
830 +------------------------------------+-------------------------------------+------------------------------------------+
831 ; Parameter Name ; Value ; Type ;
832 +------------------------------------+-------------------------------------+------------------------------------------+
833 ; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
834 ; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
835 ; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
836 ; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
837 ; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
838 ; WIDTH_BYTEENA ; 1 ; Untyped ;
839 ; OPERATION_MODE ; DUAL_PORT ; Untyped ;
840 ; WIDTH_A ; 32 ; Untyped ;
841 ; WIDTHAD_A ; 11 ; Untyped ;
842 ; NUMWORDS_A ; 2048 ; Untyped ;
843 ; OUTDATA_REG_A ; UNREGISTERED ; Untyped ;
844 ; ADDRESS_ACLR_A ; NONE ; Untyped ;
845 ; OUTDATA_ACLR_A ; NONE ; Untyped ;
846 ; WRCONTROL_ACLR_A ; NONE ; Untyped ;
847 ; INDATA_ACLR_A ; NONE ; Untyped ;
848 ; BYTEENA_ACLR_A ; NONE ; Untyped ;
849 ; WIDTH_B ; 32 ; Untyped ;
850 ; WIDTHAD_B ; 11 ; Untyped ;
851 ; NUMWORDS_B ; 2048 ; Untyped ;
852 ; INDATA_REG_B ; CLOCK1 ; Untyped ;
853 ; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
854 ; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
855 ; ADDRESS_REG_B ; CLOCK0 ; Untyped ;
856 ; OUTDATA_REG_B ; UNREGISTERED ; Untyped ;
857 ; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
858 ; INDATA_ACLR_B ; NONE ; Untyped ;
859 ; WRCONTROL_ACLR_B ; NONE ; Untyped ;
860 ; ADDRESS_ACLR_B ; NONE ; Untyped ;
861 ; OUTDATA_ACLR_B ; NONE ; Untyped ;
862 ; RDCONTROL_ACLR_B ; NONE ; Untyped ;
863 ; BYTEENA_ACLR_B ; NONE ; Untyped ;
864 ; WIDTH_BYTEENA_A ; 1 ; Untyped ;
865 ; WIDTH_BYTEENA_B ; 1 ; Untyped ;
866 ; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
867 ; BYTE_SIZE ; 8 ; Untyped ;
868 ; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA ; Untyped ;
869 ; READ_DURING_WRITE_MODE_PORT_A ; NEW_DATA_NO_NBE_READ ; Untyped ;
870 ; READ_DURING_WRITE_MODE_PORT_B ; NEW_DATA_NO_NBE_READ ; Untyped ;
871 ; INIT_FILE ; db/dt.ram0_r_w_ram_1e9198d1.hdl.mif ; Untyped ;
872 ; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
873 ; MAXIMUM_DEPTH ; 0 ; Untyped ;
874 ; CLOCK_ENABLE_INPUT_A ; NORMAL ; Untyped ;
875 ; CLOCK_ENABLE_INPUT_B ; NORMAL ; Untyped ;
876 ; CLOCK_ENABLE_OUTPUT_A ; NORMAL ; Untyped ;
877 ; CLOCK_ENABLE_OUTPUT_B ; NORMAL ; Untyped ;
878 ; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
879 ; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
880 ; ENABLE_ECC ; FALSE ; Untyped ;
881 ; DEVICE_FAMILY ; Cyclone ; Untyped ;
882 ; CBXI_PARAMETER ; altsyncram_grk1 ; Untyped ;
883 +------------------------------------+-------------------------------------+------------------------------------------+
884 Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
887 +--------------------------------------------------------------------------------------------------------------------+
888 ; Parameter Settings for Inferred Entity Instance: decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1 ;
889 +------------------------------------+--------------------------------------+----------------------------------------+
890 ; Parameter Name ; Value ; Type ;
891 +------------------------------------+--------------------------------------+----------------------------------------+
892 ; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
893 ; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
894 ; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
895 ; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
896 ; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
897 ; WIDTH_BYTEENA ; 1 ; Untyped ;
898 ; OPERATION_MODE ; DUAL_PORT ; Untyped ;
899 ; WIDTH_A ; 32 ; Untyped ;
900 ; WIDTHAD_A ; 4 ; Untyped ;
901 ; NUMWORDS_A ; 16 ; Untyped ;
902 ; OUTDATA_REG_A ; UNREGISTERED ; Untyped ;
903 ; ADDRESS_ACLR_A ; NONE ; Untyped ;
904 ; OUTDATA_ACLR_A ; NONE ; Untyped ;
905 ; WRCONTROL_ACLR_A ; NONE ; Untyped ;
906 ; INDATA_ACLR_A ; NONE ; Untyped ;
907 ; BYTEENA_ACLR_A ; NONE ; Untyped ;
908 ; WIDTH_B ; 32 ; Untyped ;
909 ; WIDTHAD_B ; 4 ; Untyped ;
910 ; NUMWORDS_B ; 16 ; Untyped ;
911 ; INDATA_REG_B ; CLOCK1 ; Untyped ;
912 ; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
913 ; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
914 ; ADDRESS_REG_B ; CLOCK0 ; Untyped ;
915 ; OUTDATA_REG_B ; UNREGISTERED ; Untyped ;
916 ; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
917 ; INDATA_ACLR_B ; NONE ; Untyped ;
918 ; WRCONTROL_ACLR_B ; NONE ; Untyped ;
919 ; ADDRESS_ACLR_B ; NONE ; Untyped ;
920 ; OUTDATA_ACLR_B ; NONE ; Untyped ;
921 ; RDCONTROL_ACLR_B ; NONE ; Untyped ;
922 ; BYTEENA_ACLR_B ; NONE ; Untyped ;
923 ; WIDTH_BYTEENA_A ; 1 ; Untyped ;
924 ; WIDTH_BYTEENA_B ; 1 ; Untyped ;
925 ; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
926 ; BYTE_SIZE ; 8 ; Untyped ;
927 ; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA ; Untyped ;
928 ; READ_DURING_WRITE_MODE_PORT_A ; NEW_DATA_NO_NBE_READ ; Untyped ;
929 ; READ_DURING_WRITE_MODE_PORT_B ; NEW_DATA_NO_NBE_READ ; Untyped ;
930 ; INIT_FILE ; db/dt.ram0_r2_w_ram_8e30dd1c.hdl.mif ; Untyped ;
931 ; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
932 ; MAXIMUM_DEPTH ; 0 ; Untyped ;
933 ; CLOCK_ENABLE_INPUT_A ; NORMAL ; Untyped ;
934 ; CLOCK_ENABLE_INPUT_B ; NORMAL ; Untyped ;
935 ; CLOCK_ENABLE_OUTPUT_A ; NORMAL ; Untyped ;
936 ; CLOCK_ENABLE_OUTPUT_B ; NORMAL ; Untyped ;
937 ; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
938 ; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
939 ; ENABLE_ECC ; FALSE ; Untyped ;
940 ; DEVICE_FAMILY ; Cyclone ; Untyped ;
941 ; CBXI_PARAMETER ; altsyncram_emk1 ; Untyped ;
942 +------------------------------------+--------------------------------------+----------------------------------------+
943 Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
946 +--------------------------------------------------------------------------------------------------------------------+
947 ; Parameter Settings for Inferred Entity Instance: decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_2 ;
948 +------------------------------------+--------------------------------------+----------------------------------------+
949 ; Parameter Name ; Value ; Type ;
950 +------------------------------------+--------------------------------------+----------------------------------------+
951 ; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
952 ; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
953 ; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
954 ; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
955 ; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
956 ; WIDTH_BYTEENA ; 1 ; Untyped ;
957 ; OPERATION_MODE ; DUAL_PORT ; Untyped ;
958 ; WIDTH_A ; 32 ; Untyped ;
959 ; WIDTHAD_A ; 4 ; Untyped ;
960 ; NUMWORDS_A ; 16 ; Untyped ;
961 ; OUTDATA_REG_A ; UNREGISTERED ; Untyped ;
962 ; ADDRESS_ACLR_A ; NONE ; Untyped ;
963 ; OUTDATA_ACLR_A ; NONE ; Untyped ;
964 ; WRCONTROL_ACLR_A ; NONE ; Untyped ;
965 ; INDATA_ACLR_A ; NONE ; Untyped ;
966 ; BYTEENA_ACLR_A ; NONE ; Untyped ;
967 ; WIDTH_B ; 32 ; Untyped ;
968 ; WIDTHAD_B ; 4 ; Untyped ;
969 ; NUMWORDS_B ; 16 ; Untyped ;
970 ; INDATA_REG_B ; CLOCK1 ; Untyped ;
971 ; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
972 ; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
973 ; ADDRESS_REG_B ; CLOCK0 ; Untyped ;
974 ; OUTDATA_REG_B ; UNREGISTERED ; Untyped ;
975 ; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
976 ; INDATA_ACLR_B ; NONE ; Untyped ;
977 ; WRCONTROL_ACLR_B ; NONE ; Untyped ;
978 ; ADDRESS_ACLR_B ; NONE ; Untyped ;
979 ; OUTDATA_ACLR_B ; NONE ; Untyped ;
980 ; RDCONTROL_ACLR_B ; NONE ; Untyped ;
981 ; BYTEENA_ACLR_B ; NONE ; Untyped ;
982 ; WIDTH_BYTEENA_A ; 1 ; Untyped ;
983 ; WIDTH_BYTEENA_B ; 1 ; Untyped ;
984 ; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
985 ; BYTE_SIZE ; 8 ; Untyped ;
986 ; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA ; Untyped ;
987 ; READ_DURING_WRITE_MODE_PORT_A ; NEW_DATA_NO_NBE_READ ; Untyped ;
988 ; READ_DURING_WRITE_MODE_PORT_B ; NEW_DATA_NO_NBE_READ ; Untyped ;
989 ; INIT_FILE ; db/dt.ram0_r2_w_ram_8e30dd1c.hdl.mif ; Untyped ;
990 ; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
991 ; MAXIMUM_DEPTH ; 0 ; Untyped ;
992 ; CLOCK_ENABLE_INPUT_A ; NORMAL ; Untyped ;
993 ; CLOCK_ENABLE_INPUT_B ; NORMAL ; Untyped ;
994 ; CLOCK_ENABLE_OUTPUT_A ; NORMAL ; Untyped ;
995 ; CLOCK_ENABLE_OUTPUT_B ; NORMAL ; Untyped ;
996 ; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
997 ; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
998 ; ENABLE_ECC ; FALSE ; Untyped ;
999 ; DEVICE_FAMILY ; Cyclone ; Untyped ;
1000 ; CBXI_PARAMETER ; altsyncram_emk1 ; Untyped ;
1001 +------------------------------------+--------------------------------------+----------------------------------------+
1002 Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
1005 +----------------------------------------------------------------------------------------------------------------+
1006 ; altsyncram Parameter Settings by Entity Instance ;
1007 +-------------------------------------------+--------------------------------------------------------------------+
1009 +-------------------------------------------+--------------------------------------------------------------------+
1010 ; Number of entity instances ; 3 ;
1011 ; Entity Instance ; writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_0 ;
1012 ; -- OPERATION_MODE ; DUAL_PORT ;
1014 ; -- NUMWORDS_A ; 2048 ;
1015 ; -- OUTDATA_REG_A ; UNREGISTERED ;
1017 ; -- NUMWORDS_B ; 2048 ;
1018 ; -- ADDRESS_REG_B ; CLOCK0 ;
1019 ; -- OUTDATA_REG_B ; UNREGISTERED ;
1020 ; -- RAM_BLOCK_TYPE ; AUTO ;
1021 ; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA ;
1022 ; Entity Instance ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1 ;
1023 ; -- OPERATION_MODE ; DUAL_PORT ;
1025 ; -- NUMWORDS_A ; 16 ;
1026 ; -- OUTDATA_REG_A ; UNREGISTERED ;
1028 ; -- NUMWORDS_B ; 16 ;
1029 ; -- ADDRESS_REG_B ; CLOCK0 ;
1030 ; -- OUTDATA_REG_B ; UNREGISTERED ;
1031 ; -- RAM_BLOCK_TYPE ; AUTO ;
1032 ; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA ;
1033 ; Entity Instance ; decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_2 ;
1034 ; -- OPERATION_MODE ; DUAL_PORT ;
1036 ; -- NUMWORDS_A ; 16 ;
1037 ; -- OUTDATA_REG_A ; UNREGISTERED ;
1039 ; -- NUMWORDS_B ; 16 ;
1040 ; -- ADDRESS_REG_B ; CLOCK0 ;
1041 ; -- OUTDATA_REG_B ; UNREGISTERED ;
1042 ; -- RAM_BLOCK_TYPE ; AUTO ;
1043 ; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA ;
1044 +-------------------------------------------+--------------------------------------------------------------------+
1047 +----------------------------------------------------------------------------------------------------------------------------------+
1048 ; Port Connectivity Checks: "execute_stage:exec_st|alu:alu_inst|exec_op:shift_inst" ;
1049 +------------------------+--------+----------+-------------------------------------------------------------------------------------+
1050 ; Port ; Type ; Severity ; Details ;
1051 +------------------------+--------+----------+-------------------------------------------------------------------------------------+
1052 ; alu_result.status.zero ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1053 ; alu_result.status.sign ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1054 ; alu_result.alu_jump ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1055 ; alu_result.brpr ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1056 ; alu_result.reg_op ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1057 ; alu_result.mem_op ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1058 ; alu_result.mem_en ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1059 +------------------------+--------+----------+-------------------------------------------------------------------------------------+
1062 +----------------------------------------------------------------------------------------------------------------------------------+
1063 ; Port Connectivity Checks: "execute_stage:exec_st|alu:alu_inst|exec_op:xor_inst" ;
1064 +------------------------+--------+----------+-------------------------------------------------------------------------------------+
1065 ; Port ; Type ; Severity ; Details ;
1066 +------------------------+--------+----------+-------------------------------------------------------------------------------------+
1067 ; alu_result.status.zero ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1068 ; alu_result.status.sign ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1069 ; alu_result.alu_jump ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1070 ; alu_result.brpr ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1071 ; alu_result.reg_op ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1072 ; alu_result.mem_op ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1073 ; alu_result.mem_en ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1074 +------------------------+--------+----------+-------------------------------------------------------------------------------------+
1077 +----------------------------------------------------------------------------------------------------------------------------------+
1078 ; Port Connectivity Checks: "execute_stage:exec_st|alu:alu_inst|exec_op:or_inst" ;
1079 +------------------------+--------+----------+-------------------------------------------------------------------------------------+
1080 ; Port ; Type ; Severity ; Details ;
1081 +------------------------+--------+----------+-------------------------------------------------------------------------------------+
1082 ; alu_result.status.zero ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1083 ; alu_result.status.sign ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1084 ; alu_result.alu_jump ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1085 ; alu_result.brpr ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1086 ; alu_result.reg_op ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1087 ; alu_result.mem_op ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1088 ; alu_result.mem_en ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1089 +------------------------+--------+----------+-------------------------------------------------------------------------------------+
1092 +----------------------------------------------------------------------------------------------------------------------------------+
1093 ; Port Connectivity Checks: "execute_stage:exec_st|alu:alu_inst|exec_op:and_inst" ;
1094 +------------------------+--------+----------+-------------------------------------------------------------------------------------+
1095 ; Port ; Type ; Severity ; Details ;
1096 +------------------------+--------+----------+-------------------------------------------------------------------------------------+
1097 ; alu_result.status.zero ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1098 ; alu_result.status.sign ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1099 ; alu_result.alu_jump ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1100 ; alu_result.brpr ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1101 ; alu_result.reg_op ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1102 ; alu_result.mem_op ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1103 ; alu_result.mem_en ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1104 +------------------------+--------+----------+-------------------------------------------------------------------------------------+
1107 +----------------------------------------------------------------------------------------------------------------------------------+
1108 ; Port Connectivity Checks: "execute_stage:exec_st|alu:alu_inst|exec_op:add_inst" ;
1109 +------------------------+--------+----------+-------------------------------------------------------------------------------------+
1110 ; Port ; Type ; Severity ; Details ;
1111 +------------------------+--------+----------+-------------------------------------------------------------------------------------+
1112 ; alu_result.status.zero ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1113 ; alu_result.status.sign ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1114 ; alu_result.alu_jump ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1115 ; alu_result.brpr ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1116 ; alu_result.reg_op ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1117 ; alu_result.mem_op ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1118 ; alu_result.mem_en ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1119 +------------------------+--------+----------+-------------------------------------------------------------------------------------+
1122 +------------------------------------------------------------------------------------------------------------------------------+
1123 ; Port Connectivity Checks: "execute_stage:exec_st|alu:alu_inst" ;
1124 +--------------------+--------+----------+-------------------------------------------------------------------------------------+
1125 ; Port ; Type ; Severity ; Details ;
1126 +--------------------+--------+----------+-------------------------------------------------------------------------------------+
1127 ; alu_state.reg_op ; Input ; Info ; Stuck at GND ;
1128 ; alu_state.mem_op ; Input ; Info ; Stuck at GND ;
1129 ; alu_state.mem_en ; Input ; Info ; Stuck at GND ;
1130 ; alu_state.hw_op ; Input ; Info ; Stuck at GND ;
1131 ; alu_state.byte_op ; Input ; Info ; Stuck at GND ;
1132 ; alu_state.sign_xt ; Input ; Info ; Stuck at GND ;
1133 ; alu_result.sign_xt ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1134 +--------------------+--------+----------+-------------------------------------------------------------------------------------+
1137 +------------------------------------------------------------------------------------------------------------------------+
1138 ; Port Connectivity Checks: "execute_stage:exec_st" ;
1139 +--------------+--------+----------+-------------------------------------------------------------------------------------+
1140 ; Port ; Type ; Severity ; Details ;
1141 +--------------+--------+----------+-------------------------------------------------------------------------------------+
1142 ; ext_data_out ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1143 +--------------+--------+----------+-------------------------------------------------------------------------------------+
1146 +------------------------------------------------------------------------------------------------------------------------------+
1147 ; Port Connectivity Checks: "decode_stage:decode_st|decoder:decoder_inst" ;
1148 +--------------------+--------+----------+-------------------------------------------------------------------------------------+
1149 ; Port ; Type ; Severity ; Details ;
1150 +--------------------+--------+----------+-------------------------------------------------------------------------------------+
1151 ; instr_spl.jmptype ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1152 ; instr_spl.high_low ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1153 ; instr_spl.fill ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1154 ; instr_spl.signext ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
1155 +--------------------+--------+----------+-------------------------------------------------------------------------------------+
1158 +-------------------------------+
1159 ; Analysis & Synthesis Messages ;
1160 +-------------------------------+
1161 Info: *******************************************************************
1162 Info: Running Quartus II Analysis & Synthesis
1163 Info: Version 10.0 Build 262 08/18/2010 Service Pack 1 SJ Web Edition
1164 Info: Processing started: Sun Dec 19 20:36:12 2010
1165 Info: Command: quartus_map --read_settings_files=on --write_settings_files=off dt -c dt
1166 Info: Found 1 design units, including 1 entities, in source file /home/stefan/processor/calu/cpu/src/rom.vhd
1167 Info: Found entity 1: rom
1168 Info: Found 1 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/rom_b.vhd
1169 Info: Found design unit 1: rom-behaviour
1170 Info: Found 2 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/extension_7seg_pkg.vhd
1171 Info: Found design unit 1: extension_7seg_pkg
1172 Info: Found design unit 2: extension_7seg_pkg-body
1173 Info: Found 1 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/extension_7seg_b.vhd
1174 Info: Found design unit 1: extension_7seg-behav
1175 Info: Found 1 design units, including 1 entities, in source file /home/stefan/processor/calu/cpu/src/extension_7seg.vhd
1176 Info: Found entity 1: extension_7seg
1177 Info: Found 1 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/rs232_rx_arc.vhd
1178 Info: Found design unit 1: rs232_rx-beh
1179 Info: Found 1 design units, including 1 entities, in source file /home/stefan/processor/calu/cpu/src/rs232_rx.vhd
1180 Info: Found entity 1: rs232_rx
1181 Info: Found 1 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/writeback_stage_b.vhd
1182 Info: Found design unit 1: writeback_stage-behav
1183 Info: Found 1 design units, including 1 entities, in source file /home/stefan/processor/calu/cpu/src/writeback_stage.vhd
1184 Info: Found entity 1: writeback_stage
1185 Info: Found 1 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/rw_r_ram_b.vhd
1186 Info: Found design unit 1: rw_r_ram-behaviour
1187 Info: Found 1 design units, including 1 entities, in source file /home/stefan/processor/calu/cpu/src/rw_r_ram.vhd
1188 Info: Found entity 1: rw_r_ram
1189 Info: Found 1 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/rs232_tx_arc.vhd
1190 Info: Found design unit 1: rs232_tx-beh
1191 Info: Found 1 design units, including 1 entities, in source file /home/stefan/processor/calu/cpu/src/rs232_tx.vhd
1192 Info: Found entity 1: rs232_tx
1193 Info: Found 1 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/r_w_ram_b.vhd
1194 Info: Found design unit 1: r_w_ram-behaviour
1195 Info: Found 1 design units, including 1 entities, in source file /home/stefan/processor/calu/cpu/src/r_w_ram.vhd
1196 Info: Found entity 1: r_w_ram
1197 Info: Found 1 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/r2_w_ram_b.vhd
1198 Info: Found design unit 1: r2_w_ram-behaviour
1199 Info: Found 1 design units, including 1 entities, in source file /home/stefan/processor/calu/cpu/src/r2_w_ram.vhd
1200 Info: Found entity 1: r2_w_ram
1201 Info: Found 3 design units, including 1 entities, in source file /home/stefan/processor/calu/cpu/src/pipeline_tb.vhd
1202 Info: Found design unit 1: pipeline_tb-behavior
1203 Info: Found design unit 2: pipeline_conf_beh
1204 Info: Found entity 1: pipeline_tb
1205 Info: Found 1 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/mem_pkg.vhd
1206 Info: Found design unit 1: mem_pkg
1207 Info: Found 1 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/fetch_stage_b.vhd
1208 Info: Found design unit 1: fetch_stage-behav
1209 Info: Found 1 design units, including 1 entities, in source file /home/stefan/processor/calu/cpu/src/fetch_stage.vhd
1210 Info: Found entity 1: fetch_stage
1211 Info: Found 1 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/extension_uart_pkg.vhd
1212 Info: Found design unit 1: extension_uart_pkg
1213 Info: Found 1 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/extension_uart_b.vhd
1214 Info: Found design unit 1: extension_uart-behav
1215 Info: Found 1 design units, including 1 entities, in source file /home/stefan/processor/calu/cpu/src/extension_uart.vhd
1216 Info: Found entity 1: extension_uart
1217 Info: Found 1 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/extension_pkg.vhd
1218 Info: Found design unit 1: extension_pkg
1219 Info: Found 1 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/extension_b.vhd
1220 Info: Found design unit 1: extension_gpm-behav
1221 Info: Found 1 design units, including 1 entities, in source file /home/stefan/processor/calu/cpu/src/extension.vhd
1222 Info: Found entity 1: extension_gpm
1223 Info: Found 1 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/execute_stage_b.vhd
1224 Info: Found design unit 1: execute_stage-behav
1225 Info: Found 1 design units, including 1 entities, in source file /home/stefan/processor/calu/cpu/src/execute_stage.vhd
1226 Info: Found entity 1: execute_stage
1227 Info: Found 1 design units, including 1 entities, in source file /home/stefan/processor/calu/cpu/src/exec_op.vhd
1228 Info: Found entity 1: exec_op
1229 Info: Found 1 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/decoder_b.vhd
1230 Info: Found design unit 1: decoder-behav_d
1231 Info: Found 1 design units, including 1 entities, in source file /home/stefan/processor/calu/cpu/src/decoder.vhd
1232 Info: Found entity 1: decoder
1233 Info: Found 1 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/decode_stage_b.vhd
1234 Info: Found design unit 1: decode_stage-behav
1235 Info: Found 1 design units, including 1 entities, in source file /home/stefan/processor/calu/cpu/src/decode_stage.vhd
1236 Info: Found entity 1: decode_stage
1237 Info: Found 2 design units, including 1 entities, in source file /home/stefan/processor/calu/cpu/src/core_top.vhd
1238 Info: Found design unit 1: core_top-behav
1239 Info: Found entity 1: core_top
1240 Info: Found 1 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/core_pkg.vhd
1241 Info: Found design unit 1: core_pkg
1242 Info: Found 2 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/common_pkg.vhd
1243 Info: Found design unit 1: common_pkg
1244 Info: Found design unit 2: common_pkg-body
1245 Info: Found 2 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/alu_pkg.vhd
1246 Info: Found design unit 1: alu_pkg
1247 Info: Found design unit 2: alu_pkg-body
1248 Info: Found 1 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/alu_b.vhd
1249 Info: Found design unit 1: alu-behaviour
1250 Info: Found 1 design units, including 1 entities, in source file /home/stefan/processor/calu/cpu/src/alu.vhd
1251 Info: Found entity 1: alu
1252 Info: Found 1 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/exec_op/xor_op_b.vhd
1253 Info: Found design unit 1: exec_op-xor_op
1254 Info: Found 1 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/exec_op/shift_op_b.vhd
1255 Info: Found design unit 1: exec_op-shift_op
1256 Info: Found 1 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/exec_op/or_op_b.vhd
1257 Info: Found design unit 1: exec_op-or_op
1258 Info: Found 1 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/exec_op/and_op_b.vhd
1259 Info: Found design unit 1: exec_op-and_op
1260 Info: Found 1 design units, including 0 entities, in source file /home/stefan/processor/calu/cpu/src/exec_op/add_op_b.vhd
1261 Info: Found design unit 1: exec_op-add_op
1262 Info: Elaborating entity "core_top" for the top level hierarchy
1263 Warning (10036): Verilog HDL or VHDL warning at core_top.vhd(31): object "jump_result" assigned a value but never read
1264 Warning (10541): VHDL Signal Declaration warning at core_top.vhd(59): used implicit default value for signal "gpm_in_pin" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations.
1265 Warning (10036): Verilog HDL or VHDL warning at core_top.vhd(60): object "gpm_out_pin" assigned a value but never read
1266 Warning (10036): Verilog HDL or VHDL warning at core_top.vhd(63): object "vers" assigned a value but never read
1267 Info: Elaborating entity "fetch_stage" for hierarchy "fetch_stage:fetch_st"
1268 Warning (10541): VHDL Signal Declaration warning at fetch_stage_b.vhd(11): used implicit default value for signal "instr_w_addr" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations.
1269 Warning (10541): VHDL Signal Declaration warning at fetch_stage_b.vhd(14): used implicit default value for signal "instr_we" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations.
1270 Warning (10541): VHDL Signal Declaration warning at fetch_stage_b.vhd(15): used implicit default value for signal "instr_wr_data" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations.
1271 Info: Elaborating entity "rom" for hierarchy "fetch_stage:fetch_st|rom:instruction_ram"
1272 Info: Elaborating entity "decode_stage" for hierarchy "decode_stage:decode_st"
1273 Info: Elaborating entity "r2_w_ram" for hierarchy "decode_stage:decode_st|r2_w_ram:register_ram"
1274 Info: Elaborating entity "decoder" for hierarchy "decode_stage:decode_st|decoder:decoder_inst"
1275 Info: Elaborating entity "execute_stage" for hierarchy "execute_stage:exec_st"
1276 Warning (10541): VHDL Signal Declaration warning at execute_stage_b.vhd(19): used implicit default value for signal "ext_gpmp" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations.
1277 Info: Elaborating entity "alu" for hierarchy "execute_stage:exec_st|alu:alu_inst"
1278 Info: Elaborating entity "exec_op" using architecture "A:add_op" for hierarchy "execute_stage:exec_st|alu:alu_inst|exec_op:add_inst"
1279 Info: Elaborating entity "exec_op" using architecture "A:and_op" for hierarchy "execute_stage:exec_st|alu:alu_inst|exec_op:and_inst"
1280 Info: Elaborating entity "exec_op" using architecture "A:or_op" for hierarchy "execute_stage:exec_st|alu:alu_inst|exec_op:or_inst"
1281 Info: Elaborating entity "exec_op" using architecture "A:xor_op" for hierarchy "execute_stage:exec_st|alu:alu_inst|exec_op:xor_inst"
1282 Info: Elaborating entity "exec_op" using architecture "A:shift_op" for hierarchy "execute_stage:exec_st|alu:alu_inst|exec_op:shift_inst"
1283 Info: Elaborating entity "extension_gpm" for hierarchy "execute_stage:exec_st|extension_gpm:gpmp_inst"
1284 Info: Elaborating entity "writeback_stage" for hierarchy "writeback_stage:writeback_st"
1285 Warning (10036): Verilog HDL or VHDL warning at writeback_stage_b.vhd(20): object "ext_timer" assigned a value but never read
1286 Warning (10036): Verilog HDL or VHDL warning at writeback_stage_b.vhd(20): object "ext_gpmp" assigned a value but never read
1287 Warning (10036): Verilog HDL or VHDL warning at writeback_stage_b.vhd(25): object "calc_mem_res" assigned a value but never read
1288 Info: Elaborating entity "r_w_ram" for hierarchy "writeback_stage:writeback_st|r_w_ram:data_ram"
1289 Info: Elaborating entity "extension_uart" for hierarchy "writeback_stage:writeback_st|extension_uart:uart"
1290 Info: Elaborating entity "rs232_tx" for hierarchy "writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst"
1291 Info: Elaborating entity "rs232_rx" for hierarchy "writeback_stage:writeback_st|extension_uart:uart|rs232_rx:rs232_rx_inst"
1292 Info: Elaborating entity "extension_7seg" for hierarchy "writeback_stage:writeback_st|extension_7seg:sseg"
1293 Info: Inferred 3 megafunctions from design logic
1294 Info: Inferred altsyncram megafunction from the following design logic: "writeback_stage:writeback_st|r_w_ram:data_ram|ram~44"
1295 Info: Parameter OPERATION_MODE set to DUAL_PORT
1296 Info: Parameter WIDTH_A set to 32
1297 Info: Parameter WIDTHAD_A set to 11
1298 Info: Parameter NUMWORDS_A set to 2048
1299 Info: Parameter WIDTH_B set to 32
1300 Info: Parameter WIDTHAD_B set to 11
1301 Info: Parameter NUMWORDS_B set to 2048
1302 Info: Parameter ADDRESS_ACLR_A set to NONE
1303 Info: Parameter OUTDATA_REG_B set to UNREGISTERED
1304 Info: Parameter ADDRESS_ACLR_B set to NONE
1305 Info: Parameter OUTDATA_ACLR_B set to NONE
1306 Info: Parameter ADDRESS_REG_B set to CLOCK0
1307 Info: Parameter INDATA_ACLR_A set to NONE
1308 Info: Parameter WRCONTROL_ACLR_A set to NONE
1309 Info: Parameter INIT_FILE set to db/dt.ram0_r_w_ram_1e9198d1.hdl.mif
1310 Info: Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA
1311 Info: Inferred altsyncram megafunction from the following design logic: "decode_stage:decode_st|r2_w_ram:register_ram|ram~37"
1312 Info: Parameter OPERATION_MODE set to DUAL_PORT
1313 Info: Parameter WIDTH_A set to 32
1314 Info: Parameter WIDTHAD_A set to 4
1315 Info: Parameter NUMWORDS_A set to 16
1316 Info: Parameter WIDTH_B set to 32
1317 Info: Parameter WIDTHAD_B set to 4
1318 Info: Parameter NUMWORDS_B set to 16
1319 Info: Parameter ADDRESS_ACLR_A set to NONE
1320 Info: Parameter OUTDATA_REG_B set to UNREGISTERED
1321 Info: Parameter ADDRESS_ACLR_B set to NONE
1322 Info: Parameter OUTDATA_ACLR_B set to NONE
1323 Info: Parameter ADDRESS_REG_B set to CLOCK0
1324 Info: Parameter INDATA_ACLR_A set to NONE
1325 Info: Parameter WRCONTROL_ACLR_A set to NONE
1326 Info: Parameter INIT_FILE set to db/dt.ram0_r2_w_ram_8e30dd1c.hdl.mif
1327 Info: Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA
1328 Info: Inferred altsyncram megafunction from the following design logic: "decode_stage:decode_st|r2_w_ram:register_ram|ram~38"
1329 Info: Parameter OPERATION_MODE set to DUAL_PORT
1330 Info: Parameter WIDTH_A set to 32
1331 Info: Parameter WIDTHAD_A set to 4
1332 Info: Parameter NUMWORDS_A set to 16
1333 Info: Parameter WIDTH_B set to 32
1334 Info: Parameter WIDTHAD_B set to 4
1335 Info: Parameter NUMWORDS_B set to 16
1336 Info: Parameter ADDRESS_ACLR_A set to NONE
1337 Info: Parameter OUTDATA_REG_B set to UNREGISTERED
1338 Info: Parameter ADDRESS_ACLR_B set to NONE
1339 Info: Parameter OUTDATA_ACLR_B set to NONE
1340 Info: Parameter ADDRESS_REG_B set to CLOCK0
1341 Info: Parameter INDATA_ACLR_A set to NONE
1342 Info: Parameter WRCONTROL_ACLR_A set to NONE
1343 Info: Parameter INIT_FILE set to db/dt.ram0_r2_w_ram_8e30dd1c.hdl.mif
1344 Info: Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA
1345 Info: Elaborated megafunction instantiation "writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_0"
1346 Info: Instantiated megafunction "writeback_stage:writeback_st|r_w_ram:data_ram|altsyncram:ram_rtl_0" with the following parameter:
1347 Info: Parameter "OPERATION_MODE" = "DUAL_PORT"
1348 Info: Parameter "WIDTH_A" = "32"
1349 Info: Parameter "WIDTHAD_A" = "11"
1350 Info: Parameter "NUMWORDS_A" = "2048"
1351 Info: Parameter "WIDTH_B" = "32"
1352 Info: Parameter "WIDTHAD_B" = "11"
1353 Info: Parameter "NUMWORDS_B" = "2048"
1354 Info: Parameter "ADDRESS_ACLR_A" = "NONE"
1355 Info: Parameter "OUTDATA_REG_B" = "UNREGISTERED"
1356 Info: Parameter "ADDRESS_ACLR_B" = "NONE"
1357 Info: Parameter "OUTDATA_ACLR_B" = "NONE"
1358 Info: Parameter "ADDRESS_REG_B" = "CLOCK0"
1359 Info: Parameter "INDATA_ACLR_A" = "NONE"
1360 Info: Parameter "WRCONTROL_ACLR_A" = "NONE"
1361 Info: Parameter "INIT_FILE" = "db/dt.ram0_r_w_ram_1e9198d1.hdl.mif"
1362 Info: Parameter "READ_DURING_WRITE_MODE_MIXED_PORTS" = "OLD_DATA"
1363 Info: Found 1 design units, including 1 entities, in source file db/altsyncram_grk1.tdf
1364 Info: Found entity 1: altsyncram_grk1
1365 Info: Elaborated megafunction instantiation "decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1"
1366 Info: Instantiated megafunction "decode_stage:decode_st|r2_w_ram:register_ram|altsyncram:ram_rtl_1" with the following parameter:
1367 Info: Parameter "OPERATION_MODE" = "DUAL_PORT"
1368 Info: Parameter "WIDTH_A" = "32"
1369 Info: Parameter "WIDTHAD_A" = "4"
1370 Info: Parameter "NUMWORDS_A" = "16"
1371 Info: Parameter "WIDTH_B" = "32"
1372 Info: Parameter "WIDTHAD_B" = "4"
1373 Info: Parameter "NUMWORDS_B" = "16"
1374 Info: Parameter "ADDRESS_ACLR_A" = "NONE"
1375 Info: Parameter "OUTDATA_REG_B" = "UNREGISTERED"
1376 Info: Parameter "ADDRESS_ACLR_B" = "NONE"
1377 Info: Parameter "OUTDATA_ACLR_B" = "NONE"
1378 Info: Parameter "ADDRESS_REG_B" = "CLOCK0"
1379 Info: Parameter "INDATA_ACLR_A" = "NONE"
1380 Info: Parameter "WRCONTROL_ACLR_A" = "NONE"
1381 Info: Parameter "INIT_FILE" = "db/dt.ram0_r2_w_ram_8e30dd1c.hdl.mif"
1382 Info: Parameter "READ_DURING_WRITE_MODE_MIXED_PORTS" = "OLD_DATA"
1383 Info: Found 1 design units, including 1 entities, in source file db/altsyncram_emk1.tdf
1384 Info: Found entity 1: altsyncram_emk1
1385 Info: Registers with preset signals will power-up high
1386 Info: 130 registers lost all their fanouts during netlist optimizations. The first 130 are displayed below.
1387 Info: Register "writeback_stage:writeback_st|wb_reg.address[0]" lost all its fanouts during netlist optimizations.
1388 Info: Register "writeback_stage:writeback_st|wb_reg.address[1]" lost all its fanouts during netlist optimizations.
1389 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][29]" lost all its fanouts during netlist optimizations.
1390 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][28]" lost all its fanouts during netlist optimizations.
1391 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][27]" lost all its fanouts during netlist optimizations.
1392 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][26]" lost all its fanouts during netlist optimizations.
1393 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][25]" lost all its fanouts during netlist optimizations.
1394 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][24]" lost all its fanouts during netlist optimizations.
1395 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][23]" lost all its fanouts during netlist optimizations.
1396 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][22]" lost all its fanouts during netlist optimizations.
1397 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][21]" lost all its fanouts during netlist optimizations.
1398 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][20]" lost all its fanouts during netlist optimizations.
1399 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][19]" lost all its fanouts during netlist optimizations.
1400 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][18]" lost all its fanouts during netlist optimizations.
1401 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][17]" lost all its fanouts during netlist optimizations.
1402 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][16]" lost all its fanouts during netlist optimizations.
1403 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][15]" lost all its fanouts during netlist optimizations.
1404 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][14]" lost all its fanouts during netlist optimizations.
1405 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][13]" lost all its fanouts during netlist optimizations.
1406 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][12]" lost all its fanouts during netlist optimizations.
1407 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][11]" lost all its fanouts during netlist optimizations.
1408 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][10]" lost all its fanouts during netlist optimizations.
1409 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][9]" lost all its fanouts during netlist optimizations.
1410 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][8]" lost all its fanouts during netlist optimizations.
1411 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][7]" lost all its fanouts during netlist optimizations.
1412 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][6]" lost all its fanouts during netlist optimizations.
1413 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][5]" lost all its fanouts during netlist optimizations.
1414 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][4]" lost all its fanouts during netlist optimizations.
1415 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][3]" lost all its fanouts during netlist optimizations.
1416 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][2]" lost all its fanouts during netlist optimizations.
1417 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][1]" lost all its fanouts during netlist optimizations.
1418 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[1][0]" lost all its fanouts during netlist optimizations.
1419 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][29]" lost all its fanouts during netlist optimizations.
1420 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][28]" lost all its fanouts during netlist optimizations.
1421 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][27]" lost all its fanouts during netlist optimizations.
1422 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][26]" lost all its fanouts during netlist optimizations.
1423 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][25]" lost all its fanouts during netlist optimizations.
1424 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][24]" lost all its fanouts during netlist optimizations.
1425 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][23]" lost all its fanouts during netlist optimizations.
1426 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][22]" lost all its fanouts during netlist optimizations.
1427 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][21]" lost all its fanouts during netlist optimizations.
1428 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][20]" lost all its fanouts during netlist optimizations.
1429 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][19]" lost all its fanouts during netlist optimizations.
1430 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][18]" lost all its fanouts during netlist optimizations.
1431 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][17]" lost all its fanouts during netlist optimizations.
1432 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][16]" lost all its fanouts during netlist optimizations.
1433 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][15]" lost all its fanouts during netlist optimizations.
1434 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][14]" lost all its fanouts during netlist optimizations.
1435 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][13]" lost all its fanouts during netlist optimizations.
1436 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][12]" lost all its fanouts during netlist optimizations.
1437 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][11]" lost all its fanouts during netlist optimizations.
1438 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][10]" lost all its fanouts during netlist optimizations.
1439 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][9]" lost all its fanouts during netlist optimizations.
1440 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][8]" lost all its fanouts during netlist optimizations.
1441 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][7]" lost all its fanouts during netlist optimizations.
1442 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][6]" lost all its fanouts during netlist optimizations.
1443 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][5]" lost all its fanouts during netlist optimizations.
1444 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][4]" lost all its fanouts during netlist optimizations.
1445 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][3]" lost all its fanouts during netlist optimizations.
1446 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][2]" lost all its fanouts during netlist optimizations.
1447 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][1]" lost all its fanouts during netlist optimizations.
1448 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[2][0]" lost all its fanouts during netlist optimizations.
1449 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][29]" lost all its fanouts during netlist optimizations.
1450 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][28]" lost all its fanouts during netlist optimizations.
1451 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][27]" lost all its fanouts during netlist optimizations.
1452 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][26]" lost all its fanouts during netlist optimizations.
1453 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][25]" lost all its fanouts during netlist optimizations.
1454 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][24]" lost all its fanouts during netlist optimizations.
1455 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][23]" lost all its fanouts during netlist optimizations.
1456 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][22]" lost all its fanouts during netlist optimizations.
1457 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][21]" lost all its fanouts during netlist optimizations.
1458 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][20]" lost all its fanouts during netlist optimizations.
1459 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][19]" lost all its fanouts during netlist optimizations.
1460 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][18]" lost all its fanouts during netlist optimizations.
1461 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][17]" lost all its fanouts during netlist optimizations.
1462 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][16]" lost all its fanouts during netlist optimizations.
1463 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][15]" lost all its fanouts during netlist optimizations.
1464 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][14]" lost all its fanouts during netlist optimizations.
1465 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][13]" lost all its fanouts during netlist optimizations.
1466 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][12]" lost all its fanouts during netlist optimizations.
1467 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][11]" lost all its fanouts during netlist optimizations.
1468 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][10]" lost all its fanouts during netlist optimizations.
1469 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][9]" lost all its fanouts during netlist optimizations.
1470 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][8]" lost all its fanouts during netlist optimizations.
1471 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][7]" lost all its fanouts during netlist optimizations.
1472 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][6]" lost all its fanouts during netlist optimizations.
1473 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][5]" lost all its fanouts during netlist optimizations.
1474 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][4]" lost all its fanouts during netlist optimizations.
1475 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][3]" lost all its fanouts during netlist optimizations.
1476 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][2]" lost all its fanouts during netlist optimizations.
1477 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][1]" lost all its fanouts during netlist optimizations.
1478 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.preg[3][0]" lost all its fanouts during netlist optimizations.
1479 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.oflo" lost all its fanouts during netlist optimizations.
1480 Info: Register "execute_stage:exec_st|extension_gpm:gpmp_inst|reg.status.sign" lost all its fanouts during netlist optimizations.
1481 Info: Register "fetch_stage:fetch_st|instr_r_addr[11]" lost all its fanouts during netlist optimizations.
1482 Info: Register "fetch_stage:fetch_st|instr_r_addr[12]" lost all its fanouts during netlist optimizations.
1483 Info: Register "fetch_stage:fetch_st|instr_r_addr[13]" lost all its fanouts during netlist optimizations.
1484 Info: Register "fetch_stage:fetch_st|instr_r_addr[14]" lost all its fanouts during netlist optimizations.
1485 Info: Register "fetch_stage:fetch_st|instr_r_addr[15]" lost all its fanouts during netlist optimizations.
1486 Info: Register "fetch_stage:fetch_st|instr_r_addr[16]" lost all its fanouts during netlist optimizations.
1487 Info: Register "fetch_stage:fetch_st|instr_r_addr[17]" lost all its fanouts during netlist optimizations.
1488 Info: Register "fetch_stage:fetch_st|instr_r_addr[18]" lost all its fanouts during netlist optimizations.
1489 Info: Register "fetch_stage:fetch_st|instr_r_addr[19]" lost all its fanouts during netlist optimizations.
1490 Info: Register "fetch_stage:fetch_st|instr_r_addr[20]" lost all its fanouts during netlist optimizations.
1491 Info: Register "fetch_stage:fetch_st|instr_r_addr[21]" lost all its fanouts during netlist optimizations.
1492 Info: Register "fetch_stage:fetch_st|instr_r_addr[22]" lost all its fanouts during netlist optimizations.
1493 Info: Register "fetch_stage:fetch_st|instr_r_addr[23]" lost all its fanouts during netlist optimizations.
1494 Info: Register "fetch_stage:fetch_st|instr_r_addr[24]" lost all its fanouts during netlist optimizations.
1495 Info: Register "fetch_stage:fetch_st|instr_r_addr[25]" lost all its fanouts during netlist optimizations.
1496 Info: Register "fetch_stage:fetch_st|instr_r_addr[26]" lost all its fanouts during netlist optimizations.
1497 Info: Register "fetch_stage:fetch_st|instr_r_addr[27]" lost all its fanouts during netlist optimizations.
1498 Info: Register "fetch_stage:fetch_st|instr_r_addr[28]" lost all its fanouts during netlist optimizations.
1499 Info: Register "fetch_stage:fetch_st|instr_r_addr[29]" lost all its fanouts during netlist optimizations.
1500 Info: Register "fetch_stage:fetch_st|instr_r_addr[30]" lost all its fanouts during netlist optimizations.
1501 Info: Register "fetch_stage:fetch_st|instr_r_addr[31]" lost all its fanouts during netlist optimizations.
1502 Info: Register "writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|baud_cnt[31]" lost all its fanouts during netlist optimizations.
1503 Info: Register "writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|baud_cnt[30]" lost all its fanouts during netlist optimizations.
1504 Info: Register "writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|baud_cnt[29]" lost all its fanouts during netlist optimizations.
1505 Info: Register "writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|baud_cnt[28]" lost all its fanouts during netlist optimizations.
1506 Info: Register "writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|baud_cnt[27]" lost all its fanouts during netlist optimizations.
1507 Info: Register "writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|baud_cnt[26]" lost all its fanouts during netlist optimizations.
1508 Info: Register "writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|baud_cnt[25]" lost all its fanouts during netlist optimizations.
1509 Info: Register "writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|baud_cnt[24]" lost all its fanouts during netlist optimizations.
1510 Info: Register "writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|baud_cnt[23]" lost all its fanouts during netlist optimizations.
1511 Info: Register "writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|baud_cnt[22]" lost all its fanouts during netlist optimizations.
1512 Info: Register "writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|baud_cnt[21]" lost all its fanouts during netlist optimizations.
1513 Info: Register "writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|baud_cnt[20]" lost all its fanouts during netlist optimizations.
1514 Info: Register "writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|baud_cnt[19]" lost all its fanouts during netlist optimizations.
1515 Info: Register "writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|baud_cnt[18]" lost all its fanouts during netlist optimizations.
1516 Info: Register "writeback_stage:writeback_st|extension_uart:uart|rs232_tx:rs232_tx_inst|baud_cnt[17]" lost all its fanouts during netlist optimizations.
1517 Info: Generating hard_block partition "hard_block:auto_generated_inst"
1518 Info: Implemented 2007 device resources after synthesis - the final resource count might be different
1519 Info: Implemented 3 input pins
1520 Info: Implemented 29 output pins
1521 Info: Implemented 1879 logic cells
1522 Info: Implemented 96 RAM segments
1523 Info: Quartus II Analysis & Synthesis was successful. 0 errors, 11 warnings
1524 Info: Peak virtual memory: 270 megabytes
1525 Info: Processing ended: Sun Dec 19 20:36:26 2010
1526 Info: Elapsed time: 00:00:14
1527 Info: Total CPU time (on all processors): 00:00:13
projects / calu.git / blob