cpu/src/writeback_stage_b.vhd

   1 library IEEE;
   2 use IEEE.std_logic_1164.all;
   3 use IEEE.numeric_std.all;
   4
   5 use work.common_pkg.all;
   6 use work.core_pkg.all;
   7
   8 use work.mem_pkg.all;
   9 use work.extension_pkg.all;
  10
  11 architecture behav of writeback_stage is
  12
  13 signal data_ram_read : word_t;
  14
  15 signal wb_reg, wb_reg_nxt : writeback_rec;
  16
  17 signal ext_uart,ext_timer,ext_gpmp :  extmod_rec;
  18
  19
  20
  21 begin
  22
  23
  24         data_ram : r_w_ram
  25                 generic map (
  26                         DATA_ADDR_WIDTH,
  27                         WORD_WIDTH
  28                 )
  29
  30                 port map (
  31                         clk,
  32                         wb_reg_nxt.address(DATA_ADDR_WIDTH+1 downto 2),
  33                         wb_reg_nxt.address(DATA_ADDR_WIDTH+1 downto 2),
  34                         wb_reg_nxt.dmem_write_en,
  35                         ram_data,
  36                         data_ram_read
  37                 );
  38
  39
  40 syn: process(clk, reset)
  41
  42 begin
  43
  44         if (reset = RESET_VALUE) then
  45                 wb_reg.address <= (others => '0');
  46                 wb_reg.dmem_en <= '0';
  47                 wb_reg.dmem_write_en <= '0';
  48                 wb_reg.hword <= '0';
  49                 wb_reg.byte_s <= '0';
  50         elsif rising_edge(clk) then
  51                 wb_reg <= wb_reg_nxt;
  52         end if;
  53
  54 end process;
  55
  56 --      type writeback_rec is record
  57 --              address : in word_t;            --ureg
  58 --              dmem_en : in std_logic;         --ureg (jump addr in mem or in address)
  59 --              dmem_write_en : in std_logic;   --ureg
  60 --              hword_hl : in std_logic         --ureg
  61 --      end record;
  62
  63
  64
  65 shift_input: process(data_ram_read, address, dmem_en, dmem_write_en, hword, wb_reg, result, byte_s, alu_jmp, br_pred)
  66
  67 begin
  68         wb_reg_nxt.address <= address;
  69         wb_reg_nxt.dmem_en <= dmem_en;
  70         wb_reg_nxt.dmem_write_en <= dmem_write_en;
  71         wb_reg_nxt.hword <= hword;
  72         wb_reg_nxt.byte_s <= byte_s;
  73
  74         regfile_val <= result; --(others => '0');
  75
  76         if (wb_reg.dmem_en = '1' and wb_reg.dmem_write_en = '0') then   -- ram read operation --alu_jmp = '0' and
  77                 regfile_val <= data_ram_read;
  78                 if (wb_reg.hword = '1') then
  79                         regfile_val <= (others => '0');
  80                         if (wb_reg.address(1) = '1') then
  81                                 regfile_val(15 downto 0) <= data_ram_read(31 downto 16);
  82                         else
  83                                 regfile_val(15 downto 0) <= data_ram_read(15 downto 0);
  84                         end if;
  85                 end if;
  86                 if (wb_reg.byte_s = '1') then
  87                         regfile_val <= (others => '0');
  88                         case wb_reg.address(1 downto 0) is
  89                                 when "00" => regfile_val(7 downto 0) <= data_ram_read(7 downto 0);
  90                                 when "01" => regfile_val(7 downto 0) <= data_ram_read(15 downto 8);
  91                                 when "10" => regfile_val(7 downto 0) <= data_ram_read(23 downto 16);
  92                                 when "11" => regfile_val(7 downto 0) <= data_ram_read(31 downto 24);
  93                                 when others => null;
  94                         end case;
  95                 end if;
  96         end if;
  97
  98         jump <= alu_jmp xor br_pred;
  99         jump_addr <= result;
 100         if ((alu_jmp and wb_reg.dmem_en) = '1') then
 101                 jump_addr <= data_ram_read;
 102         end if;
 103
 104 end process;
 105
 106 --                      result : in gp_register_t;      --reg  (alu result or jumpaddr)
 107 --                      result_addr : in gp_addr_t;     --reg
 108 --                      address : in word_t;            --ureg
 109 --                      alu_jmp : in std_logic;         --reg
 110 --                      br_pred : in std_logic;         --reg
 111 --                      write_en : in std_logic;        --reg  (register file)
 112 --                      dmem_en : in std_logic;         --ureg (jump addr in mem or in result)
 113 --                      dmem_write_en : in std_logic;   --ureg
 114 --                      hword : in std_logic            --ureg
 115
 116
 117
 118 out_logic: process(write_en, result_addr, wb_reg, alu_jmp)
 119
 120 begin
 121         reg_we <= (write_en or (wb_reg.dmem_en and not(wb_reg.dmem_write_en))) and not(alu_jmp);
 122         reg_addr <= result_addr;
 123 end process;
 124
 125
 126 addr_de_mult: process(wb_reg_nxt.address)
 127
 128 begin
 129
 130   ext_uart.sel <='0';
 131   ext_uart.wr_en <= '0';
 132   ext_uart.byte_en <= (others => '0');
 133   ext_uart.data <= (others => '0');
 134   ext_uart.addr <= (others => '0');
 135                                                  -- wenn ich hier statt dem 4rer die konstante nehme dann gibts an fehler wegen nicht lokaler variable -.-
 136  case wb_reg_nxt.address(wb_reg_nxt.address'high downto 4) is
 137         when EXT_UART_ADDR =>
 138                 ext_uart.sel <='1';
 139                 ext_uart.wr_en <= wb_reg_nxt.dmem_write_en;
 140                 ext_uart.data <= ram_data;
 141                 ext_uart.addr <= wb_reg_nxt.address(wb_reg_nxt.address'high downto BYTEADDR);
 142                 case wb_reg.address(1 downto 0) is
 143                                 when "00" => ext_uart.byte_en <= "0001";
 144                                 when "01" => ext_uart.byte_en <= "0010";
 145                                 when "10" => ext_uart.byte_en <= "0100";
 146                                 when "11" => ext_uart.byte_en <= "1000";
 147                                 when others => null;
 148                         end case;
 149         when EXT_TIMER_ADDR =>
 150                 ext_timer.sel <='1';
 151                 ext_timer.wr_en <= wb_reg_nxt.dmem_write_en;
 152                 ext_timer.data <= ram_data;
 153                 ext_timer.addr <= wb_reg_nxt.address(wb_reg_nxt.address'high downto BYTEADDR);
 154                 case wb_reg.address(1 downto 0) is
 155                                 when "00" => ext_timer.byte_en <= "0001";
 156                                 when "01" => ext_timer.byte_en <= "0010";
 157                                 when "10" => ext_timer.byte_en <= "0100";
 158                                 when "11" => ext_timer.byte_en <= "1000";
 159                                 when others => null;
 160                         end case;
 161         when EXT_GPMP_ADDR =>
 162                 ext_gpmp.sel <='1';
 163                 ext_gpmp.wr_en <= wb_reg_nxt.dmem_write_en;
 164                 ext_gpmp.data <= ram_data;
 165                 ext_gpmp.addr <= wb_reg_nxt.address(wb_reg_nxt.address'high downto BYTEADDR);
 166                 case wb_reg.address(1 downto 0) is
 167                                 when "00" => ext_gpmp.byte_en <= "0001";
 168                                 when "01" => ext_gpmp.byte_en <= "0010";
 169                                 when "10" => ext_gpmp.byte_en <= "0100";
 170                                 when "11" => ext_gpmp.byte_en <= "1000";
 171                                 when others => null;
 172                         end case;
 173         -- hier kann man weiter extensions adden :) Konstanten sind im extension pkg definiert
 174         when others => null;
 175  end case;
 176
 177 end process;
 178
 179 end behav;
 180