862c1d35d5bb9c6bec8542afa8c8dde18c444901
[calu.git] / cpu / src / writeback_stage_b.vhd
1 library IEEE;
2 use IEEE.std_logic_1164.all;
3 use IEEE.numeric_std.all;
4
5 use work.common_pkg.all;
6 use work.core_pkg.all;
7
8 use work.mem_pkg.all;
9 use work.extension_pkg.all;
10
11 architecture behav of writeback_stage is
12
13 signal data_ram_read : word_t;
14
15 signal wb_reg, wb_reg_nxt : writeback_rec;
16
17 signal ext_uart,ext_timer,ext_gpmp :  extmod_rec;
18
19
20
21 begin
22
23
24         data_ram : r_w_ram
25                 generic map (
26                         DATA_ADDR_WIDTH,
27                         WORD_WIDTH
28                 )
29                 
30                 port map (
31                         clk,
32                         wb_reg_nxt.address(DATA_ADDR_WIDTH+1 downto 2),
33                         wb_reg_nxt.address(DATA_ADDR_WIDTH+1 downto 2),
34                         wb_reg_nxt.dmem_write_en,
35                         ram_data,
36                         data_ram_read
37                 );
38
39         
40 syn: process(clk, reset)
41
42 begin
43
44         if (reset = RESET_VALUE) then
45                 wb_reg.address <= (others => '0');
46                 wb_reg.dmem_en <= '0';
47                 wb_reg.dmem_write_en <= '0';
48                 wb_reg.hword <= '0';
49                 wb_reg.byte_s <= '0';
50         elsif rising_edge(clk) then
51                 wb_reg <= wb_reg_nxt;
52         end if;
53         
54 end process; 
55
56 --      type writeback_rec is record
57 --              address : in word_t;            --ureg 
58 --              dmem_en : in std_logic;         --ureg (jump addr in mem or in address)
59 --              dmem_write_en : in std_logic;   --ureg
60 --              hword_hl : in std_logic         --ureg
61 --      end record;
62
63
64
65 shift_input: process(data_ram_read, address, dmem_en, dmem_write_en, hword, wb_reg, result, byte_s, alu_jmp, br_pred)
66
67 begin
68         wb_reg_nxt.address <= address;
69         wb_reg_nxt.dmem_en <= dmem_en;
70         wb_reg_nxt.dmem_write_en <= dmem_write_en;
71         wb_reg_nxt.hword <= hword;
72         wb_reg_nxt.byte_s <= byte_s;
73
74         regfile_val <= result; --(others => '0');
75
76         if (wb_reg.dmem_en = '1' and wb_reg.dmem_write_en = '0') then   -- ram read operation --alu_jmp = '0' and 
77                 regfile_val <= data_ram_read;
78                 if (wb_reg.hword = '1') then
79                         regfile_val <= (others => '0');
80                         if (wb_reg.address(1) = '1') then
81                                 regfile_val(15 downto 0) <= data_ram_read(31 downto 16);
82                         else
83                                 regfile_val(15 downto 0) <= data_ram_read(15 downto 0);
84                         end if;
85                 end if;
86                 if (wb_reg.byte_s = '1') then
87                         regfile_val <= (others => '0');
88                         case wb_reg.address(1 downto 0) is
89                                 when "00" => regfile_val(7 downto 0) <= data_ram_read(7 downto 0);
90                                 when "01" => regfile_val(7 downto 0) <= data_ram_read(15 downto 8);
91                                 when "10" => regfile_val(7 downto 0) <= data_ram_read(23 downto 16);
92                                 when "11" => regfile_val(7 downto 0) <= data_ram_read(31 downto 24);
93                                 when others => null;
94                         end case;
95                 end if; 
96         end if;
97
98         --jump <= (alu_jmp xor br_pred) and (write_en or wb_reg.dmem_en);
99         jump <= (alu_jmp xor br_pred);-- and (write_en or wb_reg.dmem_en);
100
101 --      if alu_jmp = '0' and br_pred = '1' and write_en = '0' then
102 --              jump <= '1';
103 --      end if;
104
105         jump_addr <= result;
106         if ((alu_jmp and wb_reg.dmem_en) = '1') then
107                 jump_addr <= data_ram_read;
108         end if;
109
110 end process;
111
112 --                      result : in gp_register_t;      --reg  (alu result or jumpaddr)
113 --                      result_addr : in gp_addr_t;     --reg
114 --                      address : in word_t;            --ureg 
115 --                      alu_jmp : in std_logic;         --reg
116 --                      br_pred : in std_logic;         --reg
117 --                      write_en : in std_logic;        --reg  (register file)
118 --                      dmem_en : in std_logic;         --ureg (jump addr in mem or in result)
119 --                      dmem_write_en : in std_logic;   --ureg
120 --                      hword : in std_logic            --ureg
121
122
123
124 out_logic: process(write_en, result_addr, wb_reg, alu_jmp)
125
126 begin   
127         reg_we <= (write_en or (wb_reg.dmem_en and not(wb_reg.dmem_write_en))) and not(alu_jmp);
128         reg_addr <= result_addr;
129 end process;
130
131
132 addr_de_mult: process(wb_reg_nxt.address, ram_data, wb_reg)
133
134 begin
135
136   ext_uart.sel <='0';
137   ext_uart.wr_en <= '0';
138   ext_uart.byte_en <= (others => '0');
139   ext_uart.data <= (others => '0');
140   ext_uart.addr <= (others => '0');
141
142   ext_timer.sel <='0';
143   ext_timer.wr_en <= '0';
144   ext_timer.byte_en <= (others => '0');
145   ext_timer.data <= (others => '0');
146   ext_timer.addr <= (others => '0');
147
148   ext_gpmp.sel <='0';
149   ext_gpmp.wr_en <= '0';
150   ext_gpmp.byte_en <= (others => '0');
151   ext_gpmp.data <= (others => '0');
152   ext_gpmp.addr <= (others => '0');
153                                                  -- wenn ich hier statt dem 4rer die konstante nehme dann gibts an fehler wegen nicht lokaler variable -.-
154  case wb_reg_nxt.address(wb_reg_nxt.address'high downto 4) is
155         when EXT_UART_ADDR => 
156                 ext_uart.sel <='1';
157                 ext_uart.wr_en <= wb_reg_nxt.dmem_write_en;
158                 ext_uart.data <= ram_data;
159                 ext_uart.addr <= wb_reg_nxt.address(wb_reg_nxt.address'high downto BYTEADDR);
160                 case wb_reg.address(1 downto 0) is
161                                 when "00" => ext_uart.byte_en <= "0001";
162                                 when "01" => ext_uart.byte_en <= "0010";
163                                 when "10" => ext_uart.byte_en <= "0100";
164                                 when "11" => ext_uart.byte_en <= "1000";
165                                 when others => null;
166                         end case;
167         when EXT_TIMER_ADDR => 
168                 ext_timer.sel <='1';
169                 ext_timer.wr_en <= wb_reg_nxt.dmem_write_en;
170                 ext_timer.data <= ram_data;
171                 ext_timer.addr <= wb_reg_nxt.address(wb_reg_nxt.address'high downto BYTEADDR);
172                 case wb_reg.address(1 downto 0) is
173                                 when "00" => ext_timer.byte_en <= "0001";
174                                 when "01" => ext_timer.byte_en <= "0010";
175                                 when "10" => ext_timer.byte_en <= "0100";
176                                 when "11" => ext_timer.byte_en <= "1000";
177                                 when others => null;
178                         end case;
179         when EXT_GPMP_ADDR => 
180                 ext_gpmp.sel <='1';
181                 ext_gpmp.wr_en <= wb_reg_nxt.dmem_write_en;
182                 ext_gpmp.data <= ram_data;
183                 ext_gpmp.addr <= wb_reg_nxt.address(wb_reg_nxt.address'high downto BYTEADDR);
184                 case wb_reg.address(1 downto 0) is
185                                 when "00" => ext_gpmp.byte_en <= "0001";
186                                 when "01" => ext_gpmp.byte_en <= "0010";
187                                 when "10" => ext_gpmp.byte_en <= "0100";
188                                 when "11" => ext_gpmp.byte_en <= "1000";
189                                 when others => null;
190                         end case;
191         -- hier kann man weiter extensions adden :) Konstanten sind im extension pkg definiert 
192         when others => null;
193  end case;
194
195 end process;
196
197 end behav;
198