2 use IEEE.std_logic_1164.all;
3 use IEEE.numeric_std.all;
5 use work.common_pkg.all;
9 use work.extension_pkg.all;
10 use work.extension_uart_pkg.all;
11 use work.extension_7seg_pkg.all;
13 architecture behav of writeback_stage is
15 signal data_ram_read, data_ram_read_ext : word_t;
16 signal data_addr : word_t;
18 signal wb_reg, wb_reg_nxt : writeback_rec;
20 signal ext_uart,ext_timer,ext_gpmp,ext_7seg : extmod_rec;
21 signal ext_uart_out, ext_timer_out, ext_gpmp_out : gp_register_t;
23 signal sel_nxt, dmem_we, bus_rx, ext_anysel : std_logic;
25 signal calc_mem_res : gp_register_t;
29 ext_timer_out <= (others => '0'); --TODO: delete when timer is connected
30 ext_gpmp_out <= (others => '0'); --TODO: delete when gpm is connected
40 data_addr(DATA_ADDR_WIDTH+1 downto 2),
41 data_addr(DATA_ADDR_WIDTH+1 downto 2),
74 syn: process(clk, reset)
78 if (reset = RESET_VALUE) then
79 wb_reg.address <= (others => '0');
80 wb_reg.dmem_en <= '0';
81 wb_reg.dmem_write_en <= '0';
86 wb_reg.byte_en <= (others => '0');
87 wb_reg.data <= (others =>'0');
88 elsif rising_edge(clk) then
95 -- type writeback_rec is record
96 -- address : in word_t; --ureg
97 -- dmem_en : in std_logic; --ureg (jump addr in mem or in address)
98 -- dmem_write_en : in std_logic; --ureg
99 -- hword_hl : in std_logic --ureg
104 shift_input: process(data_ram_read, address, dmem_en, dmem_write_en, hword, wb_reg, result, byte_s, alu_jmp, br_pred, write_en, ram_data)
105 variable byte_en : byte_en_t;
107 wb_reg_nxt.address <= address;
108 wb_reg_nxt.dmem_en <= dmem_en;
109 wb_reg_nxt.dmem_write_en <= dmem_write_en;
110 wb_reg_nxt.hword <= hword;
111 wb_reg_nxt.byte_s <= byte_s;
113 calc_mem_res <= result; --(others => '0');
115 wb_reg_nxt.data <= ram_data;
116 byte_en := (others => '0');
117 if dmem_en = '1' then
119 case address(BYTEADDR-1 downto 0) is
120 when "00" => byte_en(1 downto 0) := "11";
121 when "10" => byte_en(3 downto 2) := "11";
124 elsif byte_s = '1' then
125 case address(BYTEADDR-1 downto 0) is
126 when "00" => byte_en(0) := '1';
127 when "01" => byte_en(1) := '1';
128 when "10" => byte_en(2) := '1';
129 when "11" => byte_en(3) := '1';
133 byte_en := (others => '1');
136 wb_reg_nxt.byte_en <= byte_en;
138 -- if (wb_reg.dmem_en = '1' and wb_reg.dmem_write_en = '0') then -- ram read operation --alu_jmp = '0' and
139 -- calc_mem_res <= data_ram_read;
140 -- if (wb_reg.hword = '1') then
141 -- calc_mem_res <= (others => '0');
142 -- if (wb_reg.address(1) = '1') then
143 -- calc_mem_res(15 downto 0) <= data_ram_read(31 downto 16);
145 -- calc_mem_res(15 downto 0) <= data_ram_read(15 downto 0);
148 -- if (wb_reg.byte_s = '1') then
149 -- calc_mem_res <= (others => '0');
150 -- case wb_reg.address(1 downto 0) is
151 -- when "00" => calc_mem_res(7 downto 0) <= data_ram_read(7 downto 0);
152 -- when "01" => calc_mem_res(7 downto 0) <= data_ram_read(15 downto 8);
153 -- when "10" => calc_mem_res(7 downto 0) <= data_ram_read(23 downto 16);
154 -- when "11" => calc_mem_res(7 downto 0) <= data_ram_read(31 downto 24);
155 -- when others => null;
160 --jump <= (alu_jmp xor br_pred) and (write_en or wb_reg.dmem_en);
161 jump <= (alu_jmp xor br_pred);-- and (write_en or wb_reg.dmem_en);
163 if (alu_jmp = '1' and wb_reg.dmem_en = '1' and wb_reg.dmem_write_en = '0' and write_en = '0') then
164 jump_addr <= data_ram_read;
169 -- if alu_jmp = '0' and br_pred = '1' and write_en = '0' then
173 -- if ((alu_jmp and wb_reg.dmem_en) = '1') then
174 -- jump_addr <= data_ram_read;
179 -- result : in gp_register_t; --reg (alu result or jumpaddr)
180 -- result_addr : in gp_addr_t; --reg
181 -- address : in word_t; --ureg
182 -- alu_jmp : in std_logic; --reg
183 -- br_pred : in std_logic; --reg
184 -- write_en : in std_logic; --reg (register file)
185 -- dmem_en : in std_logic; --ureg (jump addr in mem or in result)
186 -- dmem_write_en : in std_logic; --ureg
187 -- hword : in std_logic --ureg
191 out_logic: process(write_en, result_addr, wb_reg, alu_jmp, wb_reg_nxt, data_ram_read_ext, calc_mem_res, data_ram_read, ext_anysel)
192 variable reg_we_v : std_logic;
193 variable data_out : gp_register_t;
195 reg_we_v := (write_en or (wb_reg.dmem_en and not(wb_reg.dmem_write_en))) and not(alu_jmp);
196 reg_addr <= result_addr;
198 data_addr <= (others => '0');
201 if (wb_reg.address(DATA_ADDR_WIDTH+2) /= '1') then
202 data_out := data_ram_read;
204 reg_we_v := reg_we_v and ext_anysel;
205 data_out := data_ram_read_ext;
208 if wb_reg.byte_en(0) = '0' then
209 data_out(byte_t'range) := (others => '0');
211 if wb_reg.byte_en(1) = '0' then
212 data_out(2*byte_t'length-1 downto byte_t'length) := (others => '0');
214 if wb_reg.byte_en(2) = '0' then
215 data_out(3*byte_t'length-1 downto 2*byte_t'length) := (others => '0');
217 if wb_reg.byte_en(3) = '0' then
218 data_out(4*byte_t'length-1 downto 3*byte_t'length) := (others => '0');
221 data_out := to_stdlogicvector(to_bitvector(data_out) srl to_integer(unsigned(wb_reg.address(BYTEADDR-1 downto 0))));
223 if (wb_reg_nxt.address(DATA_ADDR_WIDTH+2) /= '1') then
224 data_addr(DATA_ADDR_WIDTH+1 downto 0) <= wb_reg_nxt.address(DATA_ADDR_WIDTH+1 downto 0);
225 dmem_we <= wb_reg_nxt.dmem_write_en;
228 regfile_val <= data_out;
235 addr_de_mult: process(wb_reg, wb_reg_nxt, ram_data, sel_nxt, ext_uart_out, ext_gpmp_out, ext_timer_out)
236 variable wr_en, enable : std_logic; -- these are all registered
237 variable byte_en : byte_en_t; -- if a module needs the nxt signals it has to manually select them
238 variable addr : ext_addr_t; -- for example the data memory, because it already has input registers
239 variable addrid : ext_addrid_t;
240 variable data : gp_register_t;
243 --if selecting enable is too slow, see alu_b
244 enable := wb_reg.dmem_en;
245 wr_en := wb_reg.dmem_write_en;
246 byte_en := wb_reg.byte_en;
247 addr := wb_reg.address(gp_register_t'high downto BYTEADDR);
248 addrid := wb_reg.address(gp_register_t'high downto EXTWORDS);
256 ext_uart.wr_en <= wr_en;
257 ext_7seg.wr_en <= wr_en;
258 ext_timer.wr_en <= wr_en;
259 ext_gpmp.wr_en <= wr_en;
261 ext_uart.byte_en <= byte_en;
262 ext_7seg.byte_en <= byte_en;
263 ext_timer.byte_en <= byte_en;
264 ext_gpmp.byte_en <= byte_en;
266 ext_uart.addr <= addr;
267 ext_7seg.addr <= addr;
268 ext_timer.addr <= addr;
269 ext_gpmp.addr <= addr;
271 ext_uart.data <= data;
272 ext_7seg.data <= data;
273 ext_timer.data <= data;
274 ext_gpmp.data <= data;
275 -- wenn ich hier statt dem 4rer die konstante nehme dann gibts an fehler wegen nicht lokaler variable -.-
277 when EXT_UART_ADDR =>
278 ext_uart.sel <= enable;
279 ext_anysel <= enable;
280 -- ext_uart.wr_en <= wb_reg_nxt.dmem_write_en;
281 -- ext_uart.data <= ram_data;
282 -- ext_uart.addr <= wb_reg_nxt.address(31 downto 2);
283 -- case wb_reg_nxt.address(1 downto 0) is
284 -- when "00" => ext_uart.byte_en <= "0001";
285 -- when "01" => ext_uart.byte_en <= "0010";
286 -- when "10" => ext_uart.byte_en <= "0100";
287 -- --when "11" => ext_uart.byte_en <= "1000";
288 -- when "11" => ext_uart.byte_en <= "1111";
289 -- when others => null;
292 when EXT_7SEG_ADDR =>
293 ext_7seg.sel <= enable;
294 ext_anysel <= enable;
295 -- ext_7seg.wr_en <= wb_regdmem_write_en;
296 -- ext_7seg.data <= ram_data;
297 -- ext_7seg.addr <= wb_reg_nxt.address(31 downto 2);
298 -- ext_7seg.byte_en(1 downto 0) <= wb_reg_nxt.address(1 downto 0);
301 -- case wb_reg_nxt.address(1 downto 0) is
302 -- when "00" => ext_7seg.byte_en <= "0001";
303 -- when "01" => ext_7seg.byte_en <= "0010";
304 -- when "10" => ext_7seg.byte_en <= "0100";
305 -- when "11" => ext_7seg.byte_en <= "1000";
306 -- when others => null;
309 when EXT_TIMER_ADDR =>
310 ext_timer.sel <= enable;
311 ext_anysel <= enable;
312 -- ext_timer.wr_en <= wb_reg_nxt.dmem_write_en;
313 -- ext_timer.data <= ram_data;
314 -- ext_timer.addr <= wb_reg_nxt.address(wb_reg_nxt.address'high downto BYTEADDR);
315 -- case wb_reg.address(1 downto 0) is
316 -- when "00" => ext_timer.byte_en <= "0001";
317 -- when "01" => ext_timer.byte_en <= "0010";
318 -- when "10" => ext_timer.byte_en <= "0100";
319 -- when "11" => ext_timer.byte_en <= "1000";
320 -- when others => null;
322 when EXT_GPMP_ADDR =>
323 ext_gpmp.sel <= enable;
324 ext_anysel <= enable;
325 -- ext_gpmp.wr_en <= wb_reg_nxt.dmem_write_en;
326 -- ext_gpmp.data <= ram_data;
327 -- ext_gpmp.addr <= wb_reg_nxt.address(wb_reg_nxt.address'high downto BYTEADDR);
328 -- case wb_reg.address(1 downto 0) is
329 -- when "00" => ext_gpmp.byte_en <= "0001";
330 -- when "01" => ext_gpmp.byte_en <= "0010";
331 -- when "10" => ext_gpmp.byte_en <= "0100";
332 -- when "11" => ext_gpmp.byte_en <= "1000";
333 -- when others => null;
335 -- hier kann man weiter extensions adden :) Konstanten sind im extension pkg definiert
336 when others => ext_anysel <= '0';
339 data_ram_read_ext <= ext_uart_out or ext_gpmp_out or ext_timer_out;