cpu/src/rom_b.vhd

   1 library ieee;
   2
   3 use IEEE.std_logic_1164.all;
   4 use IEEE.numeric_std.all;
   5
   6 use work.mem_pkg.all;
   7
   8 architecture behaviour of rom is
   9
  10         subtype RAM_ENTRY_TYPE is std_logic_vector(DATA_WIDTH -1 downto 0);
  11         type RAM_TYPE is array (0 to (2**ADDR_WIDTH)-1) of RAM_ENTRY_TYPE;
  12
  13                                                                         -- r0 = 0, r1 = 1, r2 = 3, r3 = A
  14
  15         signal rrrr_addr : std_logic_vector(31 downto 0);
  16
  17 begin
  18         process(clk)
  19         begin
  20                 if rising_edge(clk) then
  21 --               data_out <= ram(to_integer(UNSIGNED(rd_addr)));
  22
  23
  24         case rrrr_addr(10 downto 0) is
  25
  26         -- fibonacci
  27 --                              when "00000000000" => data_out <= "11101101000000000000000000000000"; --
  28 --                              when "00000000001" => data_out <= "11101101001000000000000000000000"; --
  29 --                              when "00000000010" => data_out <= "11100111101000000000000000000000"; --
  30 --
  31 --                              when "00000000011" => data_out <= "11100001000000000000000000100001"; --
  32 --                              when "00000000100" => data_out <= "11101100100000000000001100000000"; --
  33 --                              when "00000000101" => data_out <= "00001011011111111111111010000011"; --
  34 --
  35 --                              when "00000000110" => data_out <= "11101101000000000000000000001000"; --
  36 --                              when "00000000111" => data_out <= "11100111100000000000000000001111"; --
  37 --                              when "00000001000" => data_out <= "11100111100000000000000000010011"; -- --
  38 --
  39 --
  40 --                              when "00000001001" => data_out <= x"ed080048"; --x"ed080048"; --
  41 --                              when "00000001010" => data_out <= x"ed500080"; --
  42 --                              when "00000001011" => data_out <= x"fd500002"; --
  43 --                              when "00000001100" => data_out <= x"eb000107";
  44 --                              when "00000001101" => data_out <= "11101011000000000000011010000010"; --"11101011000000000000000000000010";
  45 --
  46 --                              when "00000001110" => data_out <= x"e5088800";
  47 --                              when "00000001111" => data_out <= x"e0150800";
  48 --                              when "00000010000" => data_out <= x"e7010000";
  49 --                              when "00000010001" => data_out <= x"ec800000";
  50 --                              when "00000010010" => data_out <= x"0b000008";
  51 --                              when "00000010011" => data_out <= x"e1910020";
  52 --                              when "00000010100" => data_out <= x"eb7ffe07";
  53 --                              when "00000010101" => data_out <= x"e7197ffc";
  54 --                              when "00000010110" => data_out <= x"e0018000";
  55 --
  56 --                              when "00000010111" => data_out <= x"e1110020";
  57 --                              when "00000011000" => data_out <= x"e7810000";
  58 --                              when "00000011001" => data_out <= x"eb00000a";
  59 --
  60 --
  61 --                              when "00000011010" => data_out <= x"ed290080";
  62 --                              when "00000011011" => data_out <= x"e1080000";
  63 --
  64 --                              when "00000011100" => data_out <= x"e78a8000";
  65 --
  66 --                              when "00000011101" => data_out <= x"ed510058";
  67 --                              when "00000011110" => data_out <= x"e7850000";
  68
  69                         -- uart echo
  70
  71 --1;00000000;ed010058;ldi r0, 0x200B;;
  72 --1;00000004;ed090060;ldi r1, 0x200C;;
  73 --1;00000008;ed110080;ldi r2, 0x2010;;
  74 --1;0000000c;e7188000;ldw r3, 0(r1);;
  75 --1;00000010;ec1a0000;cmp r3, r4;;
  76 --1;00000014;1b7ffd81;breq 0;;
  77 --1;00000018;e7980000;stw r3, 0(r0);;
  78 --1;0000001c;e7990000;stw r3, 0(r2);;
  79 --1;00000020;e1218000;addi r4, r3, 0;;
  80 --1;00000024;eb7ffb81;br 0;;
  81
  82                                 when "00000000000" => data_out <= x"ed010058";
  83                                 when "00000000001" => data_out <= x"ed090060";
  84                                 when "00000000010" => data_out <= x"ed110080"; --x"e7188000";  f
  85                                 when "00000000011" => data_out <= x"e7188000"; --x"ec1a0000";
  86                                 when "00000000100" => data_out <= x"ec1a0000";
  87                                 when "00000000101" => data_out <= x"1b7ffe01";
  88                                 when "00000000110" => data_out <= x"e7990000"; -- f
  89                                 when "00000000111" => data_out <= x"e7980000";
  90                                 when "00000001000" => data_out <= x"e1218000";
  91                                 when "00000001001" => data_out <= x"eb7ffb81";
  92
  93
  94
  95 --                              when "00000000000" => data_out <= x"ed000000";
  96 --                              when "00000000001" => data_out <= x"ed080008";
  97 --                              when "00000000010" => data_out <= x"e9880000"; --x"e7188000";  f
  98 --                              when "00000000011" => data_out <= x"e5088400"; --x"ec1a0000";
  99 --                              when "00000000100" => data_out <= x"e9880001";
 100 --                              when "00000000101" => data_out <= x"e7180000";
 101 --                              when "00000000110" => data_out <= x"e9200001"; -- f
 102 --                              when "00000000111" => data_out <= x"e7a00004";
 103 --                              when "00000001000" => data_out <= x"e7280004";
 104 --                      --      when "00000001001" => data_out <= x"eb7ffb81";
 105
 106
 107                                 when others => data_out <= "11101011000000000000000000000010";
 108
 109                         end case;
 110
 111                         if wr_en = '1' then
 112                         end if;
 113                 end if;
 114         end process;
 115
 116         rrrr_addr(10 downto 0) <= rd_addr;
 117         rrrr_addr(31 downto 11) <= (others => '0');
 118 end architecture behaviour;