1 -- `Deep Thought', a softcore CPU implemented on a FPGA
3 -- Copyright (C) 2010 Markus Hofstaetter <markus.manrow@gmx.at>
4 -- Copyright (C) 2010 Martin Perner <e0725782@student.tuwien.ac.at>
5 -- Copyright (C) 2010 Stefan Rebernig <stefan.rebernig@gmail.com>
6 -- Copyright (C) 2010 Manfred Schwarz <e0725898@student.tuwien.ac.at>
7 -- Copyright (C) 2010 Bernhard Urban <lewurm@gmail.com>
9 -- This program is free software: you can redistribute it and/or modify
10 -- it under the terms of the GNU General Public License as published by
11 -- the Free Software Foundation, either version 3 of the License, or
12 -- (at your option) any later version.
14 -- This program is distributed in the hope that it will be useful,
15 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
16 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 -- GNU General Public License for more details.
19 -- You should have received a copy of the GNU General Public License
20 -- along with this program. If not, see <http://www.gnu.org/licenses/>.
24 use IEEE.std_logic_1164.all;
25 use IEEE.numeric_std.all;
29 architecture behaviour of r_w_ram_be is
31 type word_t is array (0 to 3) of std_logic_vector(7 downto 0);
32 type ram_t is array (0 to (2**ADDR_WIDTH)-1) of word_t;
33 signal ram : ram_t := (others => ((x"00"), (x"00"), (x"00"), (x"00")));
34 signal q_local : word_t;
36 begin -- Re-organize the read data from the RAM to match the output
37 unpack: for i in 0 to 3 generate
38 q(8*(i+1) - 1 downto 8*i) <= q_local(i);
43 if(rising_edge(clk)) then
46 ram(to_integer(UNSIGNED(waddr)))(0) <= wdata(7 downto 0);
49 ram(to_integer(UNSIGNED(waddr)))(1) <= wdata(15 downto 8);
52 ram(to_integer(UNSIGNED(waddr)))(2) <= wdata(23 downto 16);
55 ram(to_integer(UNSIGNED(waddr)))(3) <= wdata(31 downto 24);
58 q_local <= ram(to_integer(UNSIGNED(raddr)));
62 end architecture behaviour;