cpu/src/fetch_stage.vhd

   1 library IEEE;
   2 use IEEE.std_logic_1164.all;
   3 use IEEE.numeric_std.all;
   4
   5 use work.common_pkg;
   6
   7 entity fetch_stage is
   8
   9         generic (
  10                         -- active reset value
  11                         RESET_VALUE : std_logic;
  12                         -- active logic value
  13                         LOGIC_ACT : std_logic;
  14
  15                         );
  16         port(
  17                 --System inputs
  18                         clk : in std_logic;
  19                         reset : in std_logic;
  20
  21                 --Data inputs
  22                         jump_result : in instruction_addr_t;
  23                         prediction_result : in instruction_addr_t;
  24                         branch_prediction_bit : in std_logic;
  25                         alu_jump_bit : in std_logic;
  26
  27                 --Data outputs
  28                         instruction : out instruction_word_t
  29                 );
  30
  31 end fetch_stage;