cpu/src/fetch_stage.vhd

   1 library IEEE;
   2 use IEEE.std_logic_1164.all;
   3 use IEEE.numeric_std.all;
   4
   5 use work.common_pkg.all;
   6 use work.core_pkg.all;
   7
   8 entity fetch_stage is
   9
  10         generic (
  11                         -- active reset value
  12                         RESET_VALUE : std_logic;
  13                         -- active logic value
  14                         LOGIC_ACT : std_logic
  15
  16                         );
  17         port(
  18                 --System inputs
  19                         clk : in std_logic;
  20                         reset : in std_logic;
  21
  22                 --Data inputs
  23                         jump_result : in instruction_addr_t;
  24                         prediction_result : in instruction_addr_t;
  25                         branch_prediction_bit : in std_logic;
  26                         alu_jump_bit : in std_logic;
  27                         int_req : in interrupt_t;
  28                 -- instruction memory program port :D
  29                         new_im_data_in : in std_logic;
  30                         im_addr : in gp_register_t;
  31                         im_data : in gp_register_t;
  32
  33                 --Data outputs
  34                         instruction : out instruction_word_t;
  35                         prog_cnt : out instruction_addr_t;
  36                 -- debug
  37                         led2 : out std_logic
  38                 );
  39
  40 end fetch_stage;