07d6bda2654efe5d679d3231c149e907dcea61c1
[calu.git] / cpu / src / extension_uart.vhd
1 library IEEE;
2 use IEEE.std_logic_1164.all;
3 use IEEE.numeric_std.all;
4
5 use work.common_pkg.all;
6 use work.extension_pkg.all;
7 use work.extension_uart_pkg.all;
8
9
10 entity extension_uart is
11
12         generic (
13                         -- active reset value
14                         RESET_VALUE : std_logic;
15                         CLK_PER_BAUD : integer
16                         );
17         port(
18                 --System inputs
19                         clk :   in std_logic;
20                         reset : in std_logic;
21                 -- general extension interface                  
22                         ext_reg  : in extmod_rec;
23                         data_out : out gp_register_t;
24
25                         uart_int : out std_logic;
26                 -- Input
27                         bus_rx : in std_logic;
28                 -- Ouput
29                         bus_tx : out std_logic
30                 );
31                 
32 end extension_uart;