3c3496007f4e3cabfafc440ce358884b9d4edf87
[calu.git] / cpu / src / extension_imp_b.vhd
1 library IEEE;
2 use IEEE.std_logic_1164.all;
3 use IEEE.numeric_std.all;
4 use IEEE.STD_LOGIC_ARITH.ALL;
5 use IEEE.STD_LOGIC_UNSIGNED.ALL;
6
7 use work.common_pkg.all;
8 use work.core_pkg.all;
9
10
11 use work.mem_pkg.all;
12 use work.extension_pkg.all;
13 use work.extension_imp_pkg.all;
14
15 architecture behav of extension_imp is
16
17 signal w1_st_co, w1_st_co_nxt, w2_im_addr, w2_im_addr_nxt, w3_im_data, w3_im_data_nxt, w4_im_notused, w4_im_notused_nxt : gp_register_t;
18 signal new_im_data, new_im_data_nxt: std_logic;
19
20 begin
21
22
23 syn : process (clk, reset)
24 begin
25    if (reset = RESET_VALUE) then
26                         w1_st_co <= (others=>'0');
27                         w2_im_addr(31 downto 16) <= (others=>'0');
28                         -- todo mit einer konstante versehen
29                         w2_im_addr(15 downto 0) <= x"0003";
30                         w3_im_data <= (others=>'0');
31                         w4_im_notused <= (others=>'0');
32                         --im only
33                         new_im_data <= '0';
34
35
36         elsif rising_edge(clk) then            
37                         w1_st_co <= w1_st_co_nxt;
38                         w2_im_addr <= w2_im_addr_nxt;
39                         w3_im_data <= w3_im_data_nxt;
40                         w4_im_notused <= w4_im_notused_nxt;
41                         --im only
42                         new_im_data <= new_im_data_nxt;
43
44    end if;
45 end process syn;
46
47 -------------------------- LESEN UND SCHREIBEN ANFANG ------------------------------------------------------------
48
49 gwriten : process (ext_reg,w1_st_co,w2_im_addr,w3_im_data,w4_im_notused)
50
51 variable tmp_data  : gp_register_t;
52
53 begin
54
55                 w1_st_co_nxt <= w1_st_co;
56                 w2_im_addr_nxt <= w2_im_addr;
57                 w3_im_data_nxt <= w3_im_data;
58                 w4_im_notused_nxt <= w4_im_notused;
59
60         if ext_reg.sel = '1' and ext_reg.wr_en = '1' then
61                 tmp_data := (others =>'0');                     
62                 if ext_reg.byte_en(0) = '1' then
63                         tmp_data(byte_t'range) :=ext_reg.data(byte_t'range);
64                 end if;
65                 if ext_reg.byte_en(1) = '1' then
66                         tmp_data((2*byte_t'length-1) downto byte_t'length) := ext_reg.data((2*byte_t'length-1) downto byte_t'length);
67                 end if;
68                 if ext_reg.byte_en(2) = '1' then
69                         tmp_data((3*byte_t'length-1) downto 2*byte_t'length) := ext_reg.data((3*byte_t'length-1) downto 2*byte_t'length);
70                 end if;
71                 if ext_reg.byte_en(3) = '1' then
72                         tmp_data((4*byte_t'length-1) downto 3*byte_t'length) := ext_reg.data((4*byte_t'length-1) downto 3*byte_t'length);
73                 end if;
74
75                 case ext_reg.addr(1 downto 0) is
76                 when "00" => 
77                         w1_st_co_nxt <= tmp_data;
78                 when "01" =>
79                         -- -1 wegen increment des addr registers
80                         tmp_data := tmp_data - '1';
81                         w2_im_addr_nxt <= tmp_data;
82                 when "10" =>
83                         w1_st_co_nxt(0) <= '1'; -- busy flag set
84                         w2_im_addr_nxt <= w2_im_addr + '1';
85                         w3_im_data_nxt <= tmp_data;
86                 when "11" =>
87                         --w4_im_notused_nxt <= tmp_data; sollte nur gelesen werden
88                 when others => null;
89                 end case;
90         end if;
91
92 end process gwriten;
93
94 gread : process (clk,ext_reg,w1_st_co,w2_im_addr,w3_im_data,w4_im_notused)
95
96 variable tmp_data  : gp_register_t;
97
98 begin
99         if ext_reg.sel = '1' and ext_reg.wr_en = '0' then
100                 case ext_reg.addr(1 downto 0) is
101                 when "00" => 
102                         tmp_data := (others =>'0');                     
103                         if ext_reg.byte_en(0) = '1' then
104                                 tmp_data(byte_t'range) := w1_st_co(byte_t'range);
105                         end if;
106                         if ext_reg.byte_en(1) = '1' then
107                                 tmp_data((2*byte_t'length-1) downto byte_t'length) := w1_st_co((2*byte_t'length-1) downto byte_t'length);
108                         end if;
109                         if ext_reg.byte_en(2) = '1' then
110                                 tmp_data((3*byte_t'length-1) downto 2*byte_t'length) := w1_st_co((3*byte_t'length-1) downto 2*byte_t'length);
111                         end if;
112                         if ext_reg.byte_en(3) = '1' then
113                                 tmp_data((4*byte_t'length-1) downto 3*byte_t'length) := w1_st_co((4*byte_t'length-1) downto 3*byte_t'length);
114                         end if;
115                         data_out <= tmp_data;
116                 when "01" =>
117                         tmp_data := (others =>'0');                     
118                         if ext_reg.byte_en(0) = '1' then
119                                 tmp_data(byte_t'range) := w2_im_addr(byte_t'range);
120                         end if;
121                         if ext_reg.byte_en(1) = '1' then
122                                 tmp_data((2*byte_t'length-1) downto byte_t'length) := w2_im_addr((2*byte_t'length-1) downto byte_t'length);
123                         end if;
124                         if ext_reg.byte_en(2) = '1' then
125                                 tmp_data((3*byte_t'length-1) downto 2*byte_t'length) := w2_im_addr((3*byte_t'length-1) downto 2*byte_t'length);
126                         end if;
127                         if ext_reg.byte_en(3) = '1' then
128                                 tmp_data((4*byte_t'length-1) downto 3*byte_t'length) := w2_im_addr((4*byte_t'length-1) downto 3*byte_t'length);
129                         end if;
130                         data_out <= tmp_data;
131                 when "10" =>
132                         tmp_data := (others =>'0');                     
133                         if ext_reg.byte_en(0) = '1' then
134                                 tmp_data(byte_t'range) := w3_im_data(byte_t'range);
135                         end if;
136                         if ext_reg.byte_en(1) = '1' then
137                                 tmp_data((2*byte_t'length-1) downto byte_t'length) := w3_im_data((2*byte_t'length-1) downto byte_t'length);
138                         end if;
139                         if ext_reg.byte_en(2) = '1' then
140                                 tmp_data((3*byte_t'length-1) downto 2*byte_t'length) := w3_im_data((3*byte_t'length-1) downto 2*byte_t'length);
141                         end if;
142                         if ext_reg.byte_en(3) = '1' then
143                                 tmp_data((4*byte_t'length-1) downto 3*byte_t'length) := w3_im_data((4*byte_t'length-1) downto 3*byte_t'length);
144                         end if;
145                         data_out <= tmp_data;
146                 when "11" =>
147                         tmp_data := (others =>'0');     
148                         if ext_reg.byte_en(0) = '1' then
149                                 tmp_data(byte_t'range) := w4_im_notused(byte_t'range);
150                         end if;
151                         if ext_reg.byte_en(1) = '1' then
152                                 tmp_data((2*byte_t'length-1) downto byte_t'length) := w4_im_notused((2*byte_t'length-1) downto byte_t'length);
153                         end if;
154                         if ext_reg.byte_en(2) = '1' then
155                                 tmp_data((3*byte_t'length-1) downto 2*byte_t'length) := w4_im_notused((3*byte_t'length-1) downto 2*byte_t'length);
156                         end if;
157                         if ext_reg.byte_en(3) = '1' then
158                                 tmp_data((4*byte_t'length-1) downto 3*byte_t'length) := w4_im_notused((4*byte_t'length-1) downto 3*byte_t'length);
159                         end if;
160                         data_out <= tmp_data;
161                 when others => null;
162                 end case;
163         else
164                 data_out  <= (others=>'0');             
165         end if;
166 end process gread;
167
168
169 -------------------------- LESEN UND SCHREIBEN ENDE ---------------------------------------------------------------
170
171 -------------------------- INTERNE VERARBEITUNG ANFANG ------------------------------------------------------------
172
173 dataprocess : process (ext_reg)
174
175
176 begin
177 new_im_data_nxt <= '0';
178 if ext_reg.sel = '1' and ext_reg.wr_en = '1' then
179                 case ext_reg.addr(1 downto 0) is
180                 when "00" => 
181
182                 when "01" =>
183
184                 when "10" =>
185                         new_im_data_nxt <= '1';
186                 when "11" =>
187                 
188                 when others => null;
189                 end case;
190         end if;
191
192 end process dataprocess;
193 -- asyncrone verarbeitung
194 im_addr <= w2_im_addr;
195 im_data <= w3_im_data;
196 new_im_data_out <= new_im_data;
197
198
199
200
201 -------------------------- INTERNE VERARBEITUNG ENDE --------------------------------------------------------------
202
203 end behav;
204