2 use IEEE.std_logic_1164.all;
3 use IEEE.numeric_std.all;
5 use work.common_pkg.all;
8 use work.extension_pkg.all;
10 architecture behav of execute_stage is
12 signal condition : condition_t;
13 signal op_group : op_info_t;
14 signal op_detail : op_opt_t;
15 signal left_operand, right_operand : gp_register_t;
16 signal alu_state, alu_nxt : alu_result_rec;
17 signal psw : status_rec;
19 signal ext_gpmp : extmod_rec;
20 signal data_out : gp_register_t;
22 signal pval : gp_register_t;
23 signal paddr : paddr_t;
24 signal pinc, pwr_en : std_logic;
28 type exec_internal is record
29 result : gp_register_t;
36 signal reg, reg_nxt : exec_internal;
41 port map(clk, reset, condition, op_group,
42 left_operand, right_operand, dec_instr.displacement, dec_instr.prog_cnt, dec_instr.brpr, op_detail, alu_state, pval, alu_nxt,addr,data, pinc, pwr_en, paddr);
46 gpmp_inst : extension_gpm
47 generic map (RESET_VALUE)
63 syn: process(clk, reset)
67 if reset = RESET_VALUE then
71 reg.result <= (others =>'0');
72 reg.res_addr <= (others => '0');
73 elsif rising_edge(clk) then
79 asyn: process(reset,dec_instr, alu_nxt, psw, reg,left_operand,right_operand)
82 condition <= dec_instr.condition;
83 op_group <= dec_instr.op_group;
84 op_detail <= dec_instr.op_detail;
88 alu_state <= (reg.result,dec_instr.daddr,psw,reg.alu_jump,reg.brpr,'0','0','0','0','0','0');
91 if reset = RESET_VALUE then
92 condition <= COND_NEVER;
97 reg_nxt.brpr <= alu_nxt.brpr;
98 reg_nxt.alu_jump <= alu_nxt.alu_jump;
99 reg_nxt.wr_en <= alu_nxt.reg_op;
100 reg_nxt.result <= alu_nxt.result;
101 reg_nxt.res_addr <= alu_nxt.result_addr;
105 forward: process(regfile_val, reg_we, reg_addr, dec_instr)
107 left_operand <= dec_instr.src1;
108 right_operand <= dec_instr.src2;
111 if dec_instr.saddr1 = reg_addr then
112 left_operand <= regfile_val;
114 if (dec_instr.saddr2 = reg_addr) and (dec_instr.op_detail(IMM_OPT) = '0') then
115 right_operand <= regfile_val;
120 result <= reg.result;
121 result_addr <= reg.res_addr;
122 alu_jump <= reg.alu_jump;
125 dmem <= alu_nxt.mem_op;
126 --dmem <= reg.result(4);
127 dmem_write_en <= alu_nxt.mem_en;
128 --dmem_write_en <= reg.result(0);
129 --dmem_write_en <= '1';
130 hword <= alu_nxt.hw_op;
131 --hword <= reg.result(1);
132 byte_s <= alu_nxt.byte_op;
134 --addr <= alu_nxt.result;
135 --data <= right_operand;
136 --byte_s <= reg.result(2);