afcf986d20fb60bb5c898edef34d1139309936e7
[calu.git] / cpu / src / execute_stage.vhd
1 library IEEE;
2 use IEEE.std_logic_1164.all;
3 use IEEE.numeric_std.all;
4
5 use work.common_pkg.all;
6 use work.alu_pkg.all;
7 use work.gpm_pkg.all;
8
9 entity execute_stage is
10
11         generic (
12                         -- active reset value
13                         RESET_VALUE : std_logic
14                         -- active logic value
15                         --LOGIC_ACT : std_logic;
16                         
17                         );
18         port(
19                 --System inputs
20                         clk : in std_logic;
21                         reset : in std_logic;
22                         dec_instr : in dec_op;
23                         regfile_val : in gp_register_t;
24                         reg_we : in std_logic;
25                         reg_addr : in gp_addr_t;
26                 --System output
27                         result : out gp_register_t;--reg
28                         result_addr : out gp_addr_t;--reg
29                         addr : out word_t; --memaddr
30                         data : out gp_register_t; --mem data --ureg
31                         alu_jump : out std_logic;--reg
32                         brpr  : out std_logic;  --reg
33                         wr_en : out std_logic;--regop --reg
34                         dmem  : out std_logic;--memop
35                         dmem_write_en : out std_logic;
36                         hword  : out std_logic;
37                         byte_s : out std_logic
38                 );
39                 
40 end execute_stage;