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925c579ff6526fafbf2cefb44c3758193057aaa0
[calu.git]
/
cpu
/
src
/
execute_stage.vhd
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library IEEE;
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use IEEE.std_logic_1164.all;
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use IEEE.numeric_std.all;
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entity execute_stage is
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generic (
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-- active reset value
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RESET_VALUE : std_logic;
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-- active logic value
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LOGIC_ACT : std_logic;
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);
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port(
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--System inputs
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clk : in std_logic;
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reset : in std_logic;
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dec_instr : in dec_op
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);
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end execute_stage;