1 -- `Deep Thought', a softcore CPU implemented on a FPGA
3 -- Copyright (C) 2010 Markus Hofstaetter <markus.manrow@gmx.at>
4 -- Copyright (C) 2010 Martin Perner <e0725782@student.tuwien.ac.at>
5 -- Copyright (C) 2010 Stefan Rebernig <stefan.rebernig@gmail.com>
6 -- Copyright (C) 2010 Manfred Schwarz <e0725898@student.tuwien.ac.at>
7 -- Copyright (C) 2010 Bernhard Urban <lewurm@gmail.com>
9 -- This program is free software: you can redistribute it and/or modify
10 -- it under the terms of the GNU General Public License as published by
11 -- the Free Software Foundation, either version 3 of the License, or
12 -- (at your option) any later version.
14 -- This program is distributed in the hope that it will be useful,
15 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
16 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 -- GNU General Public License for more details.
19 -- You should have received a copy of the GNU General Public License
20 -- along with this program. If not, see <http://www.gnu.org/licenses/>.
23 use IEEE.std_logic_1164.all;
24 use IEEE.numeric_std.all;
26 use work.common_pkg.all;
29 architecture shift_op of exec_op is
31 signal arith, rs, carry : std_logic;
35 arith <= op_detail(ARITH_OPT);
36 rs <= op_detail(RIGHT_OPT);
37 carry <= op_detail(CARRY_OPT);
39 calc: process(left_operand, right_operand, arith,rs, carry, alu_state)
40 variable alu_result_v : alu_result_rec;
41 variable tmp_shift : bit_vector(gp_register_t'length+1 downto 0);
42 variable tmp_sb : std_logic;
44 alu_result_v := alu_state;
47 tmp_sb := (carry and alu_state.status.carry and not(arith)) or (arith and left_operand(gp_register_t'high));
48 tmp_shift := to_bitvector(tmp_sb & left_operand & alu_state.status.carry);
49 tmp_shift := tmp_shift sra to_integer(unsigned(right_operand(SHIFT_WIDTH-1 downto 0)));
51 alu_result_v.status.carry := to_stdlogicvector(tmp_shift)(0);
53 tmp_sb := (carry and alu_state.status.carry and not(arith));
54 tmp_shift := to_bitvector(alu_state.status.carry & left_operand & tmp_sb);
55 tmp_shift := tmp_shift sla to_integer(unsigned(right_operand(SHIFT_WIDTH-1 downto 0)));
57 alu_result_v.status.carry := to_stdlogicvector(tmp_shift)(tmp_shift'high);
60 alu_result_v.result := to_stdlogicvector(tmp_shift)(gp_register_t'length downto 1);
62 alu_result <= alu_result_v;
66 end architecture shift_op;