3 use IEEE.std_logic_1164.all;
4 use IEEE.numeric_std.all;
10 constant WORD_WIDTH : INTEGER := 32;
11 constant HWORD_WIDTH : INTEGER := 16;
12 constant BYTE_WIDTH : INTEGER := 8;
13 constant OPCODE_WIDTH : INTEGER := 5;
14 constant DISPL_WIDTH : INTEGER := 15;
16 subtype byte_t is std_logic_vector(BYTE_WIDTH-1 downto 0);
17 subtype hword_t is std_logic_vector(HWORD_WIDTH-1 downto 0);
18 subtype word_t is std_logic_vector(WORD_WIDTH-1 downto 0);
20 subtype gp_register_t is word_t;
22 subtype byte_en_t is std_logic_vector((gp_register_t'length/byte_t'length-1) downto 0);
24 constant REG_ZERO : gp_register_t := (others => '0');
26 constant INSTR_ADDR_WIDTH : INTEGER := 32;
27 constant PHYS_INSTR_ADDR_WIDTH : INTEGER := 11;
28 constant REG_ADDR_WIDTH : INTEGER := 4;
29 constant DATA_ADDR_WIDTH : INTEGER := 11;
30 constant PHYS_DATA_ADDR_WIDTH : INTEGER := 32;
32 constant NUM_OP_OPT_WIDTH : INTEGER := 6;
33 constant COND_WIDTH : INTEGER := 4;
34 constant DATA_END_ADDR : integer := ((2**DATA_ADDR_WIDTH)-1);
37 subtype instruction_word_t is std_logic_vector(WORD_WIDTH-1 downto 0);
38 subtype instruction_addr_t is std_logic_vector(INSTR_ADDR_WIDTH-1 downto 0);
39 subtype instr_addr_t is instruction_addr_t;
41 subtype gp_addr_t is std_logic_vector(REG_ADDR_WIDTH-1 downto 0);
42 subtype data_ram_word_t is std_logic_vector(WORD_WIDTH-1 downto 0);
43 subtype data_ram_addr_t is std_logic_vector(DATA_ADDR_WIDTH-1 downto 0);
45 subtype opcode_t is std_logic_vector(OPCODE_WIDTH-1 downto 0);
46 subtype condition_t is std_logic_vector(COND_WIDTH-1 downto 0);
48 --Opcode consits of decoded group information type and option bits
49 --currently not complete, might need option increase too.
50 --IMMEDIATE always in right_operand (src2)
52 constant IMM_OPT : integer := 0; -- no sharing
54 constant SUB_OPT : integer := 1;
55 constant ARITH_OPT : integer := 1;
56 constant HWORD_OPT : integer := 1;
57 constant PUSH_OPT : integer := 1;
59 constant CARRY_OPT : integer := 2;
60 constant BYTE_OPT : integer := 2;
62 constant RIGHT_OPT : integer := 3;
63 constant JMP_REG_OPT : integer := 3;
64 constant ST_OPT : integer := 3; -- store opt
65 constant RET_OPT : integer := 3;
67 constant NO_PSW_OPT : integer := 4;--no sharing
68 constant NO_DST_OPT : integer := 5; --no sharing
70 type op_info_t is (ADDSUB_OP,AND_OP,OR_OP, XOR_OP,SHIFT_OP, LDST_OP, JMP_OP, JMP_ST_OP, STACK_OP);
71 subtype op_opt_t is std_logic_vector(NUM_OP_OPT_WIDTH-1 downto 0);
74 type instruction_rec is record
76 predicates : std_logic_vector(3 downto 0);
80 reg_dest_addr : std_logic_vector(REG_ADDR_WIDTH-1 downto 0);
81 reg_src1_addr : std_logic_vector(REG_ADDR_WIDTH-1 downto 0);
82 reg_src2_addr : std_logic_vector(REG_ADDR_WIDTH-1 downto 0);
84 immediate : std_logic_vector(WORD_WIDTH-1 downto 0);
86 displacement : gp_register_t;
88 jmptype : std_logic_vector(1 downto 0);
90 high_low, fill, signext, bp: std_logic;
99 type read_through_write_rec is record
101 rtw_reg : gp_register_t;
102 rtw_reg1 : std_logic;
103 rtw_reg2 : std_logic;
104 immediate : gp_register_t;
106 reg1_addr : gp_addr_t;
107 reg2_addr : gp_addr_t;
111 type dec_op is record
112 condition : condition_t;
113 op_group : op_info_t;
114 op_detail : op_opt_t;
117 displacement : gp_register_t;
118 prog_cnt : instr_addr_t;
120 src1 : gp_register_t;
121 src2 : gp_register_t;
130 type writeback_rec is record
131 -- result : in gp_register_t; --reg (alu result or jumpaddr)
132 -- result_addr : in gp_addr_t; --reg
133 address : word_t; --ureg
134 -- alu_jmp : in std_logic; --reg
135 -- br_pred : in std_logic; --reg
136 -- write_en : in std_logic; --reg (register file)
137 dmem_en : std_logic; --ureg (jump addr in mem or in address)
138 dmem_write_en : std_logic; --ureg
139 hword : std_logic; --ureg
142 data : gp_register_t;
145 type exec2wb_rec is record
146 result : gp_register_t; --reg (alu result or jumpaddr)
147 result_addr : gp_addr_t; --reg
148 address : word_t; --ureg
149 ram_data : word_t; --ureg
150 alu_jmp : std_logic; --reg
151 br_pred : std_logic; --reg
152 write_en : std_logic; --reg (register file) bei jump 1 wenn addr in result
153 dmem_en : std_logic; --ureg (jump addr in mem or in address)
154 dmem_write_en : std_logic; --ureg
155 hword : std_logic; --ureg
156 byte_s : std_logic; --ureg
159 function inc(value : in std_logic_vector; constant by : in integer := 1) return std_logic_vector;
160 function log2c(constant value : in integer range 0 to integer'high) return integer;
161 end package common_pkg;
163 package body common_pkg is
165 function inc(value : in std_logic_vector; constant by : in integer := 1) return std_logic_vector is
167 return std_logic_vector(UNSIGNED(value)+by);
170 function log2c(constant value : in integer range 0 to integer'high) return integer is
171 variable ret_value : integer;
172 variable cur_value : integer;
177 while cur_value < value loop
178 ret_value := ret_value + 1;
179 cur_value := cur_value * 2;
184 end package body common_pkg;